LXR linux/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h

   1/*
   2 * Copyright 2012-15 Advanced Micro Devices, Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * Authors: AMD
  23 *
  24 */
  25
  26
  27#ifndef __DAL_DPP_H__
  28#define __DAL_DPP_H__
  29
  30#include "transform.h"
  31
  32struct dpp {
  33        const struct dpp_funcs *funcs;
  34        struct dc_context *ctx;
  35        int inst;
  36        struct dpp_caps *caps;
  37        struct pwl_params regamma_params;
  38        struct pwl_params degamma_params;
  39#if defined(CONFIG_DRM_AMD_DC_DCN2_0)
  40        struct dpp_cursor_attributes cur_attr;
  41#endif
  42
  43#if defined(CONFIG_DRM_AMD_DC_DCN2_0)
  44        struct pwl_params shaper_params;
  45#endif
  46};
  47
  48struct dpp_input_csc_matrix {
  49        enum dc_color_space color_space;
  50        uint16_t regval[12];
  51};
  52
  53struct dpp_grph_csc_adjustment {
  54        struct fixed31_32 temperature_matrix[CSC_TEMPERATURE_MATRIX_SIZE];
  55        enum graphics_gamut_adjust_type gamut_adjust_type;
  56};
  57
  58#ifdef CONFIG_DRM_AMD_DC_DCN2_0
  59struct cnv_color_keyer_params {
  60        int color_keyer_en;
  61        int color_keyer_mode;
  62        int color_keyer_alpha_low;
  63        int color_keyer_alpha_high;
  64        int color_keyer_red_low;
  65        int color_keyer_red_high;
  66        int color_keyer_green_low;
  67        int color_keyer_green_high;
  68        int color_keyer_blue_low;
  69        int color_keyer_blue_high;
  70};
  71
  72/* new for dcn2: set the 8bit alpha values based on the 2 bit alpha
  73 *ALPHA_2BIT_LUT. ALPHA_2BIT_LUT0   default: 0b00000000
  74 *ALPHA_2BIT_LUT. ALPHA_2BIT_LUT1   default: 0b01010101
  75 *ALPHA_2BIT_LUT. ALPHA_2BIT_LUT2   default: 0b10101010
  76 *ALPHA_2BIT_LUT. ALPHA_2BIT_LUT3   default: 0b11111111
  77 */
  78struct cnv_alpha_2bit_lut {
  79        int lut0;
  80        int lut1;
  81        int lut2;
  82        int lut3;
  83};
  84#endif
  85
  86struct dcn_dpp_state {
  87        uint32_t is_enabled;
  88        uint32_t igam_lut_mode;
  89        uint32_t igam_input_format;
  90        uint32_t dgam_lut_mode;
  91        uint32_t rgam_lut_mode;
  92        uint32_t gamut_remap_mode;
  93        uint32_t gamut_remap_c11_c12;
  94        uint32_t gamut_remap_c13_c14;
  95        uint32_t gamut_remap_c21_c22;
  96        uint32_t gamut_remap_c23_c24;
  97        uint32_t gamut_remap_c31_c32;
  98        uint32_t gamut_remap_c33_c34;
  99};
 100
 101struct CM_bias_params {
 102        uint32_t cm_bias_cr_r;
 103        uint32_t cm_bias_y_g;
 104        uint32_t cm_bias_cb_b;
 105        uint32_t cm_bias_format;
 106};
 107
 108struct dpp_funcs {
 109
 110        void (*dpp_program_cm_dealpha)(struct dpp *dpp_base,
 111                uint32_t enable, uint32_t additive_blending);
 112
 113        void (*dpp_program_cm_bias)(
 114                struct dpp *dpp_base,
 115                struct CM_bias_params *bias_params);
 116
 117        void (*dpp_read_state)(struct dpp *dpp, struct dcn_dpp_state *s);
 118
 119        void (*dpp_reset)(struct dpp *dpp);
 120
 121        void (*dpp_set_scaler)(struct dpp *dpp,
 122                        const struct scaler_data *scl_data);
 123
 124        void (*dpp_set_pixel_storage_depth)(
 125                        struct dpp *dpp,
 126                        enum lb_pixel_depth depth,
 127                        const struct bit_depth_reduction_params *bit_depth_params);
 128
 129        bool (*dpp_get_optimal_number_of_taps)(
 130                        struct dpp *dpp,
 131                        struct scaler_data *scl_data,
 132                        const struct scaling_taps *in_taps);
 133
 134        void (*dpp_set_gamut_remap)(
 135                        struct dpp *dpp,
 136                        const struct dpp_grph_csc_adjustment *adjust);
 137
 138        void (*dpp_set_csc_default)(
 139                struct dpp *dpp,
 140                enum dc_color_space colorspace);
 141
 142        void (*dpp_set_csc_adjustment)(
 143                struct dpp *dpp,
 144                const uint16_t *regval);
 145
 146        void (*dpp_power_on_regamma_lut)(
 147                struct dpp *dpp,
 148                bool power_on);
 149
 150        void (*dpp_program_regamma_lut)(
 151                        struct dpp *dpp,
 152                        const struct pwl_result_data *rgb,
 153                        uint32_t num);
 154
 155        void (*dpp_configure_regamma_lut)(
 156                        struct dpp *dpp,
 157                        bool is_ram_a);
 158
 159        void (*dpp_program_regamma_lutb_settings)(
 160                        struct dpp *dpp,
 161                        const struct pwl_params *params);
 162
 163        void (*dpp_program_regamma_luta_settings)(
 164                        struct dpp *dpp,
 165                        const struct pwl_params *params);
 166
 167        void (*dpp_program_regamma_pwl)(
 168                struct dpp *dpp,
 169                const struct pwl_params *params,
 170                enum opp_regamma mode);
 171
 172        void (*dpp_program_bias_and_scale)(
 173                        struct dpp *dpp,
 174                        struct dc_bias_and_scale *params);
 175
 176        void (*dpp_set_degamma)(
 177                        struct dpp *dpp_base,
 178                        enum ipp_degamma_mode mode);
 179
 180        void (*dpp_program_input_lut)(
 181                        struct dpp *dpp_base,
 182                        const struct dc_gamma *gamma);
 183
 184        void (*dpp_program_degamma_pwl)(struct dpp *dpp_base,
 185                                                                         const struct pwl_params *params);
 186
 187        void (*dpp_setup)(
 188                        struct dpp *dpp_base,
 189                        enum surface_pixel_format format,
 190                        enum expansion_mode mode,
 191                        struct dc_csc_transform input_csc_color_matrix,
 192#ifdef CONFIG_DRM_AMD_DC_DCN2_0
 193                        enum dc_color_space input_color_space,
 194                        struct cnv_alpha_2bit_lut *alpha_2bit_lut);
 195#else
 196                        enum dc_color_space input_color_space);
 197#endif
 198
 199        void (*dpp_full_bypass)(struct dpp *dpp_base);
 200
 201        void (*set_cursor_attributes)(
 202                        struct dpp *dpp_base,
 203                        enum dc_cursor_color_format color_format);
 204
 205        void (*set_cursor_position)(
 206                        struct dpp *dpp_base,
 207                        const struct dc_cursor_position *pos,
 208                        const struct dc_cursor_mi_param *param,
 209                        uint32_t width,
 210                        uint32_t height
 211                        );
 212
 213        void (*dpp_set_hdr_multiplier)(
 214                        struct dpp *dpp_base,
 215                        uint32_t multiplier);
 216
 217        void (*set_optional_cursor_attributes)(
 218                        struct dpp *dpp_base,
 219                        struct dpp_cursor_attributes *attr);
 220
 221        void (*dpp_dppclk_control)(
 222                        struct dpp *dpp_base,
 223                        bool dppclk_div,
 224                        bool enable);
 225
 226#if defined(CONFIG_DRM_AMD_DC_DCN2_0)
 227        bool (*dpp_program_blnd_lut)(
 228                        struct dpp *dpp,
 229                        const struct pwl_params *params);
 230        bool (*dpp_program_shaper_lut)(
 231                        struct dpp *dpp,
 232                        const struct pwl_params *params);
 233        bool (*dpp_program_3dlut)(
 234                        struct dpp *dpp,
 235                        struct tetrahedral_params *params);
 236        void (*dpp_cnv_set_alpha_keyer)(
 237                        struct dpp *dpp_base,
 238                        struct cnv_color_keyer_params *color_keyer);
 239#endif
 240};
 241
 242
 243
 244#endif
 245