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7#ifndef _KOMEDA_DEV_H_
8#define _KOMEDA_DEV_H_
9
10#include <linux/device.h>
11#include <linux/clk.h>
12#include "komeda_pipeline.h"
13#include "malidp_product.h"
14#include "komeda_format_caps.h"
15
16#define KOMEDA_EVENT_VSYNC BIT_ULL(0)
17#define KOMEDA_EVENT_FLIP BIT_ULL(1)
18#define KOMEDA_EVENT_URUN BIT_ULL(2)
19#define KOMEDA_EVENT_IBSY BIT_ULL(3)
20#define KOMEDA_EVENT_OVR BIT_ULL(4)
21#define KOMEDA_EVENT_EOW BIT_ULL(5)
22#define KOMEDA_EVENT_MODE BIT_ULL(6)
23
24#define KOMEDA_ERR_TETO BIT_ULL(14)
25#define KOMEDA_ERR_TEMR BIT_ULL(15)
26#define KOMEDA_ERR_TITR BIT_ULL(16)
27#define KOMEDA_ERR_CPE BIT_ULL(17)
28#define KOMEDA_ERR_CFGE BIT_ULL(18)
29#define KOMEDA_ERR_AXIE BIT_ULL(19)
30#define KOMEDA_ERR_ACE0 BIT_ULL(20)
31#define KOMEDA_ERR_ACE1 BIT_ULL(21)
32#define KOMEDA_ERR_ACE2 BIT_ULL(22)
33#define KOMEDA_ERR_ACE3 BIT_ULL(23)
34#define KOMEDA_ERR_DRIFTTO BIT_ULL(24)
35#define KOMEDA_ERR_FRAMETO BIT_ULL(25)
36#define KOMEDA_ERR_CSCE BIT_ULL(26)
37#define KOMEDA_ERR_ZME BIT_ULL(27)
38#define KOMEDA_ERR_MERR BIT_ULL(28)
39#define KOMEDA_ERR_TCF BIT_ULL(29)
40#define KOMEDA_ERR_TTNG BIT_ULL(30)
41#define KOMEDA_ERR_TTF BIT_ULL(31)
42
43
44enum {
45 MALI_D71 = 0,
46};
47
48
49enum {
50 KOMEDA_OF_PORT_OUTPUT = 0,
51 KOMEDA_OF_PORT_COPROC = 1,
52};
53
54struct komeda_chip_info {
55 u32 arch_id;
56 u32 core_id;
57 u32 core_info;
58 u32 bus_width;
59};
60
61struct komeda_product_data {
62 u32 product_id;
63 const struct komeda_dev_funcs *(*identify)(u32 __iomem *reg,
64 struct komeda_chip_info *info);
65};
66
67struct komeda_dev;
68
69struct komeda_events {
70 u64 global;
71 u64 pipes[KOMEDA_MAX_PIPELINES];
72};
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78
79struct komeda_dev_funcs {
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86 void (*init_format_table)(struct komeda_dev *mdev);
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92 int (*enum_resources)(struct komeda_dev *mdev);
93
94 void (*cleanup)(struct komeda_dev *mdev);
95
96 int (*connect_iommu)(struct komeda_dev *mdev);
97
98 int (*disconnect_iommu)(struct komeda_dev *mdev);
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103
104 irqreturn_t (*irq_handler)(struct komeda_dev *mdev,
105 struct komeda_events *events);
106
107 int (*enable_irq)(struct komeda_dev *mdev);
108
109 int (*disable_irq)(struct komeda_dev *mdev);
110
111 void (*on_off_vblank)(struct komeda_dev *mdev,
112 int master_pipe, bool on);
113
114
115 void (*dump_register)(struct komeda_dev *mdev, struct seq_file *seq);
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120
121 int (*change_opmode)(struct komeda_dev *mdev, int new_mode);
122
123 void (*flush)(struct komeda_dev *mdev,
124 int master_pipe, u32 active_pipes);
125};
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135
136
137enum {
138 KOMEDA_MODE_INACTIVE = 0,
139 KOMEDA_MODE_DISP0 = BIT(0),
140 KOMEDA_MODE_DISP1 = BIT(1),
141 KOMEDA_MODE_DUAL_DISP = KOMEDA_MODE_DISP0 | KOMEDA_MODE_DISP1,
142};
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150
151struct komeda_dev {
152
153 struct device *dev;
154
155 u32 __iomem *reg_base;
156
157 struct device_dma_parameters dma_parms;
158
159
160 struct komeda_chip_info chip;
161
162 struct komeda_format_caps_table fmt_tbl;
163
164 struct clk *aclk;
165
166
167 int irq;
168
169
170 struct mutex lock;
171
172 u32 dpmode;
173
174
175 int n_pipelines;
176
177 struct komeda_pipeline *pipelines[KOMEDA_MAX_PIPELINES];
178
179
180 const struct komeda_dev_funcs *funcs;
181
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185
186
187 void *chip_data;
188
189
190 struct iommu_domain *iommu;
191
192
193 struct dentry *debugfs_root;
194};
195
196static inline bool
197komeda_product_match(struct komeda_dev *mdev, u32 target)
198{
199 return MALIDP_CORE_ID_PRODUCT_ID(mdev->chip.core_id) == target;
200}
201
202const struct komeda_dev_funcs *
203d71_identify(u32 __iomem *reg, struct komeda_chip_info *chip);
204
205struct komeda_dev *komeda_dev_create(struct device *dev);
206void komeda_dev_destroy(struct komeda_dev *mdev);
207
208struct komeda_dev *dev_to_mdev(struct device *dev);
209
210#endif
211