LXR linux/drivers/gpu/drm/arm/malidp

   1/* SPDX-License-Identifier: GPL-2.0-only */
   2/*
   3 * (C) COPYRIGHT 2016 ARM Limited. All rights reserved.
   4 * Author: Liviu Dudau <Liviu.Dudau@arm.com>
   5 *
   6 * ARM Mali DP500/DP550/DP650 KMS/DRM driver structures
   7 */
   8
   9#ifndef __MALIDP_DRV_H__
  10#define __MALIDP_DRV_H__
  11
  12#include <drm/drm_writeback.h>
  13#include <drm/drm_encoder.h>
  14#include <linux/mutex.h>
  15#include <linux/wait.h>
  16#include <linux/spinlock.h>
  17#include <drm/drmP.h>
  18#include "malidp_hw.h"
  19
  20#define MALIDP_CONFIG_VALID_INIT        0
  21#define MALIDP_CONFIG_VALID_DONE        1
  22#define MALIDP_CONFIG_START             0xd0
  23
  24struct malidp_error_stats {
  25        s32 num_errors;
  26        u32 last_error_status;
  27        s64 last_error_vblank;
  28};
  29
  30struct malidp_drm {
  31        struct malidp_hw_device *dev;
  32        struct drm_crtc crtc;
  33        struct drm_writeback_connector mw_connector;
  34        wait_queue_head_t wq;
  35        struct drm_pending_vblank_event *event;
  36        atomic_t config_valid;
  37        u32 core_id;
  38#ifdef CONFIG_DEBUG_FS
  39        struct malidp_error_stats de_errors;
  40        struct malidp_error_stats se_errors;
  41        /* Protects errors stats */
  42        spinlock_t errors_lock;
  43#endif
  44};
  45
  46#define crtc_to_malidp_device(x) container_of(x, struct malidp_drm, crtc)
  47
  48struct malidp_plane {
  49        struct drm_plane base;
  50        struct malidp_hw_device *hwdev;
  51        const struct malidp_layer *layer;
  52};
  53
  54enum mmu_prefetch_mode {
  55        MALIDP_PREFETCH_MODE_NONE,
  56        MALIDP_PREFETCH_MODE_PARTIAL,
  57        MALIDP_PREFETCH_MODE_FULL,
  58};
  59
  60struct malidp_plane_state {
  61        struct drm_plane_state base;
  62
  63        /* size of the required rotation memory if plane is rotated */
  64        u32 rotmem_size;
  65        /* internal format ID */
  66        u8 format;
  67        u8 n_planes;
  68        enum mmu_prefetch_mode mmu_prefetch_mode;
  69        u32 mmu_prefetch_pgsize;
  70};
  71
  72#define to_malidp_plane(x) container_of(x, struct malidp_plane, base)
  73#define to_malidp_plane_state(x) container_of(x, struct malidp_plane_state, base)
  74
  75struct malidp_crtc_state {
  76        struct drm_crtc_state base;
  77        u32 gamma_coeffs[MALIDP_COEFFTAB_NUM_COEFFS];
  78        u32 coloradj_coeffs[MALIDP_COLORADJ_NUM_COEFFS];
  79        struct malidp_se_config scaler_config;
  80        /* Bitfield of all the planes that have requested a scaled output. */
  81        u8 scaled_planes_mask;
  82};
  83
  84#define to_malidp_crtc_state(x) container_of(x, struct malidp_crtc_state, base)
  85
  86int malidp_de_planes_init(struct drm_device *drm);
  87int malidp_crtc_init(struct drm_device *drm);
  88
  89bool malidp_hw_format_is_linear_only(u32 format);
  90bool malidp_hw_format_is_afbc_only(u32 format);
  91
  92bool malidp_format_mod_supported(struct drm_device *drm,
  93                                 u32 format, u64 modifier);
  94
  95#ifdef CONFIG_DEBUG_FS
  96void malidp_error(struct malidp_drm *malidp,
  97                  struct malidp_error_stats *error_stats, u32 status,
  98                  u64 vblank);
  99#endif
 100
 101/* often used combination of rotational bits */
 102#define MALIDP_ROTATED_MASK     (DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_270)
 103
 104#endif  /* __MALIDP_DRV_H__ */
 105