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4
5
6#include <linux/clk.h>
7#include <linux/gpio/consumer.h>
8#include <linux/i2c.h>
9#include <linux/iopoll.h>
10#include <linux/module.h>
11#include <linux/of_graph.h>
12#include <linux/pm_runtime.h>
13#include <linux/regmap.h>
14#include <linux/regulator/consumer.h>
15
16#include <drm/drm_atomic.h>
17#include <drm/drm_atomic_helper.h>
18#include <drm/drm_dp_helper.h>
19#include <drm/drm_mipi_dsi.h>
20#include <drm/drm_of.h>
21#include <drm/drm_panel.h>
22#include <drm/drm_print.h>
23#include <drm/drm_probe_helper.h>
24
25#define SN_DEVICE_REV_REG 0x08
26#define SN_DPPLL_SRC_REG 0x0A
27#define DPPLL_CLK_SRC_DSICLK BIT(0)
28#define REFCLK_FREQ_MASK GENMASK(3, 1)
29#define REFCLK_FREQ(x) ((x) << 1)
30#define DPPLL_SRC_DP_PLL_LOCK BIT(7)
31#define SN_PLL_ENABLE_REG 0x0D
32#define SN_DSI_LANES_REG 0x10
33#define CHA_DSI_LANES_MASK GENMASK(4, 3)
34#define CHA_DSI_LANES(x) ((x) << 3)
35#define SN_DSIA_CLK_FREQ_REG 0x12
36#define SN_CHA_ACTIVE_LINE_LENGTH_LOW_REG 0x20
37#define SN_CHA_VERTICAL_DISPLAY_SIZE_LOW_REG 0x24
38#define SN_CHA_HSYNC_PULSE_WIDTH_LOW_REG 0x2C
39#define SN_CHA_HSYNC_PULSE_WIDTH_HIGH_REG 0x2D
40#define CHA_HSYNC_POLARITY BIT(7)
41#define SN_CHA_VSYNC_PULSE_WIDTH_LOW_REG 0x30
42#define SN_CHA_VSYNC_PULSE_WIDTH_HIGH_REG 0x31
43#define CHA_VSYNC_POLARITY BIT(7)
44#define SN_CHA_HORIZONTAL_BACK_PORCH_REG 0x34
45#define SN_CHA_VERTICAL_BACK_PORCH_REG 0x36
46#define SN_CHA_HORIZONTAL_FRONT_PORCH_REG 0x38
47#define SN_CHA_VERTICAL_FRONT_PORCH_REG 0x3A
48#define SN_ENH_FRAME_REG 0x5A
49#define VSTREAM_ENABLE BIT(3)
50#define SN_DATA_FORMAT_REG 0x5B
51#define SN_HPD_DISABLE_REG 0x5C
52#define HPD_DISABLE BIT(0)
53#define SN_AUX_WDATA_REG(x) (0x64 + (x))
54#define SN_AUX_ADDR_19_16_REG 0x74
55#define SN_AUX_ADDR_15_8_REG 0x75
56#define SN_AUX_ADDR_7_0_REG 0x76
57#define SN_AUX_LENGTH_REG 0x77
58#define SN_AUX_CMD_REG 0x78
59#define AUX_CMD_SEND BIT(0)
60#define AUX_CMD_REQ(x) ((x) << 4)
61#define SN_AUX_RDATA_REG(x) (0x79 + (x))
62#define SN_SSC_CONFIG_REG 0x93
63#define DP_NUM_LANES_MASK GENMASK(5, 4)
64#define DP_NUM_LANES(x) ((x) << 4)
65#define SN_DATARATE_CONFIG_REG 0x94
66#define DP_DATARATE_MASK GENMASK(7, 5)
67#define DP_DATARATE(x) ((x) << 5)
68#define SN_ML_TX_MODE_REG 0x96
69#define ML_TX_MAIN_LINK_OFF 0
70#define ML_TX_NORMAL_MODE BIT(0)
71#define SN_AUX_CMD_STATUS_REG 0xF4
72#define AUX_IRQ_STATUS_AUX_RPLY_TOUT BIT(3)
73#define AUX_IRQ_STATUS_AUX_SHORT BIT(5)
74#define AUX_IRQ_STATUS_NAT_I2C_FAIL BIT(6)
75
76#define MIN_DSI_CLK_FREQ_MHZ 40
77
78
79#define DP_CLK_FUDGE_NUM 10
80#define DP_CLK_FUDGE_DEN 8
81
82
83#define SN_AUX_MAX_PAYLOAD_BYTES 16
84
85#define SN_REGULATOR_SUPPLY_NUM 4
86
87struct ti_sn_bridge {
88 struct device *dev;
89 struct regmap *regmap;
90 struct drm_dp_aux aux;
91 struct drm_bridge bridge;
92 struct drm_connector connector;
93 struct device_node *host_node;
94 struct mipi_dsi_device *dsi;
95 struct clk *refclk;
96 struct drm_panel *panel;
97 struct gpio_desc *enable_gpio;
98 struct regulator_bulk_data supplies[SN_REGULATOR_SUPPLY_NUM];
99};
100
101static const struct regmap_range ti_sn_bridge_volatile_ranges[] = {
102 { .range_min = 0, .range_max = 0xFF },
103};
104
105static const struct regmap_access_table ti_sn_bridge_volatile_table = {
106 .yes_ranges = ti_sn_bridge_volatile_ranges,
107 .n_yes_ranges = ARRAY_SIZE(ti_sn_bridge_volatile_ranges),
108};
109
110static const struct regmap_config ti_sn_bridge_regmap_config = {
111 .reg_bits = 8,
112 .val_bits = 8,
113 .volatile_table = &ti_sn_bridge_volatile_table,
114 .cache_type = REGCACHE_NONE,
115};
116
117static void ti_sn_bridge_write_u16(struct ti_sn_bridge *pdata,
118 unsigned int reg, u16 val)
119{
120 regmap_write(pdata->regmap, reg, val & 0xFF);
121 regmap_write(pdata->regmap, reg + 1, val >> 8);
122}
123
124static int __maybe_unused ti_sn_bridge_resume(struct device *dev)
125{
126 struct ti_sn_bridge *pdata = dev_get_drvdata(dev);
127 int ret;
128
129 ret = regulator_bulk_enable(SN_REGULATOR_SUPPLY_NUM, pdata->supplies);
130 if (ret) {
131 DRM_ERROR("failed to enable supplies %d\n", ret);
132 return ret;
133 }
134
135 gpiod_set_value(pdata->enable_gpio, 1);
136
137 return ret;
138}
139
140static int __maybe_unused ti_sn_bridge_suspend(struct device *dev)
141{
142 struct ti_sn_bridge *pdata = dev_get_drvdata(dev);
143 int ret;
144
145 gpiod_set_value(pdata->enable_gpio, 0);
146
147 ret = regulator_bulk_disable(SN_REGULATOR_SUPPLY_NUM, pdata->supplies);
148 if (ret)
149 DRM_ERROR("failed to disable supplies %d\n", ret);
150
151 return ret;
152}
153
154static const struct dev_pm_ops ti_sn_bridge_pm_ops = {
155 SET_RUNTIME_PM_OPS(ti_sn_bridge_suspend, ti_sn_bridge_resume, NULL)
156};
157
158
159static struct ti_sn_bridge *
160connector_to_ti_sn_bridge(struct drm_connector *connector)
161{
162 return container_of(connector, struct ti_sn_bridge, connector);
163}
164
165static int ti_sn_bridge_connector_get_modes(struct drm_connector *connector)
166{
167 struct ti_sn_bridge *pdata = connector_to_ti_sn_bridge(connector);
168
169 return drm_panel_get_modes(pdata->panel);
170}
171
172static enum drm_mode_status
173ti_sn_bridge_connector_mode_valid(struct drm_connector *connector,
174 struct drm_display_mode *mode)
175{
176
177 if (mode->clock > 594000)
178 return MODE_CLOCK_HIGH;
179
180 return MODE_OK;
181}
182
183static struct drm_connector_helper_funcs ti_sn_bridge_connector_helper_funcs = {
184 .get_modes = ti_sn_bridge_connector_get_modes,
185 .mode_valid = ti_sn_bridge_connector_mode_valid,
186};
187
188static enum drm_connector_status
189ti_sn_bridge_connector_detect(struct drm_connector *connector, bool force)
190{
191
192
193
194
195
196 return connector_status_connected;
197}
198
199static const struct drm_connector_funcs ti_sn_bridge_connector_funcs = {
200 .fill_modes = drm_helper_probe_single_connector_modes,
201 .detect = ti_sn_bridge_connector_detect,
202 .destroy = drm_connector_cleanup,
203 .reset = drm_atomic_helper_connector_reset,
204 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
205 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
206};
207
208static struct ti_sn_bridge *bridge_to_ti_sn_bridge(struct drm_bridge *bridge)
209{
210 return container_of(bridge, struct ti_sn_bridge, bridge);
211}
212
213static int ti_sn_bridge_parse_regulators(struct ti_sn_bridge *pdata)
214{
215 unsigned int i;
216 const char * const ti_sn_bridge_supply_names[] = {
217 "vcca", "vcc", "vccio", "vpll",
218 };
219
220 for (i = 0; i < SN_REGULATOR_SUPPLY_NUM; i++)
221 pdata->supplies[i].supply = ti_sn_bridge_supply_names[i];
222
223 return devm_regulator_bulk_get(pdata->dev, SN_REGULATOR_SUPPLY_NUM,
224 pdata->supplies);
225}
226
227static int ti_sn_bridge_attach(struct drm_bridge *bridge)
228{
229 int ret, val;
230 struct ti_sn_bridge *pdata = bridge_to_ti_sn_bridge(bridge);
231 struct mipi_dsi_host *host;
232 struct mipi_dsi_device *dsi;
233 const struct mipi_dsi_device_info info = { .type = "ti_sn_bridge",
234 .channel = 0,
235 .node = NULL,
236 };
237
238 ret = drm_connector_init(bridge->dev, &pdata->connector,
239 &ti_sn_bridge_connector_funcs,
240 DRM_MODE_CONNECTOR_eDP);
241 if (ret) {
242 DRM_ERROR("Failed to initialize connector with drm\n");
243 return ret;
244 }
245
246 drm_connector_helper_add(&pdata->connector,
247 &ti_sn_bridge_connector_helper_funcs);
248 drm_connector_attach_encoder(&pdata->connector, bridge->encoder);
249
250
251
252
253
254
255
256
257
258
259
260
261 host = of_find_mipi_dsi_host_by_node(pdata->host_node);
262 if (!host) {
263 DRM_ERROR("failed to find dsi host\n");
264 ret = -ENODEV;
265 goto err_dsi_host;
266 }
267
268 dsi = mipi_dsi_device_register_full(host, &info);
269 if (IS_ERR(dsi)) {
270 DRM_ERROR("failed to create dsi device\n");
271 ret = PTR_ERR(dsi);
272 goto err_dsi_host;
273 }
274
275
276 dsi->lanes = 4;
277 dsi->format = MIPI_DSI_FMT_RGB888;
278 dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
279 MIPI_DSI_MODE_EOT_PACKET | MIPI_DSI_MODE_VIDEO_HSE;
280
281
282 pm_runtime_get_sync(pdata->dev);
283 regmap_read(pdata->regmap, SN_DPPLL_SRC_REG, &val);
284 pm_runtime_put(pdata->dev);
285 if (!(val & DPPLL_CLK_SRC_DSICLK))
286 dsi->mode_flags |= MIPI_DSI_CLOCK_NON_CONTINUOUS;
287
288 ret = mipi_dsi_attach(dsi);
289 if (ret < 0) {
290 DRM_ERROR("failed to attach dsi to host\n");
291 goto err_dsi_attach;
292 }
293 pdata->dsi = dsi;
294
295
296 drm_panel_attach(pdata->panel, &pdata->connector);
297
298 return 0;
299
300err_dsi_attach:
301 mipi_dsi_device_unregister(dsi);
302err_dsi_host:
303 drm_connector_cleanup(&pdata->connector);
304 return ret;
305}
306
307static void ti_sn_bridge_disable(struct drm_bridge *bridge)
308{
309 struct ti_sn_bridge *pdata = bridge_to_ti_sn_bridge(bridge);
310
311 drm_panel_disable(pdata->panel);
312
313
314 regmap_update_bits(pdata->regmap, SN_ENH_FRAME_REG, VSTREAM_ENABLE, 0);
315
316 regmap_write(pdata->regmap, SN_ML_TX_MODE_REG, 0);
317
318 regmap_write(pdata->regmap, SN_PLL_ENABLE_REG, 0);
319
320 drm_panel_unprepare(pdata->panel);
321}
322
323static u32 ti_sn_bridge_get_dsi_freq(struct ti_sn_bridge *pdata)
324{
325 u32 bit_rate_khz, clk_freq_khz;
326 struct drm_display_mode *mode =
327 &pdata->bridge.encoder->crtc->state->adjusted_mode;
328
329 bit_rate_khz = mode->clock *
330 mipi_dsi_pixel_format_to_bpp(pdata->dsi->format);
331 clk_freq_khz = bit_rate_khz / (pdata->dsi->lanes * 2);
332
333 return clk_freq_khz;
334}
335
336
337static const u32 ti_sn_bridge_refclk_lut[] = {
338 12000000,
339 19200000,
340 26000000,
341 27000000,
342 38400000,
343};
344
345
346static const u32 ti_sn_bridge_dsiclk_lut[] = {
347 468000000,
348 384000000,
349 416000000,
350 486000000,
351 460800000,
352};
353
354static void ti_sn_bridge_set_refclk_freq(struct ti_sn_bridge *pdata)
355{
356 int i;
357 u32 refclk_rate;
358 const u32 *refclk_lut;
359 size_t refclk_lut_size;
360
361 if (pdata->refclk) {
362 refclk_rate = clk_get_rate(pdata->refclk);
363 refclk_lut = ti_sn_bridge_refclk_lut;
364 refclk_lut_size = ARRAY_SIZE(ti_sn_bridge_refclk_lut);
365 clk_prepare_enable(pdata->refclk);
366 } else {
367 refclk_rate = ti_sn_bridge_get_dsi_freq(pdata) * 1000;
368 refclk_lut = ti_sn_bridge_dsiclk_lut;
369 refclk_lut_size = ARRAY_SIZE(ti_sn_bridge_dsiclk_lut);
370 }
371
372
373 for (i = 0; i < refclk_lut_size; i++)
374 if (refclk_lut[i] == refclk_rate)
375 break;
376
377 regmap_update_bits(pdata->regmap, SN_DPPLL_SRC_REG, REFCLK_FREQ_MASK,
378 REFCLK_FREQ(i));
379}
380
381
382
383
384
385
386static const unsigned int ti_sn_bridge_dp_rate_lut[] = {
387 0, 1620, 2160, 2430, 2700, 3240, 4320, 5400
388};
389
390static void ti_sn_bridge_set_dsi_dp_rate(struct ti_sn_bridge *pdata)
391{
392 unsigned int bit_rate_mhz, clk_freq_mhz, dp_rate_mhz;
393 unsigned int val, i;
394 struct drm_display_mode *mode =
395 &pdata->bridge.encoder->crtc->state->adjusted_mode;
396
397
398 bit_rate_mhz = (mode->clock / 1000) *
399 mipi_dsi_pixel_format_to_bpp(pdata->dsi->format);
400 clk_freq_mhz = bit_rate_mhz / (pdata->dsi->lanes * 2);
401
402
403 val = (MIN_DSI_CLK_FREQ_MHZ / 5) +
404 (((clk_freq_mhz - MIN_DSI_CLK_FREQ_MHZ) / 5) & 0xFF);
405 regmap_write(pdata->regmap, SN_DSIA_CLK_FREQ_REG, val);
406
407
408 dp_rate_mhz = ((bit_rate_mhz / pdata->dsi->lanes) * DP_CLK_FUDGE_NUM) /
409 DP_CLK_FUDGE_DEN;
410 for (i = 0; i < ARRAY_SIZE(ti_sn_bridge_dp_rate_lut) - 1; i++)
411 if (ti_sn_bridge_dp_rate_lut[i] > dp_rate_mhz)
412 break;
413
414 regmap_update_bits(pdata->regmap, SN_DATARATE_CONFIG_REG,
415 DP_DATARATE_MASK, DP_DATARATE(i));
416}
417
418static void ti_sn_bridge_set_video_timings(struct ti_sn_bridge *pdata)
419{
420 struct drm_display_mode *mode =
421 &pdata->bridge.encoder->crtc->state->adjusted_mode;
422 u8 hsync_polarity = 0, vsync_polarity = 0;
423
424 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
425 hsync_polarity = CHA_HSYNC_POLARITY;
426 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
427 vsync_polarity = CHA_VSYNC_POLARITY;
428
429 ti_sn_bridge_write_u16(pdata, SN_CHA_ACTIVE_LINE_LENGTH_LOW_REG,
430 mode->hdisplay);
431 ti_sn_bridge_write_u16(pdata, SN_CHA_VERTICAL_DISPLAY_SIZE_LOW_REG,
432 mode->vdisplay);
433 regmap_write(pdata->regmap, SN_CHA_HSYNC_PULSE_WIDTH_LOW_REG,
434 (mode->hsync_end - mode->hsync_start) & 0xFF);
435 regmap_write(pdata->regmap, SN_CHA_HSYNC_PULSE_WIDTH_HIGH_REG,
436 (((mode->hsync_end - mode->hsync_start) >> 8) & 0x7F) |
437 hsync_polarity);
438 regmap_write(pdata->regmap, SN_CHA_VSYNC_PULSE_WIDTH_LOW_REG,
439 (mode->vsync_end - mode->vsync_start) & 0xFF);
440 regmap_write(pdata->regmap, SN_CHA_VSYNC_PULSE_WIDTH_HIGH_REG,
441 (((mode->vsync_end - mode->vsync_start) >> 8) & 0x7F) |
442 vsync_polarity);
443
444 regmap_write(pdata->regmap, SN_CHA_HORIZONTAL_BACK_PORCH_REG,
445 (mode->htotal - mode->hsync_end) & 0xFF);
446 regmap_write(pdata->regmap, SN_CHA_VERTICAL_BACK_PORCH_REG,
447 (mode->vtotal - mode->vsync_end) & 0xFF);
448
449 regmap_write(pdata->regmap, SN_CHA_HORIZONTAL_FRONT_PORCH_REG,
450 (mode->hsync_start - mode->hdisplay) & 0xFF);
451 regmap_write(pdata->regmap, SN_CHA_VERTICAL_FRONT_PORCH_REG,
452 (mode->vsync_start - mode->vdisplay) & 0xFF);
453
454 usleep_range(10000, 10500);
455}
456
457static void ti_sn_bridge_enable(struct drm_bridge *bridge)
458{
459 struct ti_sn_bridge *pdata = bridge_to_ti_sn_bridge(bridge);
460 unsigned int val;
461 int ret;
462
463
464 val = CHA_DSI_LANES(4 - pdata->dsi->lanes);
465 regmap_update_bits(pdata->regmap, SN_DSI_LANES_REG,
466 CHA_DSI_LANES_MASK, val);
467
468
469 val = DP_NUM_LANES(pdata->dsi->lanes - 1);
470 regmap_update_bits(pdata->regmap, SN_SSC_CONFIG_REG, DP_NUM_LANES_MASK,
471 val);
472
473
474 ti_sn_bridge_set_dsi_dp_rate(pdata);
475
476
477 regmap_write(pdata->regmap, SN_PLL_ENABLE_REG, 1);
478
479 ret = regmap_read_poll_timeout(pdata->regmap, SN_DPPLL_SRC_REG, val,
480 val & DPPLL_SRC_DP_PLL_LOCK, 1000,
481 50 * 1000);
482 if (ret) {
483 DRM_ERROR("DP_PLL_LOCK polling failed (%d)\n", ret);
484 return;
485 }
486
487
488
489
490
491
492
493 drm_dp_dpcd_writeb(&pdata->aux, DP_EDP_CONFIGURATION_SET,
494 DP_ALTERNATE_SCRAMBLER_RESET_ENABLE);
495
496
497 regmap_write(pdata->regmap, SN_ML_TX_MODE_REG, 0x0A);
498 ret = regmap_read_poll_timeout(pdata->regmap, SN_ML_TX_MODE_REG, val,
499 val == ML_TX_MAIN_LINK_OFF ||
500 val == ML_TX_NORMAL_MODE, 1000,
501 500 * 1000);
502 if (ret) {
503 DRM_ERROR("Training complete polling failed (%d)\n", ret);
504 return;
505 } else if (val == ML_TX_MAIN_LINK_OFF) {
506 DRM_ERROR("Link training failed, link is off\n");
507 return;
508 }
509
510
511 ti_sn_bridge_set_video_timings(pdata);
512
513
514 regmap_update_bits(pdata->regmap, SN_ENH_FRAME_REG, VSTREAM_ENABLE,
515 VSTREAM_ENABLE);
516
517 drm_panel_enable(pdata->panel);
518}
519
520static void ti_sn_bridge_pre_enable(struct drm_bridge *bridge)
521{
522 struct ti_sn_bridge *pdata = bridge_to_ti_sn_bridge(bridge);
523
524 pm_runtime_get_sync(pdata->dev);
525
526
527 ti_sn_bridge_set_refclk_freq(pdata);
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545 regmap_update_bits(pdata->regmap, SN_HPD_DISABLE_REG, HPD_DISABLE,
546 HPD_DISABLE);
547
548 drm_panel_prepare(pdata->panel);
549}
550
551static void ti_sn_bridge_post_disable(struct drm_bridge *bridge)
552{
553 struct ti_sn_bridge *pdata = bridge_to_ti_sn_bridge(bridge);
554
555 if (pdata->refclk)
556 clk_disable_unprepare(pdata->refclk);
557
558 pm_runtime_put_sync(pdata->dev);
559}
560
561static const struct drm_bridge_funcs ti_sn_bridge_funcs = {
562 .attach = ti_sn_bridge_attach,
563 .pre_enable = ti_sn_bridge_pre_enable,
564 .enable = ti_sn_bridge_enable,
565 .disable = ti_sn_bridge_disable,
566 .post_disable = ti_sn_bridge_post_disable,
567};
568
569static struct ti_sn_bridge *aux_to_ti_sn_bridge(struct drm_dp_aux *aux)
570{
571 return container_of(aux, struct ti_sn_bridge, aux);
572}
573
574static ssize_t ti_sn_aux_transfer(struct drm_dp_aux *aux,
575 struct drm_dp_aux_msg *msg)
576{
577 struct ti_sn_bridge *pdata = aux_to_ti_sn_bridge(aux);
578 u32 request = msg->request & ~DP_AUX_I2C_MOT;
579 u32 request_val = AUX_CMD_REQ(msg->request);
580 u8 *buf = (u8 *)msg->buffer;
581 unsigned int val;
582 int ret, i;
583
584 if (msg->size > SN_AUX_MAX_PAYLOAD_BYTES)
585 return -EINVAL;
586
587 switch (request) {
588 case DP_AUX_NATIVE_WRITE:
589 case DP_AUX_I2C_WRITE:
590 case DP_AUX_NATIVE_READ:
591 case DP_AUX_I2C_READ:
592 regmap_write(pdata->regmap, SN_AUX_CMD_REG, request_val);
593 break;
594 default:
595 return -EINVAL;
596 }
597
598 regmap_write(pdata->regmap, SN_AUX_ADDR_19_16_REG,
599 (msg->address >> 16) & 0xF);
600 regmap_write(pdata->regmap, SN_AUX_ADDR_15_8_REG,
601 (msg->address >> 8) & 0xFF);
602 regmap_write(pdata->regmap, SN_AUX_ADDR_7_0_REG, msg->address & 0xFF);
603
604 regmap_write(pdata->regmap, SN_AUX_LENGTH_REG, msg->size);
605
606 if (request == DP_AUX_NATIVE_WRITE || request == DP_AUX_I2C_WRITE) {
607 for (i = 0; i < msg->size; i++)
608 regmap_write(pdata->regmap, SN_AUX_WDATA_REG(i),
609 buf[i]);
610 }
611
612 regmap_write(pdata->regmap, SN_AUX_CMD_REG, request_val | AUX_CMD_SEND);
613
614 ret = regmap_read_poll_timeout(pdata->regmap, SN_AUX_CMD_REG, val,
615 !(val & AUX_CMD_SEND), 200,
616 50 * 1000);
617 if (ret)
618 return ret;
619
620 ret = regmap_read(pdata->regmap, SN_AUX_CMD_STATUS_REG, &val);
621 if (ret)
622 return ret;
623 else if ((val & AUX_IRQ_STATUS_NAT_I2C_FAIL)
624 || (val & AUX_IRQ_STATUS_AUX_RPLY_TOUT)
625 || (val & AUX_IRQ_STATUS_AUX_SHORT))
626 return -ENXIO;
627
628 if (request == DP_AUX_NATIVE_WRITE || request == DP_AUX_I2C_WRITE)
629 return msg->size;
630
631 for (i = 0; i < msg->size; i++) {
632 unsigned int val;
633 ret = regmap_read(pdata->regmap, SN_AUX_RDATA_REG(i),
634 &val);
635 if (ret)
636 return ret;
637
638 WARN_ON(val & ~0xFF);
639 buf[i] = (u8)(val & 0xFF);
640 }
641
642 return msg->size;
643}
644
645static int ti_sn_bridge_parse_dsi_host(struct ti_sn_bridge *pdata)
646{
647 struct device_node *np = pdata->dev->of_node;
648
649 pdata->host_node = of_graph_get_remote_node(np, 0, 0);
650
651 if (!pdata->host_node) {
652 DRM_ERROR("remote dsi host node not found\n");
653 return -ENODEV;
654 }
655
656 return 0;
657}
658
659static int ti_sn_bridge_probe(struct i2c_client *client,
660 const struct i2c_device_id *id)
661{
662 struct ti_sn_bridge *pdata;
663 int ret;
664
665 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
666 DRM_ERROR("device doesn't support I2C\n");
667 return -ENODEV;
668 }
669
670 pdata = devm_kzalloc(&client->dev, sizeof(struct ti_sn_bridge),
671 GFP_KERNEL);
672 if (!pdata)
673 return -ENOMEM;
674
675 pdata->regmap = devm_regmap_init_i2c(client,
676 &ti_sn_bridge_regmap_config);
677 if (IS_ERR(pdata->regmap)) {
678 DRM_ERROR("regmap i2c init failed\n");
679 return PTR_ERR(pdata->regmap);
680 }
681
682 pdata->dev = &client->dev;
683
684 ret = drm_of_find_panel_or_bridge(pdata->dev->of_node, 1, 0,
685 &pdata->panel, NULL);
686 if (ret) {
687 DRM_ERROR("could not find any panel node\n");
688 return ret;
689 }
690
691 dev_set_drvdata(&client->dev, pdata);
692
693 pdata->enable_gpio = devm_gpiod_get(pdata->dev, "enable",
694 GPIOD_OUT_LOW);
695 if (IS_ERR(pdata->enable_gpio)) {
696 DRM_ERROR("failed to get enable gpio from DT\n");
697 ret = PTR_ERR(pdata->enable_gpio);
698 return ret;
699 }
700
701 ret = ti_sn_bridge_parse_regulators(pdata);
702 if (ret) {
703 DRM_ERROR("failed to parse regulators\n");
704 return ret;
705 }
706
707 pdata->refclk = devm_clk_get(pdata->dev, "refclk");
708 if (IS_ERR(pdata->refclk)) {
709 ret = PTR_ERR(pdata->refclk);
710 if (ret == -EPROBE_DEFER)
711 return ret;
712 DRM_DEBUG_KMS("refclk not found\n");
713 pdata->refclk = NULL;
714 }
715
716 ret = ti_sn_bridge_parse_dsi_host(pdata);
717 if (ret)
718 return ret;
719
720 pm_runtime_enable(pdata->dev);
721
722 i2c_set_clientdata(client, pdata);
723
724 pdata->aux.name = "ti-sn65dsi86-aux";
725 pdata->aux.dev = pdata->dev;
726 pdata->aux.transfer = ti_sn_aux_transfer;
727 drm_dp_aux_register(&pdata->aux);
728
729 pdata->bridge.funcs = &ti_sn_bridge_funcs;
730 pdata->bridge.of_node = client->dev.of_node;
731
732 drm_bridge_add(&pdata->bridge);
733
734 return 0;
735}
736
737static int ti_sn_bridge_remove(struct i2c_client *client)
738{
739 struct ti_sn_bridge *pdata = i2c_get_clientdata(client);
740
741 if (!pdata)
742 return -EINVAL;
743
744 of_node_put(pdata->host_node);
745
746 pm_runtime_disable(pdata->dev);
747
748 if (pdata->dsi) {
749 mipi_dsi_detach(pdata->dsi);
750 mipi_dsi_device_unregister(pdata->dsi);
751 }
752
753 drm_bridge_remove(&pdata->bridge);
754
755 return 0;
756}
757
758static struct i2c_device_id ti_sn_bridge_id[] = {
759 { "ti,sn65dsi86", 0},
760 {},
761};
762MODULE_DEVICE_TABLE(i2c, ti_sn_bridge_id);
763
764static const struct of_device_id ti_sn_bridge_match_table[] = {
765 {.compatible = "ti,sn65dsi86"},
766 {},
767};
768MODULE_DEVICE_TABLE(of, ti_sn_bridge_match_table);
769
770static struct i2c_driver ti_sn_bridge_driver = {
771 .driver = {
772 .name = "ti_sn65dsi86",
773 .of_match_table = ti_sn_bridge_match_table,
774 .pm = &ti_sn_bridge_pm_ops,
775 },
776 .probe = ti_sn_bridge_probe,
777 .remove = ti_sn_bridge_remove,
778 .id_table = ti_sn_bridge_id,
779};
780module_i2c_driver(ti_sn_bridge_driver);
781
782MODULE_AUTHOR("Sandeep Panda <spanda@codeaurora.org>");
783MODULE_DESCRIPTION("sn65dsi86 DSI to eDP bridge driver");
784MODULE_LICENSE("GPL v2");
785