LXR linux/drivers/gpu/drm/i915/display/intel

   1/*
   2 * Copyright © 2013 Intel Corporation
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice (including the next
  12 * paragraph) shall be included in all copies or substantial portions of the
  13 * Software.
  14 *
  15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21 * DEALINGS IN THE SOFTWARE.
  22 */
  23
  24#ifndef _INTEL_DSI_H
  25#define _INTEL_DSI_H
  26
  27#include <drm/drm_crtc.h>
  28#include <drm/drm_mipi_dsi.h>
  29#include "intel_drv.h"
  30
  31#define INTEL_DSI_VIDEO_MODE    0
  32#define INTEL_DSI_COMMAND_MODE  1
  33
  34/* Dual Link support */
  35#define DSI_DUAL_LINK_NONE              0
  36#define DSI_DUAL_LINK_FRONT_BACK        1
  37#define DSI_DUAL_LINK_PIXEL_ALT         2
  38
  39struct intel_dsi_host;
  40
  41struct intel_dsi {
  42        struct intel_encoder base;
  43
  44        struct intel_dsi_host *dsi_hosts[I915_MAX_PORTS];
  45        intel_wakeref_t io_wakeref[I915_MAX_PORTS];
  46
  47        /* GPIO Desc for CRC based Panel control */
  48        struct gpio_desc *gpio_panel;
  49
  50        struct intel_connector *attached_connector;
  51
  52        /* bit mask of ports being driven */
  53        u16 ports;
  54
  55        /* if true, use HS mode, otherwise LP */
  56        bool hs;
  57
  58        /* virtual channel */
  59        int channel;
  60
  61        /* Video mode or command mode */
  62        u16 operation_mode;
  63
  64        /* number of DSI lanes */
  65        unsigned int lane_count;
  66
  67        /*
  68         * video mode pixel format
  69         *
  70         * XXX: consolidate on .format in struct mipi_dsi_device.
  71         */
  72        enum mipi_dsi_pixel_format pixel_format;
  73
  74        /* video mode format for MIPI_VIDEO_MODE_FORMAT register */
  75        u32 video_mode_format;
  76
  77        /* eot for MIPI_EOT_DISABLE register */
  78        u8 eotp_pkt;
  79        u8 clock_stop;
  80
  81        u8 escape_clk_div;
  82        u8 dual_link;
  83
  84        u16 dcs_backlight_ports;
  85        u16 dcs_cabc_ports;
  86
  87        /* RGB or BGR */
  88        bool bgr_enabled;
  89
  90        u8 pixel_overlap;
  91        u32 port_bits;
  92        u32 bw_timer;
  93        u32 dphy_reg;
  94
  95        /* data lanes dphy timing */
  96        u32 dphy_data_lane_reg;
  97        u32 video_frmt_cfg_bits;
  98        u16 lp_byte_clk;
  99
 100        /* timeouts in byte clocks */
 101        u16 hs_tx_timeout;
 102        u16 lp_rx_timeout;
 103        u16 turn_arnd_val;
 104        u16 rst_timer_val;
 105        u16 hs_to_lp_count;
 106        u16 clk_lp_to_hs_count;
 107        u16 clk_hs_to_lp_count;
 108
 109        u16 init_count;
 110        u32 pclk;
 111        u16 burst_mode_ratio;
 112
 113        /* all delays in ms */
 114        u16 backlight_off_delay;
 115        u16 backlight_on_delay;
 116        u16 panel_on_delay;
 117        u16 panel_off_delay;
 118        u16 panel_pwr_cycle_delay;
 119};
 120
 121struct intel_dsi_host {
 122        struct mipi_dsi_host base;
 123        struct intel_dsi *intel_dsi;
 124        enum port port;
 125
 126        /* our little hack */
 127        struct mipi_dsi_device *device;
 128};
 129
 130static inline struct intel_dsi_host *to_intel_dsi_host(struct mipi_dsi_host *h)
 131{
 132        return container_of(h, struct intel_dsi_host, base);
 133}
 134
 135#define for_each_dsi_port(__port, __ports_mask) for_each_port_masked(__port, __ports_mask)
 136
 137static inline struct intel_dsi *enc_to_intel_dsi(struct drm_encoder *encoder)
 138{
 139        return container_of(encoder, struct intel_dsi, base.base);
 140}
 141
 142static inline bool is_vid_mode(struct intel_dsi *intel_dsi)
 143{
 144        return intel_dsi->operation_mode == INTEL_DSI_VIDEO_MODE;
 145}
 146
 147static inline bool is_cmd_mode(struct intel_dsi *intel_dsi)
 148{
 149        return intel_dsi->operation_mode == INTEL_DSI_COMMAND_MODE;
 150}
 151
 152static inline u16 intel_dsi_encoder_ports(struct intel_encoder *encoder)
 153{
 154        return enc_to_intel_dsi(&encoder->base)->ports;
 155}
 156
 157/* icl_dsi.c */
 158void icl_dsi_init(struct drm_i915_private *dev_priv);
 159
 160/* intel_dsi.c */
 161int intel_dsi_bitrate(const struct intel_dsi *intel_dsi);
 162int intel_dsi_tlpx_ns(const struct intel_dsi *intel_dsi);
 163enum drm_panel_orientation
 164intel_dsi_get_panel_orientation(struct intel_connector *connector);
 165
 166/* vlv_dsi.c */
 167void vlv_dsi_wait_for_fifo_empty(struct intel_dsi *intel_dsi, enum port port);
 168enum mipi_dsi_pixel_format pixel_format_from_register_bits(u32 fmt);
 169int intel_dsi_get_modes(struct drm_connector *connector);
 170enum drm_mode_status intel_dsi_mode_valid(struct drm_connector *connector,
 171                                          struct drm_display_mode *mode);
 172struct intel_dsi_host *intel_dsi_host_init(struct intel_dsi *intel_dsi,
 173                                           const struct mipi_dsi_host_ops *funcs,
 174                                           enum port port);
 175void vlv_dsi_init(struct drm_i915_private *dev_priv);
 176
 177/* vlv_dsi_pll.c */
 178int vlv_dsi_pll_compute(struct intel_encoder *encoder,
 179                        struct intel_crtc_state *config);
 180void vlv_dsi_pll_enable(struct intel_encoder *encoder,
 181                        const struct intel_crtc_state *config);
 182void vlv_dsi_pll_disable(struct intel_encoder *encoder);
 183u32 vlv_dsi_get_pclk(struct intel_encoder *encoder,
 184                     struct intel_crtc_state *config);
 185void vlv_dsi_reset_clocks(struct intel_encoder *encoder, enum port port);
 186
 187bool bxt_dsi_pll_is_enabled(struct drm_i915_private *dev_priv);
 188int bxt_dsi_pll_compute(struct intel_encoder *encoder,
 189                        struct intel_crtc_state *config);
 190void bxt_dsi_pll_enable(struct intel_encoder *encoder,
 191                        const struct intel_crtc_state *config);
 192void bxt_dsi_pll_disable(struct intel_encoder *encoder);
 193u32 bxt_dsi_get_pclk(struct intel_encoder *encoder,
 194                     struct intel_crtc_state *config);
 195void bxt_dsi_reset_clocks(struct intel_encoder *encoder, enum port port);
 196
 197/* intel_dsi_vbt.c */
 198bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id);
 199void intel_dsi_vbt_exec_sequence(struct intel_dsi *intel_dsi,
 200                                 enum mipi_seq seq_id);
 201void intel_dsi_msleep(struct intel_dsi *intel_dsi, int msec);
 202void intel_dsi_log_params(struct intel_dsi *intel_dsi);
 203
 204#endif /* _INTEL_DSI_H */
 205