LXR linux/drivers/gpu/drm/i915/gem/i915_gem_object

   1// SPDX-License-Identifier: MIT
   2/*
   3 * Copyright © 2019 Intel Corporation
   4 */
   5
   6#include "i915_gem_object_blt.h"
   7
   8#include "i915_gem_clflush.h"
   9#include "intel_drv.h"
  10
  11int intel_emit_vma_fill_blt(struct i915_request *rq,
  12                            struct i915_vma *vma,
  13                            u32 value)
  14{
  15        u32 *cs;
  16
  17        cs = intel_ring_begin(rq, 8);
  18        if (IS_ERR(cs))
  19                return PTR_ERR(cs);
  20
  21        if (INTEL_GEN(rq->i915) >= 8) {
  22                *cs++ = XY_COLOR_BLT_CMD | BLT_WRITE_RGBA | (7 - 2);
  23                *cs++ = BLT_DEPTH_32 | BLT_ROP_COLOR_COPY | PAGE_SIZE;
  24                *cs++ = 0;
  25                *cs++ = vma->size >> PAGE_SHIFT << 16 | PAGE_SIZE / 4;
  26                *cs++ = lower_32_bits(vma->node.start);
  27                *cs++ = upper_32_bits(vma->node.start);
  28                *cs++ = value;
  29                *cs++ = MI_NOOP;
  30        } else {
  31                *cs++ = XY_COLOR_BLT_CMD | BLT_WRITE_RGBA | (6 - 2);
  32                *cs++ = BLT_DEPTH_32 | BLT_ROP_COLOR_COPY | PAGE_SIZE;
  33                *cs++ = 0;
  34                *cs++ = vma->size >> PAGE_SHIFT << 16 | PAGE_SIZE / 4;
  35                *cs++ = vma->node.start;
  36                *cs++ = value;
  37                *cs++ = MI_NOOP;
  38                *cs++ = MI_NOOP;
  39        }
  40
  41        intel_ring_advance(rq, cs);
  42
  43        return 0;
  44}
  45
  46int i915_gem_object_fill_blt(struct drm_i915_gem_object *obj,
  47                             struct intel_context *ce,
  48                             u32 value)
  49{
  50        struct drm_i915_private *i915 = to_i915(obj->base.dev);
  51        struct i915_gem_context *ctx = ce->gem_context;
  52        struct i915_address_space *vm = ctx->vm ?: &i915->ggtt.vm;
  53        struct i915_request *rq;
  54        struct i915_vma *vma;
  55        int err;
  56
  57        /* XXX: ce->vm please */
  58        vma = i915_vma_instance(obj, vm, NULL);
  59        if (IS_ERR(vma))
  60                return PTR_ERR(vma);
  61
  62        err = i915_vma_pin(vma, 0, 0, PIN_USER);
  63        if (unlikely(err))
  64                return err;
  65
  66        if (obj->cache_dirty & ~obj->cache_coherent) {
  67                i915_gem_object_lock(obj);
  68                i915_gem_clflush_object(obj, 0);
  69                i915_gem_object_unlock(obj);
  70        }
  71
  72        rq = i915_request_create(ce);
  73        if (IS_ERR(rq)) {
  74                err = PTR_ERR(rq);
  75                goto out_unpin;
  76        }
  77
  78        err = i915_request_await_object(rq, obj, true);
  79        if (unlikely(err))
  80                goto out_request;
  81
  82        if (ce->engine->emit_init_breadcrumb) {
  83                err = ce->engine->emit_init_breadcrumb(rq);
  84                if (unlikely(err))
  85                        goto out_request;
  86        }
  87
  88        i915_vma_lock(vma);
  89        err = i915_vma_move_to_active(vma, rq, EXEC_OBJECT_WRITE);
  90        i915_vma_unlock(vma);
  91        if (unlikely(err))
  92                goto out_request;
  93
  94        err = intel_emit_vma_fill_blt(rq, vma, value);
  95out_request:
  96        if (unlikely(err))
  97                i915_request_skip(rq, err);
  98
  99        i915_request_add(rq);
 100out_unpin:
 101        i915_vma_unpin(vma);
 102        return err;
 103}
 104
 105#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
 106#include "selftests/i915_gem_object_blt.c"
 107#endif
 108