linux/drivers/gpu/drm/mgag200/mgag200_drv.h
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   1/* SPDX-License-Identifier: GPL-2.0-only */
   2/*
   3 * Copyright 2010 Matt Turner.
   4 * Copyright 2012 Red Hat
   5 *
   6 * Authors: Matthew Garrett
   7 *          Matt Turner
   8 *          Dave Airlie
   9 */
  10#ifndef __MGAG200_DRV_H__
  11#define __MGAG200_DRV_H__
  12
  13#include <video/vga.h>
  14
  15#include <drm/drm_encoder.h>
  16#include <drm/drm_fb_helper.h>
  17
  18#include <drm/drm_gem.h>
  19#include <drm/drm_gem_vram_helper.h>
  20
  21#include <drm/drm_vram_mm_helper.h>
  22
  23#include <linux/i2c.h>
  24#include <linux/i2c-algo-bit.h>
  25
  26#include "mgag200_reg.h"
  27
  28#define DRIVER_AUTHOR           "Matthew Garrett"
  29
  30#define DRIVER_NAME             "mgag200"
  31#define DRIVER_DESC             "MGA G200 SE"
  32#define DRIVER_DATE             "20110418"
  33
  34#define DRIVER_MAJOR            1
  35#define DRIVER_MINOR            0
  36#define DRIVER_PATCHLEVEL       0
  37
  38#define MGAG200FB_CONN_LIMIT 1
  39
  40#define RREG8(reg) ioread8(((void __iomem *)mdev->rmmio) + (reg))
  41#define WREG8(reg, v) iowrite8(v, ((void __iomem *)mdev->rmmio) + (reg))
  42#define RREG32(reg) ioread32(((void __iomem *)mdev->rmmio) + (reg))
  43#define WREG32(reg, v) iowrite32(v, ((void __iomem *)mdev->rmmio) + (reg))
  44
  45#define ATTR_INDEX 0x1fc0
  46#define ATTR_DATA 0x1fc1
  47
  48#define WREG_ATTR(reg, v)                                       \
  49        do {                                                    \
  50                RREG8(0x1fda);                                  \
  51                WREG8(ATTR_INDEX, reg);                         \
  52                WREG8(ATTR_DATA, v);                            \
  53        } while (0)                                             \
  54
  55#define WREG_SEQ(reg, v)                                        \
  56        do {                                                    \
  57                WREG8(MGAREG_SEQ_INDEX, reg);                   \
  58                WREG8(MGAREG_SEQ_DATA, v);                      \
  59        } while (0)                                             \
  60
  61#define WREG_CRT(reg, v)                                        \
  62        do {                                                    \
  63                WREG8(MGAREG_CRTC_INDEX, reg);                  \
  64                WREG8(MGAREG_CRTC_DATA, v);                     \
  65        } while (0)                                             \
  66
  67
  68#define WREG_ECRT(reg, v)                                       \
  69        do {                                                    \
  70                WREG8(MGAREG_CRTCEXT_INDEX, reg);                               \
  71                WREG8(MGAREG_CRTCEXT_DATA, v);                          \
  72        } while (0)                                             \
  73
  74#define GFX_INDEX 0x1fce
  75#define GFX_DATA 0x1fcf
  76
  77#define WREG_GFX(reg, v)                                        \
  78        do {                                                    \
  79                WREG8(GFX_INDEX, reg);                          \
  80                WREG8(GFX_DATA, v);                             \
  81        } while (0)                                             \
  82
  83#define DAC_INDEX 0x3c00
  84#define DAC_DATA 0x3c0a
  85
  86#define WREG_DAC(reg, v)                                        \
  87        do {                                                    \
  88                WREG8(DAC_INDEX, reg);                          \
  89                WREG8(DAC_DATA, v);                             \
  90        } while (0)                                             \
  91
  92#define MGA_MISC_OUT 0x1fc2
  93#define MGA_MISC_IN 0x1fcc
  94
  95#define MGAG200_MAX_FB_HEIGHT 4096
  96#define MGAG200_MAX_FB_WIDTH 4096
  97
  98#define MATROX_DPMS_CLEARED (-1)
  99
 100#define to_mga_crtc(x) container_of(x, struct mga_crtc, base)
 101#define to_mga_encoder(x) container_of(x, struct mga_encoder, base)
 102#define to_mga_connector(x) container_of(x, struct mga_connector, base)
 103#define to_mga_framebuffer(x) container_of(x, struct mga_framebuffer, base)
 104
 105struct mga_framebuffer {
 106        struct drm_framebuffer base;
 107        struct drm_gem_object *obj;
 108};
 109
 110struct mga_fbdev {
 111        struct drm_fb_helper helper; /* must be first */
 112        struct mga_framebuffer mfb;
 113        void *sysram;
 114        int size;
 115        int x1, y1, x2, y2; /* dirty rect */
 116        spinlock_t dirty_lock;
 117};
 118
 119struct mga_crtc {
 120        struct drm_crtc base;
 121        u8 lut_r[256], lut_g[256], lut_b[256];
 122        int last_dpms;
 123        bool enabled;
 124};
 125
 126struct mga_mode_info {
 127        bool mode_config_initialized;
 128        struct mga_crtc *crtc;
 129};
 130
 131struct mga_encoder {
 132        struct drm_encoder base;
 133        int last_dpms;
 134};
 135
 136
 137struct mga_i2c_chan {
 138        struct i2c_adapter adapter;
 139        struct drm_device *dev;
 140        struct i2c_algo_bit_data bit;
 141        int data, clock;
 142};
 143
 144struct mga_connector {
 145        struct drm_connector base;
 146        struct mga_i2c_chan *i2c;
 147};
 148
 149struct mga_cursor {
 150        /*
 151           We have to have 2 buffers for the cursor to avoid occasional
 152           corruption while switching cursor icons.
 153           If either of these is NULL, then don't do hardware cursors, and
 154           fall back to software.
 155        */
 156        struct drm_gem_vram_object *pixels_1;
 157        struct drm_gem_vram_object *pixels_2;
 158        /* The currently displayed icon, this points to one of pixels_1, or pixels_2 */
 159        struct drm_gem_vram_object *pixels_current;
 160};
 161
 162struct mga_mc {
 163        resource_size_t                 vram_size;
 164        resource_size_t                 vram_base;
 165        resource_size_t                 vram_window;
 166};
 167
 168enum mga_type {
 169        G200_SE_A,
 170        G200_SE_B,
 171        G200_WB,
 172        G200_EV,
 173        G200_EH,
 174        G200_EH3,
 175        G200_ER,
 176        G200_EW3,
 177};
 178
 179#define IS_G200_SE(mdev) (mdev->type == G200_SE_A || mdev->type == G200_SE_B)
 180
 181struct mga_device {
 182        struct drm_device               *dev;
 183        unsigned long                   flags;
 184
 185        resource_size_t                 rmmio_base;
 186        resource_size_t                 rmmio_size;
 187        void __iomem                    *rmmio;
 188
 189        struct mga_mc                   mc;
 190        struct mga_mode_info            mode_info;
 191
 192        struct mga_fbdev *mfbdev;
 193        struct mga_cursor cursor;
 194
 195        bool                            suspended;
 196        int                             num_crtc;
 197        enum mga_type                   type;
 198        int                             has_sdram;
 199        struct drm_display_mode         mode;
 200
 201        int bpp_shifts[4];
 202
 203        int fb_mtrr;
 204
 205        /* SE model number stored in reg 0x1e24 */
 206        u32 unique_rev_id;
 207};
 208
 209                                /* mgag200_mode.c */
 210int mgag200_modeset_init(struct mga_device *mdev);
 211void mgag200_modeset_fini(struct mga_device *mdev);
 212
 213                                /* mgag200_fb.c */
 214int mgag200_fbdev_init(struct mga_device *mdev);
 215void mgag200_fbdev_fini(struct mga_device *mdev);
 216
 217                                /* mgag200_main.c */
 218int mgag200_framebuffer_init(struct drm_device *dev,
 219                             struct mga_framebuffer *mfb,
 220                             const struct drm_mode_fb_cmd2 *mode_cmd,
 221                             struct drm_gem_object *obj);
 222
 223
 224int mgag200_driver_load(struct drm_device *dev, unsigned long flags);
 225void mgag200_driver_unload(struct drm_device *dev);
 226int mgag200_gem_create(struct drm_device *dev,
 227                   u32 size, bool iskernel,
 228                       struct drm_gem_object **obj);
 229int mgag200_dumb_create(struct drm_file *file,
 230                        struct drm_device *dev,
 231                        struct drm_mode_create_dumb *args);
 232
 233                                /* mgag200_i2c.c */
 234struct mga_i2c_chan *mgag200_i2c_create(struct drm_device *dev);
 235void mgag200_i2c_destroy(struct mga_i2c_chan *i2c);
 236
 237int mgag200_mm_init(struct mga_device *mdev);
 238void mgag200_mm_fini(struct mga_device *mdev);
 239int mgag200_mmap(struct file *filp, struct vm_area_struct *vma);
 240
 241int mga_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
 242                                                uint32_t handle, uint32_t width, uint32_t height);
 243int mga_crtc_cursor_move(struct drm_crtc *crtc, int x, int y);
 244
 245#endif                          /* __MGAG200_DRV_H__ */
 246