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6
7#include <drm/drm_print.h>
8
9#include "msm_drv.h"
10#include "mdp4_kms.h"
11
12void mdp4_set_irqmask(struct mdp_kms *mdp_kms, uint32_t irqmask,
13 uint32_t old_irqmask)
14{
15 mdp4_write(to_mdp4_kms(mdp_kms), REG_MDP4_INTR_CLEAR,
16 irqmask ^ (irqmask & old_irqmask));
17 mdp4_write(to_mdp4_kms(mdp_kms), REG_MDP4_INTR_ENABLE, irqmask);
18}
19
20static void mdp4_irq_error_handler(struct mdp_irq *irq, uint32_t irqstatus)
21{
22 struct mdp4_kms *mdp4_kms = container_of(irq, struct mdp4_kms, error_handler);
23 static DEFINE_RATELIMIT_STATE(rs, 5*HZ, 1);
24 extern bool dumpstate;
25
26 DRM_ERROR_RATELIMITED("errors: %08x\n", irqstatus);
27
28 if (dumpstate && __ratelimit(&rs)) {
29 struct drm_printer p = drm_info_printer(mdp4_kms->dev->dev);
30 drm_state_dump(mdp4_kms->dev, &p);
31 }
32}
33
34void mdp4_irq_preinstall(struct msm_kms *kms)
35{
36 struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
37 mdp4_enable(mdp4_kms);
38 mdp4_write(mdp4_kms, REG_MDP4_INTR_CLEAR, 0xffffffff);
39 mdp4_write(mdp4_kms, REG_MDP4_INTR_ENABLE, 0x00000000);
40 mdp4_disable(mdp4_kms);
41}
42
43int mdp4_irq_postinstall(struct msm_kms *kms)
44{
45 struct mdp_kms *mdp_kms = to_mdp_kms(kms);
46 struct mdp4_kms *mdp4_kms = to_mdp4_kms(mdp_kms);
47 struct mdp_irq *error_handler = &mdp4_kms->error_handler;
48
49 error_handler->irq = mdp4_irq_error_handler;
50 error_handler->irqmask = MDP4_IRQ_PRIMARY_INTF_UDERRUN |
51 MDP4_IRQ_EXTERNAL_INTF_UDERRUN;
52
53 mdp_irq_register(mdp_kms, error_handler);
54
55 return 0;
56}
57
58void mdp4_irq_uninstall(struct msm_kms *kms)
59{
60 struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
61 mdp4_enable(mdp4_kms);
62 mdp4_write(mdp4_kms, REG_MDP4_INTR_ENABLE, 0x00000000);
63 mdp4_disable(mdp4_kms);
64}
65
66irqreturn_t mdp4_irq(struct msm_kms *kms)
67{
68 struct mdp_kms *mdp_kms = to_mdp_kms(kms);
69 struct mdp4_kms *mdp4_kms = to_mdp4_kms(mdp_kms);
70 struct drm_device *dev = mdp4_kms->dev;
71 struct msm_drm_private *priv = dev->dev_private;
72 unsigned int id;
73 uint32_t status, enable;
74
75 enable = mdp4_read(mdp4_kms, REG_MDP4_INTR_ENABLE);
76 status = mdp4_read(mdp4_kms, REG_MDP4_INTR_STATUS) & enable;
77 mdp4_write(mdp4_kms, REG_MDP4_INTR_CLEAR, status);
78
79 VERB("status=%08x", status);
80
81 mdp_dispatch_irqs(mdp_kms, status);
82
83 for (id = 0; id < priv->num_crtcs; id++)
84 if (status & mdp4_crtc_vblank(priv->crtcs[id]))
85 drm_handle_vblank(dev, id);
86
87 return IRQ_HANDLED;
88}
89
90int mdp4_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc)
91{
92 struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
93
94 mdp4_enable(mdp4_kms);
95 mdp_update_vblank_mask(to_mdp_kms(kms),
96 mdp4_crtc_vblank(crtc), true);
97 mdp4_disable(mdp4_kms);
98
99 return 0;
100}
101
102void mdp4_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc)
103{
104 struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
105
106 mdp4_enable(mdp4_kms);
107 mdp_update_vblank_mask(to_mdp_kms(kms),
108 mdp4_crtc_vblank(crtc), false);
109 mdp4_disable(mdp4_kms);
110}
111
