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7#include <drm/drm_damage_helper.h>
8#include "mdp4_kms.h"
9
10#define DOWN_SCALE_MAX 8
11#define UP_SCALE_MAX 8
12
13struct mdp4_plane {
14 struct drm_plane base;
15 const char *name;
16
17 enum mdp4_pipe pipe;
18
19 uint32_t caps;
20 uint32_t nformats;
21 uint32_t formats[32];
22
23 bool enabled;
24};
25#define to_mdp4_plane(x) container_of(x, struct mdp4_plane, base)
26
27
28static inline
29enum mdp4_frame_format mdp4_get_frame_format(struct drm_framebuffer *fb)
30{
31 bool is_tile = false;
32
33 if (fb->modifier == DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
34 is_tile = true;
35
36 if (fb->format->format == DRM_FORMAT_NV12 && is_tile)
37 return FRAME_TILE_YCBCR_420;
38
39 return FRAME_LINEAR;
40}
41
42static void mdp4_plane_set_scanout(struct drm_plane *plane,
43 struct drm_framebuffer *fb);
44static int mdp4_plane_mode_set(struct drm_plane *plane,
45 struct drm_crtc *crtc, struct drm_framebuffer *fb,
46 int crtc_x, int crtc_y,
47 unsigned int crtc_w, unsigned int crtc_h,
48 uint32_t src_x, uint32_t src_y,
49 uint32_t src_w, uint32_t src_h);
50
51static struct mdp4_kms *get_kms(struct drm_plane *plane)
52{
53 struct msm_drm_private *priv = plane->dev->dev_private;
54 return to_mdp4_kms(to_mdp_kms(priv->kms));
55}
56
57static void mdp4_plane_destroy(struct drm_plane *plane)
58{
59 struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
60
61 drm_plane_cleanup(plane);
62
63 kfree(mdp4_plane);
64}
65
66
67static void mdp4_plane_install_properties(struct drm_plane *plane,
68 struct drm_mode_object *obj)
69{
70
71}
72
73static int mdp4_plane_set_property(struct drm_plane *plane,
74 struct drm_property *property, uint64_t val)
75{
76
77 return -EINVAL;
78}
79
80static const struct drm_plane_funcs mdp4_plane_funcs = {
81 .update_plane = drm_atomic_helper_update_plane,
82 .disable_plane = drm_atomic_helper_disable_plane,
83 .destroy = mdp4_plane_destroy,
84 .set_property = mdp4_plane_set_property,
85 .reset = drm_atomic_helper_plane_reset,
86 .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
87 .atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
88};
89
90static void mdp4_plane_cleanup_fb(struct drm_plane *plane,
91 struct drm_plane_state *old_state)
92{
93 struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
94 struct mdp4_kms *mdp4_kms = get_kms(plane);
95 struct msm_kms *kms = &mdp4_kms->base.base;
96 struct drm_framebuffer *fb = old_state->fb;
97
98 if (!fb)
99 return;
100
101 DBG("%s: cleanup: FB[%u]", mdp4_plane->name, fb->base.id);
102 msm_framebuffer_cleanup(fb, kms->aspace);
103}
104
105
106static int mdp4_plane_atomic_check(struct drm_plane *plane,
107 struct drm_plane_state *state)
108{
109 return 0;
110}
111
112static void mdp4_plane_atomic_update(struct drm_plane *plane,
113 struct drm_plane_state *old_state)
114{
115 struct drm_plane_state *state = plane->state;
116 int ret;
117
118 ret = mdp4_plane_mode_set(plane,
119 state->crtc, state->fb,
120 state->crtc_x, state->crtc_y,
121 state->crtc_w, state->crtc_h,
122 state->src_x, state->src_y,
123 state->src_w, state->src_h);
124
125 WARN_ON(ret < 0);
126}
127
128static const struct drm_plane_helper_funcs mdp4_plane_helper_funcs = {
129 .prepare_fb = msm_atomic_prepare_fb,
130 .cleanup_fb = mdp4_plane_cleanup_fb,
131 .atomic_check = mdp4_plane_atomic_check,
132 .atomic_update = mdp4_plane_atomic_update,
133};
134
135static void mdp4_plane_set_scanout(struct drm_plane *plane,
136 struct drm_framebuffer *fb)
137{
138 struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
139 struct mdp4_kms *mdp4_kms = get_kms(plane);
140 struct msm_kms *kms = &mdp4_kms->base.base;
141 enum mdp4_pipe pipe = mdp4_plane->pipe;
142
143 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_STRIDE_A(pipe),
144 MDP4_PIPE_SRC_STRIDE_A_P0(fb->pitches[0]) |
145 MDP4_PIPE_SRC_STRIDE_A_P1(fb->pitches[1]));
146
147 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_STRIDE_B(pipe),
148 MDP4_PIPE_SRC_STRIDE_B_P2(fb->pitches[2]) |
149 MDP4_PIPE_SRC_STRIDE_B_P3(fb->pitches[3]));
150
151 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP0_BASE(pipe),
152 msm_framebuffer_iova(fb, kms->aspace, 0));
153 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP1_BASE(pipe),
154 msm_framebuffer_iova(fb, kms->aspace, 1));
155 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP2_BASE(pipe),
156 msm_framebuffer_iova(fb, kms->aspace, 2));
157 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP3_BASE(pipe),
158 msm_framebuffer_iova(fb, kms->aspace, 3));
159}
160
161static void mdp4_write_csc_config(struct mdp4_kms *mdp4_kms,
162 enum mdp4_pipe pipe, struct csc_cfg *csc)
163{
164 int i;
165
166 for (i = 0; i < ARRAY_SIZE(csc->matrix); i++) {
167 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_MV(pipe, i),
168 csc->matrix[i]);
169 }
170
171 for (i = 0; i < ARRAY_SIZE(csc->post_bias) ; i++) {
172 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_PRE_BV(pipe, i),
173 csc->pre_bias[i]);
174
175 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_POST_BV(pipe, i),
176 csc->post_bias[i]);
177 }
178
179 for (i = 0; i < ARRAY_SIZE(csc->post_clamp) ; i++) {
180 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_PRE_LV(pipe, i),
181 csc->pre_clamp[i]);
182
183 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_POST_LV(pipe, i),
184 csc->post_clamp[i]);
185 }
186}
187
188#define MDP4_VG_PHASE_STEP_DEFAULT 0x20000000
189
190static int mdp4_plane_mode_set(struct drm_plane *plane,
191 struct drm_crtc *crtc, struct drm_framebuffer *fb,
192 int crtc_x, int crtc_y,
193 unsigned int crtc_w, unsigned int crtc_h,
194 uint32_t src_x, uint32_t src_y,
195 uint32_t src_w, uint32_t src_h)
196{
197 struct drm_device *dev = plane->dev;
198 struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
199 struct mdp4_kms *mdp4_kms = get_kms(plane);
200 enum mdp4_pipe pipe = mdp4_plane->pipe;
201 const struct mdp_format *format;
202 uint32_t op_mode = 0;
203 uint32_t phasex_step = MDP4_VG_PHASE_STEP_DEFAULT;
204 uint32_t phasey_step = MDP4_VG_PHASE_STEP_DEFAULT;
205 enum mdp4_frame_format frame_type;
206
207 if (!(crtc && fb)) {
208 DBG("%s: disabled!", mdp4_plane->name);
209 return 0;
210 }
211
212 frame_type = mdp4_get_frame_format(fb);
213
214
215 src_x = src_x >> 16;
216 src_y = src_y >> 16;
217 src_w = src_w >> 16;
218 src_h = src_h >> 16;
219
220 DBG("%s: FB[%u] %u,%u,%u,%u -> CRTC[%u] %d,%d,%u,%u", mdp4_plane->name,
221 fb->base.id, src_x, src_y, src_w, src_h,
222 crtc->base.id, crtc_x, crtc_y, crtc_w, crtc_h);
223
224 format = to_mdp_format(msm_framebuffer_format(fb));
225
226 if (src_w > (crtc_w * DOWN_SCALE_MAX)) {
227 DRM_DEV_ERROR(dev->dev, "Width down scaling exceeds limits!\n");
228 return -ERANGE;
229 }
230
231 if (src_h > (crtc_h * DOWN_SCALE_MAX)) {
232 DRM_DEV_ERROR(dev->dev, "Height down scaling exceeds limits!\n");
233 return -ERANGE;
234 }
235
236 if (crtc_w > (src_w * UP_SCALE_MAX)) {
237 DRM_DEV_ERROR(dev->dev, "Width up scaling exceeds limits!\n");
238 return -ERANGE;
239 }
240
241 if (crtc_h > (src_h * UP_SCALE_MAX)) {
242 DRM_DEV_ERROR(dev->dev, "Height up scaling exceeds limits!\n");
243 return -ERANGE;
244 }
245
246 if (src_w != crtc_w) {
247 uint32_t sel_unit = SCALE_FIR;
248 op_mode |= MDP4_PIPE_OP_MODE_SCALEX_EN;
249
250 if (MDP_FORMAT_IS_YUV(format)) {
251 if (crtc_w > src_w)
252 sel_unit = SCALE_PIXEL_RPT;
253 else if (crtc_w <= (src_w / 4))
254 sel_unit = SCALE_MN_PHASE;
255
256 op_mode |= MDP4_PIPE_OP_MODE_SCALEX_UNIT_SEL(sel_unit);
257 phasex_step = mult_frac(MDP4_VG_PHASE_STEP_DEFAULT,
258 src_w, crtc_w);
259 }
260 }
261
262 if (src_h != crtc_h) {
263 uint32_t sel_unit = SCALE_FIR;
264 op_mode |= MDP4_PIPE_OP_MODE_SCALEY_EN;
265
266 if (MDP_FORMAT_IS_YUV(format)) {
267
268 if (crtc_h > src_h)
269 sel_unit = SCALE_PIXEL_RPT;
270 else if (crtc_h <= (src_h / 4))
271 sel_unit = SCALE_MN_PHASE;
272
273 op_mode |= MDP4_PIPE_OP_MODE_SCALEY_UNIT_SEL(sel_unit);
274 phasey_step = mult_frac(MDP4_VG_PHASE_STEP_DEFAULT,
275 src_h, crtc_h);
276 }
277 }
278
279 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_SIZE(pipe),
280 MDP4_PIPE_SRC_SIZE_WIDTH(src_w) |
281 MDP4_PIPE_SRC_SIZE_HEIGHT(src_h));
282
283 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_XY(pipe),
284 MDP4_PIPE_SRC_XY_X(src_x) |
285 MDP4_PIPE_SRC_XY_Y(src_y));
286
287 mdp4_write(mdp4_kms, REG_MDP4_PIPE_DST_SIZE(pipe),
288 MDP4_PIPE_DST_SIZE_WIDTH(crtc_w) |
289 MDP4_PIPE_DST_SIZE_HEIGHT(crtc_h));
290
291 mdp4_write(mdp4_kms, REG_MDP4_PIPE_DST_XY(pipe),
292 MDP4_PIPE_DST_XY_X(crtc_x) |
293 MDP4_PIPE_DST_XY_Y(crtc_y));
294
295 mdp4_plane_set_scanout(plane, fb);
296
297 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_FORMAT(pipe),
298 MDP4_PIPE_SRC_FORMAT_A_BPC(format->bpc_a) |
299 MDP4_PIPE_SRC_FORMAT_R_BPC(format->bpc_r) |
300 MDP4_PIPE_SRC_FORMAT_G_BPC(format->bpc_g) |
301 MDP4_PIPE_SRC_FORMAT_B_BPC(format->bpc_b) |
302 COND(format->alpha_enable, MDP4_PIPE_SRC_FORMAT_ALPHA_ENABLE) |
303 MDP4_PIPE_SRC_FORMAT_CPP(format->cpp - 1) |
304 MDP4_PIPE_SRC_FORMAT_UNPACK_COUNT(format->unpack_count - 1) |
305 MDP4_PIPE_SRC_FORMAT_FETCH_PLANES(format->fetch_type) |
306 MDP4_PIPE_SRC_FORMAT_CHROMA_SAMP(format->chroma_sample) |
307 MDP4_PIPE_SRC_FORMAT_FRAME_FORMAT(frame_type) |
308 COND(format->unpack_tight, MDP4_PIPE_SRC_FORMAT_UNPACK_TIGHT));
309
310 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_UNPACK(pipe),
311 MDP4_PIPE_SRC_UNPACK_ELEM0(format->unpack[0]) |
312 MDP4_PIPE_SRC_UNPACK_ELEM1(format->unpack[1]) |
313 MDP4_PIPE_SRC_UNPACK_ELEM2(format->unpack[2]) |
314 MDP4_PIPE_SRC_UNPACK_ELEM3(format->unpack[3]));
315
316 if (MDP_FORMAT_IS_YUV(format)) {
317 struct csc_cfg *csc = mdp_get_default_csc_cfg(CSC_YUV2RGB);
318
319 op_mode |= MDP4_PIPE_OP_MODE_SRC_YCBCR;
320 op_mode |= MDP4_PIPE_OP_MODE_CSC_EN;
321 mdp4_write_csc_config(mdp4_kms, pipe, csc);
322 }
323
324 mdp4_write(mdp4_kms, REG_MDP4_PIPE_OP_MODE(pipe), op_mode);
325 mdp4_write(mdp4_kms, REG_MDP4_PIPE_PHASEX_STEP(pipe), phasex_step);
326 mdp4_write(mdp4_kms, REG_MDP4_PIPE_PHASEY_STEP(pipe), phasey_step);
327
328 if (frame_type != FRAME_LINEAR)
329 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SSTILE_FRAME_SIZE(pipe),
330 MDP4_PIPE_SSTILE_FRAME_SIZE_WIDTH(src_w) |
331 MDP4_PIPE_SSTILE_FRAME_SIZE_HEIGHT(src_h));
332
333 return 0;
334}
335
336static const char *pipe_names[] = {
337 "VG1", "VG2",
338 "RGB1", "RGB2", "RGB3",
339 "VG3", "VG4",
340};
341
342enum mdp4_pipe mdp4_plane_pipe(struct drm_plane *plane)
343{
344 struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
345 return mdp4_plane->pipe;
346}
347
348
349struct drm_plane *mdp4_plane_init(struct drm_device *dev,
350 enum mdp4_pipe pipe_id, bool private_plane)
351{
352 struct drm_plane *plane = NULL;
353 struct mdp4_plane *mdp4_plane;
354 int ret;
355 enum drm_plane_type type;
356
357 mdp4_plane = kzalloc(sizeof(*mdp4_plane), GFP_KERNEL);
358 if (!mdp4_plane) {
359 ret = -ENOMEM;
360 goto fail;
361 }
362
363 plane = &mdp4_plane->base;
364
365 mdp4_plane->pipe = pipe_id;
366 mdp4_plane->name = pipe_names[pipe_id];
367 mdp4_plane->caps = mdp4_pipe_caps(pipe_id);
368
369 mdp4_plane->nformats = mdp_get_formats(mdp4_plane->formats,
370 ARRAY_SIZE(mdp4_plane->formats),
371 !pipe_supports_yuv(mdp4_plane->caps));
372
373 type = private_plane ? DRM_PLANE_TYPE_PRIMARY : DRM_PLANE_TYPE_OVERLAY;
374 ret = drm_universal_plane_init(dev, plane, 0xff, &mdp4_plane_funcs,
375 mdp4_plane->formats, mdp4_plane->nformats,
376 NULL, type, NULL);
377 if (ret)
378 goto fail;
379
380 drm_plane_helper_add(plane, &mdp4_plane_helper_funcs);
381
382 mdp4_plane_install_properties(plane, &plane->base);
383
384 drm_plane_enable_fb_damage_clips(plane);
385
386 return plane;
387
388fail:
389 if (plane)
390 mdp4_plane_destroy(plane);
391
392 return ERR_PTR(ret);
393}
394
