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6
7#include <linux/irq.h>
8
9#include <drm/drm_print.h>
10
11#include "msm_drv.h"
12#include "mdp5_kms.h"
13
14void mdp5_set_irqmask(struct mdp_kms *mdp_kms, uint32_t irqmask,
15 uint32_t old_irqmask)
16{
17 mdp5_write(to_mdp5_kms(mdp_kms), REG_MDP5_INTR_CLEAR,
18 irqmask ^ (irqmask & old_irqmask));
19 mdp5_write(to_mdp5_kms(mdp_kms), REG_MDP5_INTR_EN, irqmask);
20}
21
22static void mdp5_irq_error_handler(struct mdp_irq *irq, uint32_t irqstatus)
23{
24 struct mdp5_kms *mdp5_kms = container_of(irq, struct mdp5_kms, error_handler);
25 static DEFINE_RATELIMIT_STATE(rs, 5*HZ, 1);
26 extern bool dumpstate;
27
28 DRM_ERROR_RATELIMITED("errors: %08x\n", irqstatus);
29
30 if (dumpstate && __ratelimit(&rs)) {
31 struct drm_printer p = drm_info_printer(mdp5_kms->dev->dev);
32 drm_state_dump(mdp5_kms->dev, &p);
33 if (mdp5_kms->smp)
34 mdp5_smp_dump(mdp5_kms->smp, &p);
35 }
36}
37
38void mdp5_irq_preinstall(struct msm_kms *kms)
39{
40 struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));
41 struct device *dev = &mdp5_kms->pdev->dev;
42
43 pm_runtime_get_sync(dev);
44 mdp5_write(mdp5_kms, REG_MDP5_INTR_CLEAR, 0xffffffff);
45 mdp5_write(mdp5_kms, REG_MDP5_INTR_EN, 0x00000000);
46 pm_runtime_put_sync(dev);
47}
48
49int mdp5_irq_postinstall(struct msm_kms *kms)
50{
51 struct mdp_kms *mdp_kms = to_mdp_kms(kms);
52 struct mdp5_kms *mdp5_kms = to_mdp5_kms(mdp_kms);
53 struct device *dev = &mdp5_kms->pdev->dev;
54 struct mdp_irq *error_handler = &mdp5_kms->error_handler;
55
56 error_handler->irq = mdp5_irq_error_handler;
57 error_handler->irqmask = MDP5_IRQ_INTF0_UNDER_RUN |
58 MDP5_IRQ_INTF1_UNDER_RUN |
59 MDP5_IRQ_INTF2_UNDER_RUN |
60 MDP5_IRQ_INTF3_UNDER_RUN;
61
62 pm_runtime_get_sync(dev);
63 mdp_irq_register(mdp_kms, error_handler);
64 pm_runtime_put_sync(dev);
65
66 return 0;
67}
68
69void mdp5_irq_uninstall(struct msm_kms *kms)
70{
71 struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));
72 struct device *dev = &mdp5_kms->pdev->dev;
73
74 pm_runtime_get_sync(dev);
75 mdp5_write(mdp5_kms, REG_MDP5_INTR_EN, 0x00000000);
76 pm_runtime_put_sync(dev);
77}
78
79irqreturn_t mdp5_irq(struct msm_kms *kms)
80{
81 struct mdp_kms *mdp_kms = to_mdp_kms(kms);
82 struct mdp5_kms *mdp5_kms = to_mdp5_kms(mdp_kms);
83 struct drm_device *dev = mdp5_kms->dev;
84 struct msm_drm_private *priv = dev->dev_private;
85 unsigned int id;
86 uint32_t status, enable;
87
88 enable = mdp5_read(mdp5_kms, REG_MDP5_INTR_EN);
89 status = mdp5_read(mdp5_kms, REG_MDP5_INTR_STATUS) & enable;
90 mdp5_write(mdp5_kms, REG_MDP5_INTR_CLEAR, status);
91
92 VERB("status=%08x", status);
93
94 mdp_dispatch_irqs(mdp_kms, status);
95
96 for (id = 0; id < priv->num_crtcs; id++)
97 if (status & mdp5_crtc_vblank(priv->crtcs[id]))
98 drm_handle_vblank(dev, id);
99
100 return IRQ_HANDLED;
101}
102
103int mdp5_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc)
104{
105 struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));
106 struct device *dev = &mdp5_kms->pdev->dev;
107
108 pm_runtime_get_sync(dev);
109 mdp_update_vblank_mask(to_mdp_kms(kms),
110 mdp5_crtc_vblank(crtc), true);
111 pm_runtime_put_sync(dev);
112
113 return 0;
114}
115
116void mdp5_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc)
117{
118 struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));
119 struct device *dev = &mdp5_kms->pdev->dev;
120
121 pm_runtime_get_sync(dev);
122 mdp_update_vblank_mask(to_mdp_kms(kms),
123 mdp5_crtc_vblank(crtc), false);
124 pm_runtime_put_sync(dev);
125}
126
