LXR linux/drivers/gpu/drm/nouveau/dispnv50/core507d.c

   1/*
   2 * Copyright 2018 Red Hat Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 */
  22#include "core.h"
  23#include "head.h"
  24
  25#include <nvif/cl507d.h>
  26
  27#include "nouveau_bo.h"
  28
  29void
  30core507d_update(struct nv50_core *core, u32 *interlock, bool ntfy)
  31{
  32        u32 *push;
  33        if ((push = evo_wait(&core->chan, 5))) {
  34                if (ntfy) {
  35                        evo_mthd(push, 0x0084, 1);
  36                        evo_data(push, 0x80000000 | NV50_DISP_CORE_NTFY);
  37                }
  38                evo_mthd(push, 0x0080, 2);
  39                evo_data(push, interlock[NV50_DISP_INTERLOCK_BASE] |
  40                               interlock[NV50_DISP_INTERLOCK_OVLY]);
  41                evo_data(push, 0x00000000);
  42                evo_kick(push, &core->chan);
  43        }
  44}
  45
  46int
  47core507d_ntfy_wait_done(struct nouveau_bo *bo, u32 offset,
  48                        struct nvif_device *device)
  49{
  50        s64 time = nvif_msec(device, 2000ULL,
  51                if (nouveau_bo_rd32(bo, offset / 4))
  52                        break;
  53                usleep_range(1, 2);
  54        );
  55        return time < 0 ? time : 0;
  56}
  57
  58void
  59core507d_ntfy_init(struct nouveau_bo *bo, u32 offset)
  60{
  61        nouveau_bo_wr32(bo, offset / 4, 0x00000000);
  62}
  63
  64void
  65core507d_init(struct nv50_core *core)
  66{
  67        u32 *push;
  68        if ((push = evo_wait(&core->chan, 2))) {
  69                evo_mthd(push, 0x0088, 1);
  70                evo_data(push, core->chan.sync.handle);
  71                evo_kick(push, &core->chan);
  72        }
  73}
  74
  75static const struct nv50_core_func
  76core507d = {
  77        .init = core507d_init,
  78        .ntfy_init = core507d_ntfy_init,
  79        .ntfy_wait_done = core507d_ntfy_wait_done,
  80        .update = core507d_update,
  81        .head = &head507d,
  82        .dac = &dac507d,
  83        .sor = &sor507d,
  84        .pior = &pior507d,
  85};
  86
  87int
  88core507d_new_(const struct nv50_core_func *func, struct nouveau_drm *drm,
  89              s32 oclass, struct nv50_core **pcore)
  90{
  91        struct nv50_disp_core_channel_dma_v0 args = {};
  92        struct nv50_disp *disp = nv50_disp(drm->dev);
  93        struct nv50_core *core;
  94        int ret;
  95
  96        if (!(core = *pcore = kzalloc(sizeof(*core), GFP_KERNEL)))
  97                return -ENOMEM;
  98        core->func = func;
  99
 100        ret = nv50_dmac_create(&drm->client.device, &disp->disp->object,
 101                               &oclass, 0, &args, sizeof(args),
 102                               disp->sync->bo.offset, &core->chan);
 103        if (ret) {
 104                NV_ERROR(drm, "core%04x allocation failed: %d\n", oclass, ret);
 105                return ret;
 106        }
 107
 108        return 0;
 109}
 110
 111int
 112core507d_new(struct nouveau_drm *drm, s32 oclass, struct nv50_core **pcore)
 113{
 114        return core507d_new_(&core507d, drm, oclass, pcore);
 115}
 116