LXR linux/drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gm107.c

   1/*
   2 * Copyright 2014 Red Hat Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * Authors: Ben Skeggs
  23 */
  24#include "priv.h"
  25
  26#include <subdev/fb.h>
  27#include <subdev/timer.h>
  28
  29void
  30gm107_ltc_cbc_clear(struct nvkm_ltc *ltc, u32 start, u32 limit)
  31{
  32        struct nvkm_device *device = ltc->subdev.device;
  33        nvkm_wr32(device, 0x17e270, start);
  34        nvkm_wr32(device, 0x17e274, limit);
  35        nvkm_mask(device, 0x17e26c, 0x00000000, 0x00000004);
  36}
  37
  38void
  39gm107_ltc_cbc_wait(struct nvkm_ltc *ltc)
  40{
  41        struct nvkm_device *device = ltc->subdev.device;
  42        int c, s;
  43        for (c = 0; c < ltc->ltc_nr; c++) {
  44                for (s = 0; s < ltc->lts_nr; s++) {
  45                        const u32 addr = 0x14046c + (c * 0x2000) + (s * 0x200);
  46                        nvkm_wait_msec(device, 2000, addr,
  47                                       0x00000004, 0x00000000);
  48                }
  49        }
  50}
  51
  52void
  53gm107_ltc_zbc_clear_color(struct nvkm_ltc *ltc, int i, const u32 color[4])
  54{
  55        struct nvkm_device *device = ltc->subdev.device;
  56        nvkm_mask(device, 0x17e338, 0x0000000f, i);
  57        nvkm_wr32(device, 0x17e33c, color[0]);
  58        nvkm_wr32(device, 0x17e340, color[1]);
  59        nvkm_wr32(device, 0x17e344, color[2]);
  60        nvkm_wr32(device, 0x17e348, color[3]);
  61}
  62
  63void
  64gm107_ltc_zbc_clear_depth(struct nvkm_ltc *ltc, int i, const u32 depth)
  65{
  66        struct nvkm_device *device = ltc->subdev.device;
  67        nvkm_mask(device, 0x17e338, 0x0000000f, i);
  68        nvkm_wr32(device, 0x17e34c, depth);
  69}
  70
  71void
  72gm107_ltc_intr_lts(struct nvkm_ltc *ltc, int c, int s)
  73{
  74        struct nvkm_subdev *subdev = &ltc->subdev;
  75        struct nvkm_device *device = subdev->device;
  76        u32 base = 0x140400 + (c * 0x2000) + (s * 0x200);
  77        u32 intr = nvkm_rd32(device, base + 0x00c);
  78        u16 stat = intr & 0x0000ffff;
  79        char msg[128];
  80
  81        if (stat) {
  82                nvkm_snprintbf(msg, sizeof(msg), gf100_ltc_lts_intr_name, stat);
  83                nvkm_error(subdev, "LTC%d_LTS%d: %08x [%s]\n", c, s, intr, msg);
  84        }
  85
  86        nvkm_wr32(device, base + 0x00c, intr);
  87}
  88
  89void
  90gm107_ltc_intr(struct nvkm_ltc *ltc)
  91{
  92        struct nvkm_device *device = ltc->subdev.device;
  93        u32 mask;
  94
  95        mask = nvkm_rd32(device, 0x00017c);
  96        while (mask) {
  97                u32 s, c = __ffs(mask);
  98                for (s = 0; s < ltc->lts_nr; s++)
  99                        gm107_ltc_intr_lts(ltc, c, s);
 100                mask &= ~(1 << c);
 101        }
 102}
 103
 104static int
 105gm107_ltc_oneinit(struct nvkm_ltc *ltc)
 106{
 107        struct nvkm_device *device = ltc->subdev.device;
 108        const u32 parts = nvkm_rd32(device, 0x022438);
 109        const u32  mask = nvkm_rd32(device, 0x021c14);
 110        const u32 slice = nvkm_rd32(device, 0x17e280) >> 28;
 111        int i;
 112
 113        for (i = 0; i < parts; i++) {
 114                if (!(mask & (1 << i)))
 115                        ltc->ltc_nr++;
 116        }
 117        ltc->lts_nr = slice;
 118
 119        return gf100_ltc_oneinit_tag_ram(ltc);
 120}
 121
 122static void
 123gm107_ltc_init(struct nvkm_ltc *ltc)
 124{
 125        struct nvkm_device *device = ltc->subdev.device;
 126        u32 lpg128 = !(nvkm_rd32(device, 0x100c80) & 0x00000001);
 127
 128        nvkm_wr32(device, 0x17e27c, ltc->ltc_nr);
 129        nvkm_wr32(device, 0x17e278, ltc->tag_base);
 130        nvkm_mask(device, 0x17e264, 0x00000002, lpg128 ? 0x00000002 : 0x00000000);
 131}
 132
 133static const struct nvkm_ltc_func
 134gm107_ltc = {
 135        .oneinit = gm107_ltc_oneinit,
 136        .init = gm107_ltc_init,
 137        .intr = gm107_ltc_intr,
 138        .cbc_clear = gm107_ltc_cbc_clear,
 139        .cbc_wait = gm107_ltc_cbc_wait,
 140        .zbc = 16,
 141        .zbc_clear_color = gm107_ltc_zbc_clear_color,
 142        .zbc_clear_depth = gm107_ltc_zbc_clear_depth,
 143        .invalidate = gf100_ltc_invalidate,
 144        .flush = gf100_ltc_flush,
 145};
 146
 147int
 148gm107_ltc_new(struct nvkm_device *device, int index, struct nvkm_ltc **pltc)
 149{
 150        return nvkm_ltc_new_(&gm107_ltc, device, index, pltc);
 151}
 152