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24#include "priv.h"
25
26const struct nvkm_mc_map
27nv04_mc_reset[] = {
28 { 0x00001000, NVKM_ENGINE_GR },
29 { 0x00000100, NVKM_ENGINE_FIFO },
30 {}
31};
32
33static const struct nvkm_mc_map
34nv04_mc_intr[] = {
35 { 0x01010000, NVKM_ENGINE_DISP },
36 { 0x00001000, NVKM_ENGINE_GR },
37 { 0x00000100, NVKM_ENGINE_FIFO },
38 { 0x10000000, NVKM_SUBDEV_BUS },
39 { 0x00100000, NVKM_SUBDEV_TIMER },
40 {}
41};
42
43void
44nv04_mc_intr_unarm(struct nvkm_mc *mc)
45{
46 struct nvkm_device *device = mc->subdev.device;
47 nvkm_wr32(device, 0x000140, 0x00000000);
48 nvkm_rd32(device, 0x000140);
49}
50
51void
52nv04_mc_intr_rearm(struct nvkm_mc *mc)
53{
54 struct nvkm_device *device = mc->subdev.device;
55 nvkm_wr32(device, 0x000140, 0x00000001);
56}
57
58u32
59nv04_mc_intr_stat(struct nvkm_mc *mc)
60{
61 return nvkm_rd32(mc->subdev.device, 0x000100);
62}
63
64void
65nv04_mc_init(struct nvkm_mc *mc)
66{
67 struct nvkm_device *device = mc->subdev.device;
68 nvkm_wr32(device, 0x000200, 0xffffffff);
69 nvkm_wr32(device, 0x001850, 0x00000001);
70}
71
72static const struct nvkm_mc_func
73nv04_mc = {
74 .init = nv04_mc_init,
75 .intr = nv04_mc_intr,
76 .intr_unarm = nv04_mc_intr_unarm,
77 .intr_rearm = nv04_mc_intr_rearm,
78 .intr_stat = nv04_mc_intr_stat,
79 .reset = nv04_mc_reset,
80};
81
82int
83nv04_mc_new(struct nvkm_device *device, int index, struct nvkm_mc **pmc)
84{
85 return nvkm_mc_new_(&nv04_mc, device, index, pmc);
86}
87