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7#include <linux/of.h>
8#include <linux/sort.h>
9#include <linux/sys_soc.h>
10
11#include <drm/drm_atomic.h>
12#include <drm/drm_atomic_helper.h>
13#include <drm/drm_fb_helper.h>
14#include <drm/drm_probe_helper.h>
15#include <drm/drm_panel.h>
16
17#include "omap_dmm_tiler.h"
18#include "omap_drv.h"
19
20#define DRIVER_NAME MODULE_NAME
21#define DRIVER_DESC "OMAP DRM"
22#define DRIVER_DATE "20110917"
23#define DRIVER_MAJOR 1
24#define DRIVER_MINOR 0
25#define DRIVER_PATCHLEVEL 0
26
27
28
29
30
31
32
33
34
35
36
37
38
39static void omap_atomic_wait_for_completion(struct drm_device *dev,
40 struct drm_atomic_state *old_state)
41{
42 struct drm_crtc_state *new_crtc_state;
43 struct drm_crtc *crtc;
44 unsigned int i;
45 int ret;
46
47 for_each_new_crtc_in_state(old_state, crtc, new_crtc_state, i) {
48 if (!new_crtc_state->active)
49 continue;
50
51 ret = omap_crtc_wait_pending(crtc);
52
53 if (!ret)
54 dev_warn(dev->dev,
55 "atomic complete timeout (pipe %u)!\n", i);
56 }
57}
58
59static void omap_atomic_commit_tail(struct drm_atomic_state *old_state)
60{
61 struct drm_device *dev = old_state->dev;
62 struct omap_drm_private *priv = dev->dev_private;
63
64 priv->dispc_ops->runtime_get(priv->dispc);
65
66
67 drm_atomic_helper_commit_modeset_disables(dev, old_state);
68
69 if (priv->omaprev != 0x3430) {
70
71
72
73
74
75
76
77
78
79
80
81 drm_atomic_helper_commit_modeset_enables(dev, old_state);
82 omap_atomic_wait_for_completion(dev, old_state);
83
84 drm_atomic_helper_commit_planes(dev, old_state, 0);
85
86 drm_atomic_helper_commit_hw_done(old_state);
87 } else {
88
89
90
91
92
93 drm_atomic_helper_commit_planes(dev, old_state, 0);
94
95 drm_atomic_helper_commit_modeset_enables(dev, old_state);
96
97 drm_atomic_helper_commit_hw_done(old_state);
98 }
99
100
101
102
103
104 omap_atomic_wait_for_completion(dev, old_state);
105
106 drm_atomic_helper_cleanup_planes(dev, old_state);
107
108 priv->dispc_ops->runtime_put(priv->dispc);
109}
110
111static const struct drm_mode_config_helper_funcs omap_mode_config_helper_funcs = {
112 .atomic_commit_tail = omap_atomic_commit_tail,
113};
114
115static const struct drm_mode_config_funcs omap_mode_config_funcs = {
116 .fb_create = omap_framebuffer_create,
117 .output_poll_changed = drm_fb_helper_output_poll_changed,
118 .atomic_check = drm_atomic_helper_check,
119 .atomic_commit = drm_atomic_helper_commit,
120};
121
122static void omap_disconnect_pipelines(struct drm_device *ddev)
123{
124 struct omap_drm_private *priv = ddev->dev_private;
125 unsigned int i;
126
127 for (i = 0; i < priv->num_pipes; i++) {
128 struct omap_drm_pipeline *pipe = &priv->pipes[i];
129
130 if (pipe->output->panel)
131 drm_panel_detach(pipe->output->panel);
132
133 omapdss_device_disconnect(NULL, pipe->output);
134
135 omapdss_device_put(pipe->output);
136 pipe->output = NULL;
137 }
138
139 memset(&priv->channels, 0, sizeof(priv->channels));
140
141 priv->num_pipes = 0;
142}
143
144static int omap_connect_pipelines(struct drm_device *ddev)
145{
146 struct omap_drm_private *priv = ddev->dev_private;
147 struct omap_dss_device *output = NULL;
148 int r;
149
150 for_each_dss_output(output) {
151 r = omapdss_device_connect(priv->dss, NULL, output);
152 if (r == -EPROBE_DEFER) {
153 omapdss_device_put(output);
154 return r;
155 } else if (r) {
156 dev_warn(output->dev, "could not connect output %s\n",
157 output->name);
158 } else {
159 struct omap_drm_pipeline *pipe;
160
161 pipe = &priv->pipes[priv->num_pipes++];
162 pipe->output = omapdss_device_get(output);
163
164 if (priv->num_pipes == ARRAY_SIZE(priv->pipes)) {
165
166 omapdss_device_put(output);
167 break;
168 }
169 }
170 }
171
172 return 0;
173}
174
175static int omap_compare_pipelines(const void *a, const void *b)
176{
177 const struct omap_drm_pipeline *pipe1 = a;
178 const struct omap_drm_pipeline *pipe2 = b;
179
180 if (pipe1->alias_id > pipe2->alias_id)
181 return 1;
182 else if (pipe1->alias_id < pipe2->alias_id)
183 return -1;
184 return 0;
185}
186
187static int omap_modeset_init_properties(struct drm_device *dev)
188{
189 struct omap_drm_private *priv = dev->dev_private;
190 unsigned int num_planes = priv->dispc_ops->get_num_ovls(priv->dispc);
191
192 priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0,
193 num_planes - 1);
194 if (!priv->zorder_prop)
195 return -ENOMEM;
196
197 return 0;
198}
199
200static int omap_display_id(struct omap_dss_device *output)
201{
202 struct device_node *node = NULL;
203
204 if (output->next) {
205 struct omap_dss_device *display;
206
207 display = omapdss_display_get(output);
208 node = display->dev->of_node;
209 omapdss_device_put(display);
210 } else if (output->bridge) {
211 struct drm_bridge *bridge = output->bridge;
212
213 while (bridge->next)
214 bridge = bridge->next;
215
216 node = bridge->of_node;
217 } else if (output->panel) {
218 node = output->panel->dev->of_node;
219 }
220
221 return node ? of_alias_get_id(node, "display") : -ENODEV;
222}
223
224static int omap_modeset_init(struct drm_device *dev)
225{
226 struct omap_drm_private *priv = dev->dev_private;
227 int num_ovls = priv->dispc_ops->get_num_ovls(priv->dispc);
228 int num_mgrs = priv->dispc_ops->get_num_mgrs(priv->dispc);
229 unsigned int i;
230 int ret;
231 u32 plane_crtc_mask;
232
233 if (!omapdss_stack_is_ready())
234 return -EPROBE_DEFER;
235
236 drm_mode_config_init(dev);
237
238 ret = omap_modeset_init_properties(dev);
239 if (ret < 0)
240 return ret;
241
242
243
244
245
246
247
248
249
250 ret = omap_connect_pipelines(dev);
251 if (ret < 0)
252 return ret;
253
254 if (priv->num_pipes > num_mgrs || priv->num_pipes > num_ovls) {
255 dev_err(dev->dev, "%s(): Too many connected displays\n",
256 __func__);
257 return -EINVAL;
258 }
259
260
261 plane_crtc_mask = (1 << priv->num_pipes) - 1;
262
263 for (i = 0; i < num_ovls; i++) {
264 enum drm_plane_type type = i < priv->num_pipes
265 ? DRM_PLANE_TYPE_PRIMARY
266 : DRM_PLANE_TYPE_OVERLAY;
267 struct drm_plane *plane;
268
269 if (WARN_ON(priv->num_planes >= ARRAY_SIZE(priv->planes)))
270 return -EINVAL;
271
272 plane = omap_plane_init(dev, i, type, plane_crtc_mask);
273 if (IS_ERR(plane))
274 return PTR_ERR(plane);
275
276 priv->planes[priv->num_planes++] = plane;
277 }
278
279
280
281
282
283 for (i = 0; i < priv->num_pipes; i++) {
284 struct omap_drm_pipeline *pipe = &priv->pipes[i];
285 int id;
286
287 pipe->encoder = omap_encoder_init(dev, pipe->output);
288 if (!pipe->encoder)
289 return -ENOMEM;
290
291 if (pipe->output->bridge) {
292 ret = drm_bridge_attach(pipe->encoder,
293 pipe->output->bridge, NULL);
294 if (ret < 0)
295 return ret;
296 }
297
298 id = omap_display_id(pipe->output);
299 pipe->alias_id = id >= 0 ? id : i;
300 }
301
302
303 sort(priv->pipes, priv->num_pipes, sizeof(priv->pipes[0]),
304 omap_compare_pipelines, NULL);
305
306
307
308
309
310 for (i = 0; i < priv->num_pipes; ++i) {
311 struct omap_drm_pipeline *pipe = &priv->pipes[i];
312 enum omap_channel channel = pipe->output->dispc_channel;
313
314 if (WARN_ON(priv->channels[channel] != NULL))
315 return -EINVAL;
316
317 priv->channels[channel] = pipe;
318 }
319
320
321 for (i = 0; i < priv->num_pipes; i++) {
322 struct omap_drm_pipeline *pipe = &priv->pipes[i];
323 struct drm_encoder *encoder = pipe->encoder;
324 struct drm_crtc *crtc;
325
326 if (!pipe->output->bridge) {
327 pipe->connector = omap_connector_init(dev, pipe->output,
328 encoder);
329 if (!pipe->connector)
330 return -ENOMEM;
331
332 drm_connector_attach_encoder(pipe->connector, encoder);
333
334 if (pipe->output->panel) {
335 ret = drm_panel_attach(pipe->output->panel,
336 pipe->connector);
337 if (ret < 0)
338 return ret;
339 }
340 }
341
342 crtc = omap_crtc_init(dev, pipe, priv->planes[i]);
343 if (IS_ERR(crtc))
344 return PTR_ERR(crtc);
345
346 encoder->possible_crtcs = 1 << i;
347 pipe->crtc = crtc;
348 }
349
350 DBG("registered %u planes, %u crtcs/encoders/connectors\n",
351 priv->num_planes, priv->num_pipes);
352
353 dev->mode_config.min_width = 8;
354 dev->mode_config.min_height = 2;
355
356
357
358
359
360
361
362 dev->mode_config.max_width = 8192;
363 dev->mode_config.max_height = 8192;
364
365
366 dev->mode_config.normalize_zpos = true;
367
368 dev->mode_config.funcs = &omap_mode_config_funcs;
369 dev->mode_config.helper_private = &omap_mode_config_helper_funcs;
370
371 drm_mode_config_reset(dev);
372
373 omap_drm_irq_install(dev);
374
375 return 0;
376}
377
378
379
380
381static void omap_modeset_enable_external_hpd(struct drm_device *ddev)
382{
383 struct omap_drm_private *priv = ddev->dev_private;
384 unsigned int i;
385
386 for (i = 0; i < priv->num_pipes; i++) {
387 if (priv->pipes[i].connector)
388 omap_connector_enable_hpd(priv->pipes[i].connector);
389 }
390}
391
392
393
394
395static void omap_modeset_disable_external_hpd(struct drm_device *ddev)
396{
397 struct omap_drm_private *priv = ddev->dev_private;
398 unsigned int i;
399
400 for (i = 0; i < priv->num_pipes; i++) {
401 if (priv->pipes[i].connector)
402 omap_connector_disable_hpd(priv->pipes[i].connector);
403 }
404}
405
406
407
408
409
410
411static int ioctl_get_param(struct drm_device *dev, void *data,
412 struct drm_file *file_priv)
413{
414 struct omap_drm_private *priv = dev->dev_private;
415 struct drm_omap_param *args = data;
416
417 DBG("%p: param=%llu", dev, args->param);
418
419 switch (args->param) {
420 case OMAP_PARAM_CHIPSET_ID:
421 args->value = priv->omaprev;
422 break;
423 default:
424 DBG("unknown parameter %lld", args->param);
425 return -EINVAL;
426 }
427
428 return 0;
429}
430
431#define OMAP_BO_USER_MASK 0x00ffffff
432
433static int ioctl_gem_new(struct drm_device *dev, void *data,
434 struct drm_file *file_priv)
435{
436 struct drm_omap_gem_new *args = data;
437 u32 flags = args->flags & OMAP_BO_USER_MASK;
438
439 VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
440 args->size.bytes, flags);
441
442 return omap_gem_new_handle(dev, file_priv, args->size, flags,
443 &args->handle);
444}
445
446static int ioctl_gem_info(struct drm_device *dev, void *data,
447 struct drm_file *file_priv)
448{
449 struct drm_omap_gem_info *args = data;
450 struct drm_gem_object *obj;
451 int ret = 0;
452
453 VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
454
455 obj = drm_gem_object_lookup(file_priv, args->handle);
456 if (!obj)
457 return -ENOENT;
458
459 args->size = omap_gem_mmap_size(obj);
460 args->offset = omap_gem_mmap_offset(obj);
461
462 drm_gem_object_put_unlocked(obj);
463
464 return ret;
465}
466
467static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
468 DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param,
469 DRM_AUTH | DRM_RENDER_ALLOW),
470 DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, drm_invalid_op,
471 DRM_AUTH | DRM_MASTER | DRM_ROOT_ONLY),
472 DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new,
473 DRM_AUTH | DRM_RENDER_ALLOW),
474
475 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, drm_noop,
476 DRM_AUTH | DRM_RENDER_ALLOW),
477
478 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, drm_noop,
479 DRM_AUTH | DRM_RENDER_ALLOW),
480 DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info,
481 DRM_AUTH | DRM_RENDER_ALLOW),
482};
483
484
485
486
487
488static int dev_open(struct drm_device *dev, struct drm_file *file)
489{
490 file->driver_priv = NULL;
491
492 DBG("open: dev=%p, file=%p", dev, file);
493
494 return 0;
495}
496
497static const struct vm_operations_struct omap_gem_vm_ops = {
498 .fault = omap_gem_fault,
499 .open = drm_gem_vm_open,
500 .close = drm_gem_vm_close,
501};
502
503static const struct file_operations omapdriver_fops = {
504 .owner = THIS_MODULE,
505 .open = drm_open,
506 .unlocked_ioctl = drm_ioctl,
507 .compat_ioctl = drm_compat_ioctl,
508 .release = drm_release,
509 .mmap = omap_gem_mmap,
510 .poll = drm_poll,
511 .read = drm_read,
512 .llseek = noop_llseek,
513};
514
515static struct drm_driver omap_drm_driver = {
516 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
517 DRIVER_ATOMIC | DRIVER_RENDER,
518 .open = dev_open,
519 .lastclose = drm_fb_helper_lastclose,
520#ifdef CONFIG_DEBUG_FS
521 .debugfs_init = omap_debugfs_init,
522#endif
523 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
524 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
525 .gem_prime_export = omap_gem_prime_export,
526 .gem_prime_import = omap_gem_prime_import,
527 .gem_free_object_unlocked = omap_gem_free_object,
528 .gem_vm_ops = &omap_gem_vm_ops,
529 .dumb_create = omap_gem_dumb_create,
530 .dumb_map_offset = omap_gem_dumb_map_offset,
531 .ioctls = ioctls,
532 .num_ioctls = DRM_OMAP_NUM_IOCTLS,
533 .fops = &omapdriver_fops,
534 .name = DRIVER_NAME,
535 .desc = DRIVER_DESC,
536 .date = DRIVER_DATE,
537 .major = DRIVER_MAJOR,
538 .minor = DRIVER_MINOR,
539 .patchlevel = DRIVER_PATCHLEVEL,
540};
541
542static const struct soc_device_attribute omapdrm_soc_devices[] = {
543 { .family = "OMAP3", .data = (void *)0x3430 },
544 { .family = "OMAP4", .data = (void *)0x4430 },
545 { .family = "OMAP5", .data = (void *)0x5430 },
546 { .family = "DRA7", .data = (void *)0x0752 },
547 { }
548};
549
550static int omapdrm_init(struct omap_drm_private *priv, struct device *dev)
551{
552 const struct soc_device_attribute *soc;
553 struct drm_device *ddev;
554 unsigned int i;
555 int ret;
556
557 DBG("%s", dev_name(dev));
558
559
560 ddev = drm_dev_alloc(&omap_drm_driver, dev);
561 if (IS_ERR(ddev))
562 return PTR_ERR(ddev);
563
564 priv->ddev = ddev;
565 ddev->dev_private = priv;
566
567 priv->dev = dev;
568 priv->dss = omapdss_get_dss();
569 priv->dispc = dispc_get_dispc(priv->dss);
570 priv->dispc_ops = dispc_get_ops(priv->dss);
571
572 omap_crtc_pre_init(priv);
573
574 soc = soc_device_match(omapdrm_soc_devices);
575 priv->omaprev = soc ? (unsigned int)soc->data : 0;
576 priv->wq = alloc_ordered_workqueue("omapdrm", 0);
577
578 mutex_init(&priv->list_lock);
579 INIT_LIST_HEAD(&priv->obj_list);
580
581
582 if (priv->dispc_ops->get_memory_bandwidth_limit)
583 priv->max_bandwidth =
584 priv->dispc_ops->get_memory_bandwidth_limit(priv->dispc);
585
586 omap_gem_init(ddev);
587
588 ret = omap_modeset_init(ddev);
589 if (ret) {
590 dev_err(priv->dev, "omap_modeset_init failed: ret=%d\n", ret);
591 goto err_gem_deinit;
592 }
593
594
595 ret = drm_vblank_init(ddev, priv->num_pipes);
596 if (ret) {
597 dev_err(priv->dev, "could not init vblank\n");
598 goto err_cleanup_modeset;
599 }
600
601 for (i = 0; i < priv->num_pipes; i++)
602 drm_crtc_vblank_off(priv->pipes[i].crtc);
603
604 omap_fbdev_init(ddev);
605
606 drm_kms_helper_poll_init(ddev);
607 omap_modeset_enable_external_hpd(ddev);
608
609
610
611
612
613 ret = drm_dev_register(ddev, 0);
614 if (ret)
615 goto err_cleanup_helpers;
616
617 return 0;
618
619err_cleanup_helpers:
620 omap_modeset_disable_external_hpd(ddev);
621 drm_kms_helper_poll_fini(ddev);
622
623 omap_fbdev_fini(ddev);
624err_cleanup_modeset:
625 drm_mode_config_cleanup(ddev);
626 omap_drm_irq_uninstall(ddev);
627err_gem_deinit:
628 omap_gem_deinit(ddev);
629 destroy_workqueue(priv->wq);
630 omap_disconnect_pipelines(ddev);
631 omap_crtc_pre_uninit(priv);
632 drm_dev_put(ddev);
633 return ret;
634}
635
636static void omapdrm_cleanup(struct omap_drm_private *priv)
637{
638 struct drm_device *ddev = priv->ddev;
639
640 DBG("");
641
642 drm_dev_unregister(ddev);
643
644 omap_modeset_disable_external_hpd(ddev);
645 drm_kms_helper_poll_fini(ddev);
646
647 omap_fbdev_fini(ddev);
648
649 drm_atomic_helper_shutdown(ddev);
650
651 drm_mode_config_cleanup(ddev);
652
653 omap_drm_irq_uninstall(ddev);
654 omap_gem_deinit(ddev);
655
656 destroy_workqueue(priv->wq);
657
658 omap_disconnect_pipelines(ddev);
659 omap_crtc_pre_uninit(priv);
660
661 drm_dev_put(ddev);
662}
663
664static int pdev_probe(struct platform_device *pdev)
665{
666 struct omap_drm_private *priv;
667 int ret;
668
669 if (omapdss_is_initialized() == false)
670 return -EPROBE_DEFER;
671
672 ret = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
673 if (ret) {
674 dev_err(&pdev->dev, "Failed to set the DMA mask\n");
675 return ret;
676 }
677
678
679 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
680 if (!priv)
681 return -ENOMEM;
682
683 platform_set_drvdata(pdev, priv);
684
685 ret = omapdrm_init(priv, &pdev->dev);
686 if (ret < 0)
687 kfree(priv);
688
689 return ret;
690}
691
692static int pdev_remove(struct platform_device *pdev)
693{
694 struct omap_drm_private *priv = platform_get_drvdata(pdev);
695
696 omapdrm_cleanup(priv);
697 kfree(priv);
698
699 return 0;
700}
701
702#ifdef CONFIG_PM_SLEEP
703static int omap_drm_suspend(struct device *dev)
704{
705 struct omap_drm_private *priv = dev_get_drvdata(dev);
706 struct drm_device *drm_dev = priv->ddev;
707
708 return drm_mode_config_helper_suspend(drm_dev);
709}
710
711static int omap_drm_resume(struct device *dev)
712{
713 struct omap_drm_private *priv = dev_get_drvdata(dev);
714 struct drm_device *drm_dev = priv->ddev;
715
716 drm_mode_config_helper_resume(drm_dev);
717
718 return omap_gem_resume(drm_dev);
719}
720#endif
721
722static SIMPLE_DEV_PM_OPS(omapdrm_pm_ops, omap_drm_suspend, omap_drm_resume);
723
724static struct platform_driver pdev = {
725 .driver = {
726 .name = "omapdrm",
727 .pm = &omapdrm_pm_ops,
728 },
729 .probe = pdev_probe,
730 .remove = pdev_remove,
731};
732
733static struct platform_driver * const drivers[] = {
734 &omap_dmm_driver,
735 &pdev,
736};
737
738static int __init omap_drm_init(void)
739{
740 DBG("init");
741
742 return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
743}
744
745static void __exit omap_drm_fini(void)
746{
747 DBG("fini");
748
749 platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
750}
751
752
753late_initcall(omap_drm_init);
754module_exit(omap_drm_fini);
755
756MODULE_AUTHOR("Rob Clark <rob@ti.com>");
757MODULE_DESCRIPTION("OMAP DRM Display Driver");
758MODULE_ALIAS("platform:" DRIVER_NAME);
759MODULE_LICENSE("GPL v2");
760