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26#include "qxl_drv.h"
27#include "qxl_object.h"
28
29#include <drm/drm_probe_helper.h>
30#include <linux/io-mapping.h>
31
32int qxl_log_level;
33
34static bool qxl_check_device(struct qxl_device *qdev)
35{
36 struct qxl_rom *rom = qdev->rom;
37
38 if (rom->magic != 0x4f525851) {
39 DRM_ERROR("bad rom signature %x\n", rom->magic);
40 return false;
41 }
42
43 DRM_INFO("Device Version %d.%d\n", rom->id, rom->update_id);
44 DRM_INFO("Compression level %d log level %d\n", rom->compression_level,
45 rom->log_level);
46 DRM_INFO("%d io pages at offset 0x%x\n",
47 rom->num_io_pages, rom->pages_offset);
48 DRM_INFO("%d byte draw area at offset 0x%x\n",
49 rom->surface0_area_size, rom->draw_area_offset);
50
51 qdev->vram_size = rom->surface0_area_size;
52 DRM_INFO("RAM header offset: 0x%x\n", rom->ram_header_offset);
53 return true;
54}
55
56static void setup_hw_slot(struct qxl_device *qdev, struct qxl_memslot *slot)
57{
58 qdev->ram_header->mem_slot.mem_start = slot->start_phys_addr;
59 qdev->ram_header->mem_slot.mem_end = slot->start_phys_addr + slot->size;
60 qxl_io_memslot_add(qdev, qdev->rom->slots_start + slot->index);
61}
62
63static void setup_slot(struct qxl_device *qdev,
64 struct qxl_memslot *slot,
65 unsigned int slot_index,
66 const char *slot_name,
67 unsigned long start_phys_addr,
68 unsigned long size)
69{
70 uint64_t high_bits;
71
72 slot->index = slot_index;
73 slot->name = slot_name;
74 slot->start_phys_addr = start_phys_addr;
75 slot->size = size;
76
77 setup_hw_slot(qdev, slot);
78
79 slot->generation = qdev->rom->slot_generation;
80 high_bits = (qdev->rom->slots_start + slot->index)
81 << qdev->rom->slot_gen_bits;
82 high_bits |= slot->generation;
83 high_bits <<= (64 - (qdev->rom->slot_gen_bits + qdev->rom->slot_id_bits));
84 slot->high_bits = high_bits;
85
86 DRM_INFO("slot %d (%s): base 0x%08lx, size 0x%08lx, gpu_offset 0x%lx\n",
87 slot->index, slot->name,
88 (unsigned long)slot->start_phys_addr,
89 (unsigned long)slot->size,
90 (unsigned long)slot->gpu_offset);
91}
92
93void qxl_reinit_memslots(struct qxl_device *qdev)
94{
95 setup_hw_slot(qdev, &qdev->main_slot);
96 setup_hw_slot(qdev, &qdev->surfaces_slot);
97}
98
99static void qxl_gc_work(struct work_struct *work)
100{
101 struct qxl_device *qdev = container_of(work, struct qxl_device, gc_work);
102
103 qxl_garbage_collect(qdev);
104}
105
106int qxl_device_init(struct qxl_device *qdev,
107 struct drm_driver *drv,
108 struct pci_dev *pdev)
109{
110 int r, sb;
111
112 r = drm_dev_init(&qdev->ddev, drv, &pdev->dev);
113 if (r) {
114 pr_err("Unable to init drm dev");
115 goto error;
116 }
117
118 qdev->ddev.pdev = pdev;
119 pci_set_drvdata(pdev, &qdev->ddev);
120 qdev->ddev.dev_private = qdev;
121
122 mutex_init(&qdev->gem.mutex);
123 mutex_init(&qdev->update_area_mutex);
124 mutex_init(&qdev->release_mutex);
125 mutex_init(&qdev->surf_evict_mutex);
126 qxl_gem_init(qdev);
127
128 qdev->rom_base = pci_resource_start(pdev, 2);
129 qdev->rom_size = pci_resource_len(pdev, 2);
130 qdev->vram_base = pci_resource_start(pdev, 0);
131 qdev->io_base = pci_resource_start(pdev, 3);
132
133 qdev->vram_mapping = io_mapping_create_wc(qdev->vram_base, pci_resource_len(pdev, 0));
134 if (!qdev->vram_mapping) {
135 pr_err("Unable to create vram_mapping");
136 r = -ENOMEM;
137 goto error;
138 }
139
140 if (pci_resource_len(pdev, 4) > 0) {
141
142 sb = 4;
143 qdev->surfaceram_base = pci_resource_start(pdev, sb);
144 qdev->surfaceram_size = pci_resource_len(pdev, sb);
145 qdev->surface_mapping =
146 io_mapping_create_wc(qdev->surfaceram_base,
147 qdev->surfaceram_size);
148 }
149 if (qdev->surface_mapping == NULL) {
150
151 sb = 1;
152 qdev->surfaceram_base = pci_resource_start(pdev, sb);
153 qdev->surfaceram_size = pci_resource_len(pdev, sb);
154 qdev->surface_mapping =
155 io_mapping_create_wc(qdev->surfaceram_base,
156 qdev->surfaceram_size);
157 if (!qdev->surface_mapping) {
158 pr_err("Unable to create surface_mapping");
159 r = -ENOMEM;
160 goto vram_mapping_free;
161 }
162 }
163
164 DRM_DEBUG_KMS("qxl: vram %llx-%llx(%dM %dk), surface %llx-%llx(%dM %dk, %s)\n",
165 (unsigned long long)qdev->vram_base,
166 (unsigned long long)pci_resource_end(pdev, 0),
167 (int)pci_resource_len(pdev, 0) / 1024 / 1024,
168 (int)pci_resource_len(pdev, 0) / 1024,
169 (unsigned long long)qdev->surfaceram_base,
170 (unsigned long long)pci_resource_end(pdev, sb),
171 (int)qdev->surfaceram_size / 1024 / 1024,
172 (int)qdev->surfaceram_size / 1024,
173 (sb == 4) ? "64bit" : "32bit");
174
175 qdev->rom = ioremap(qdev->rom_base, qdev->rom_size);
176 if (!qdev->rom) {
177 pr_err("Unable to ioremap ROM\n");
178 r = -ENOMEM;
179 goto surface_mapping_free;
180 }
181
182 if (!qxl_check_device(qdev)) {
183 r = -ENODEV;
184 goto surface_mapping_free;
185 }
186
187 r = qxl_bo_init(qdev);
188 if (r) {
189 DRM_ERROR("bo init failed %d\n", r);
190 goto rom_unmap;
191 }
192
193 qdev->ram_header = ioremap(qdev->vram_base +
194 qdev->rom->ram_header_offset,
195 sizeof(*qdev->ram_header));
196 if (!qdev->ram_header) {
197 DRM_ERROR("Unable to ioremap RAM header\n");
198 r = -ENOMEM;
199 goto bo_fini;
200 }
201
202 qdev->command_ring = qxl_ring_create(&(qdev->ram_header->cmd_ring_hdr),
203 sizeof(struct qxl_command),
204 QXL_COMMAND_RING_SIZE,
205 qdev->io_base + QXL_IO_NOTIFY_CMD,
206 false,
207 &qdev->display_event);
208 if (!qdev->command_ring) {
209 DRM_ERROR("Unable to create command ring\n");
210 r = -ENOMEM;
211 goto ram_header_unmap;
212 }
213
214 qdev->cursor_ring = qxl_ring_create(
215 &(qdev->ram_header->cursor_ring_hdr),
216 sizeof(struct qxl_command),
217 QXL_CURSOR_RING_SIZE,
218 qdev->io_base + QXL_IO_NOTIFY_CMD,
219 false,
220 &qdev->cursor_event);
221
222 if (!qdev->cursor_ring) {
223 DRM_ERROR("Unable to create cursor ring\n");
224 r = -ENOMEM;
225 goto command_ring_free;
226 }
227
228 qdev->release_ring = qxl_ring_create(
229 &(qdev->ram_header->release_ring_hdr),
230 sizeof(uint64_t),
231 QXL_RELEASE_RING_SIZE, 0, true,
232 NULL);
233
234 if (!qdev->release_ring) {
235 DRM_ERROR("Unable to create release ring\n");
236 r = -ENOMEM;
237 goto cursor_ring_free;
238 }
239
240 idr_init(&qdev->release_idr);
241 spin_lock_init(&qdev->release_idr_lock);
242 spin_lock_init(&qdev->release_lock);
243
244 idr_init(&qdev->surf_id_idr);
245 spin_lock_init(&qdev->surf_id_idr_lock);
246
247 mutex_init(&qdev->async_io_mutex);
248
249
250
251 qxl_io_reset(qdev);
252
253
254 r = qxl_irq_init(qdev);
255 if (r) {
256 DRM_ERROR("Unable to init qxl irq\n");
257 goto release_ring_free;
258 }
259
260
261
262
263
264 setup_slot(qdev, &qdev->main_slot, 0, "main",
265 (unsigned long)qdev->vram_base,
266 (unsigned long)qdev->rom->ram_header_offset);
267 setup_slot(qdev, &qdev->surfaces_slot, 1, "surfaces",
268 (unsigned long)qdev->surfaceram_base,
269 (unsigned long)qdev->surfaceram_size);
270
271 INIT_WORK(&qdev->gc_work, qxl_gc_work);
272
273 return 0;
274
275release_ring_free:
276 qxl_ring_free(qdev->release_ring);
277cursor_ring_free:
278 qxl_ring_free(qdev->cursor_ring);
279command_ring_free:
280 qxl_ring_free(qdev->command_ring);
281ram_header_unmap:
282 iounmap(qdev->ram_header);
283bo_fini:
284 qxl_bo_fini(qdev);
285rom_unmap:
286 iounmap(qdev->rom);
287surface_mapping_free:
288 io_mapping_free(qdev->surface_mapping);
289vram_mapping_free:
290 io_mapping_free(qdev->vram_mapping);
291error:
292 return r;
293}
294
295void qxl_device_fini(struct qxl_device *qdev)
296{
297 qxl_bo_unref(&qdev->current_release_bo[0]);
298 qxl_bo_unref(&qdev->current_release_bo[1]);
299 flush_work(&qdev->gc_work);
300 qxl_ring_free(qdev->command_ring);
301 qxl_ring_free(qdev->cursor_ring);
302 qxl_ring_free(qdev->release_ring);
303 qxl_gem_fini(qdev);
304 qxl_bo_fini(qdev);
305 io_mapping_free(qdev->surface_mapping);
306 io_mapping_free(qdev->vram_mapping);
307 iounmap(qdev->ram_header);
308 iounmap(qdev->rom);
309 qdev->rom = NULL;
310}
311
