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33#include <linux/compat.h>
34#include <linux/console.h>
35#include <linux/module.h>
36#include <linux/pm_runtime.h>
37#include <linux/vga_switcheroo.h>
38
39#include <drm/drm_crtc_helper.h>
40#include <drm/drm_drv.h>
41#include <drm/drm_fb_helper.h>
42#include <drm/drm_file.h>
43#include <drm/drm_gem.h>
44#include <drm/drm_ioctl.h>
45#include <drm/drm_pci.h>
46#include <drm/drm_pciids.h>
47#include <drm/drm_probe_helper.h>
48#include <drm/drm_vblank.h>
49#include <drm/radeon_drm.h>
50
51#include "radeon_drv.h"
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109#define KMS_DRIVER_MAJOR 2
110#define KMS_DRIVER_MINOR 50
111#define KMS_DRIVER_PATCHLEVEL 0
112int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
113void radeon_driver_unload_kms(struct drm_device *dev);
114void radeon_driver_lastclose_kms(struct drm_device *dev);
115int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
116void radeon_driver_postclose_kms(struct drm_device *dev,
117 struct drm_file *file_priv);
118int radeon_suspend_kms(struct drm_device *dev, bool suspend,
119 bool fbcon, bool freeze);
120int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon);
121u32 radeon_get_vblank_counter_kms(struct drm_device *dev, unsigned int pipe);
122int radeon_enable_vblank_kms(struct drm_device *dev, unsigned int pipe);
123void radeon_disable_vblank_kms(struct drm_device *dev, unsigned int pipe);
124void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
125int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
126void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
127irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg);
128void radeon_gem_object_free(struct drm_gem_object *obj);
129int radeon_gem_object_open(struct drm_gem_object *obj,
130 struct drm_file *file_priv);
131void radeon_gem_object_close(struct drm_gem_object *obj,
132 struct drm_file *file_priv);
133struct dma_buf *radeon_gem_prime_export(struct drm_device *dev,
134 struct drm_gem_object *gobj,
135 int flags);
136extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, unsigned int crtc,
137 unsigned int flags, int *vpos, int *hpos,
138 ktime_t *stime, ktime_t *etime,
139 const struct drm_display_mode *mode);
140extern bool radeon_is_px(struct drm_device *dev);
141extern const struct drm_ioctl_desc radeon_ioctls_kms[];
142extern int radeon_max_kms_ioctl;
143int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
144int radeon_mode_dumb_mmap(struct drm_file *filp,
145 struct drm_device *dev,
146 uint32_t handle, uint64_t *offset_p);
147int radeon_mode_dumb_create(struct drm_file *file_priv,
148 struct drm_device *dev,
149 struct drm_mode_create_dumb *args);
150struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj);
151struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev,
152 struct dma_buf_attachment *,
153 struct sg_table *sg);
154int radeon_gem_prime_pin(struct drm_gem_object *obj);
155void radeon_gem_prime_unpin(struct drm_gem_object *obj);
156struct reservation_object *radeon_gem_prime_res_obj(struct drm_gem_object *);
157void *radeon_gem_prime_vmap(struct drm_gem_object *obj);
158void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
159
160
161#if defined(CONFIG_VGA_SWITCHEROO)
162void radeon_register_atpx_handler(void);
163void radeon_unregister_atpx_handler(void);
164bool radeon_has_atpx_dgpu_power_cntl(void);
165bool radeon_is_atpx_hybrid(void);
166#else
167static inline void radeon_register_atpx_handler(void) {}
168static inline void radeon_unregister_atpx_handler(void) {}
169static inline bool radeon_has_atpx_dgpu_power_cntl(void) { return false; }
170static inline bool radeon_is_atpx_hybrid(void) { return false; }
171#endif
172
173int radeon_no_wb;
174int radeon_modeset = -1;
175int radeon_dynclks = -1;
176int radeon_r4xx_atom = 0;
177#ifdef __powerpc__
178
179int radeon_agpmode = -1;
180#else
181int radeon_agpmode = 0;
182#endif
183int radeon_vram_limit = 0;
184int radeon_gart_size = -1;
185int radeon_benchmarking = 0;
186int radeon_testing = 0;
187int radeon_connector_table = 0;
188int radeon_tv = 1;
189int radeon_audio = -1;
190int radeon_disp_priority = 0;
191int radeon_hw_i2c = 0;
192int radeon_pcie_gen2 = -1;
193int radeon_msi = -1;
194int radeon_lockup_timeout = 10000;
195int radeon_fastfb = 0;
196int radeon_dpm = -1;
197int radeon_aspm = -1;
198int radeon_runtime_pm = -1;
199int radeon_hard_reset = 0;
200int radeon_vm_size = 8;
201int radeon_vm_block_size = -1;
202int radeon_deep_color = 0;
203int radeon_use_pflipirq = 2;
204int radeon_bapm = -1;
205int radeon_backlight = -1;
206int radeon_auxch = -1;
207int radeon_mst = 0;
208int radeon_uvd = 1;
209int radeon_vce = 1;
210
211MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
212module_param_named(no_wb, radeon_no_wb, int, 0444);
213
214MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
215module_param_named(modeset, radeon_modeset, int, 0400);
216
217MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
218module_param_named(dynclks, radeon_dynclks, int, 0444);
219
220MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
221module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
222
223MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
224module_param_named(vramlimit, radeon_vram_limit, int, 0600);
225
226MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
227module_param_named(agpmode, radeon_agpmode, int, 0444);
228
229MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)");
230module_param_named(gartsize, radeon_gart_size, int, 0600);
231
232MODULE_PARM_DESC(benchmark, "Run benchmark");
233module_param_named(benchmark, radeon_benchmarking, int, 0444);
234
235MODULE_PARM_DESC(test, "Run tests");
236module_param_named(test, radeon_testing, int, 0444);
237
238MODULE_PARM_DESC(connector_table, "Force connector table");
239module_param_named(connector_table, radeon_connector_table, int, 0444);
240
241MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
242module_param_named(tv, radeon_tv, int, 0444);
243
244MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)");
245module_param_named(audio, radeon_audio, int, 0444);
246
247MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
248module_param_named(disp_priority, radeon_disp_priority, int, 0444);
249
250MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
251module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
252
253MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
254module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
255
256MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
257module_param_named(msi, radeon_msi, int, 0444);
258
259MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (default 10000 = 10 seconds, 0 = disable)");
260module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
261
262MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)");
263module_param_named(fastfb, radeon_fastfb, int, 0444);
264
265MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
266module_param_named(dpm, radeon_dpm, int, 0444);
267
268MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)");
269module_param_named(aspm, radeon_aspm, int, 0444);
270
271MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)");
272module_param_named(runpm, radeon_runtime_pm, int, 0444);
273
274MODULE_PARM_DESC(hard_reset, "PCI config reset (1 = force enable, 0 = disable (default))");
275module_param_named(hard_reset, radeon_hard_reset, int, 0444);
276
277MODULE_PARM_DESC(vm_size, "VM address space size in gigabytes (default 4GB)");
278module_param_named(vm_size, radeon_vm_size, int, 0444);
279
280MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default depending on vm_size)");
281module_param_named(vm_block_size, radeon_vm_block_size, int, 0444);
282
283MODULE_PARM_DESC(deep_color, "Deep Color support (1 = enable, 0 = disable (default))");
284module_param_named(deep_color, radeon_deep_color, int, 0444);
285
286MODULE_PARM_DESC(use_pflipirq, "Pflip irqs for pageflip completion (0 = disable, 1 = as fallback, 2 = exclusive (default))");
287module_param_named(use_pflipirq, radeon_use_pflipirq, int, 0444);
288
289MODULE_PARM_DESC(bapm, "BAPM support (1 = enable, 0 = disable, -1 = auto)");
290module_param_named(bapm, radeon_bapm, int, 0444);
291
292MODULE_PARM_DESC(backlight, "backlight support (1 = enable, 0 = disable, -1 = auto)");
293module_param_named(backlight, radeon_backlight, int, 0444);
294
295MODULE_PARM_DESC(auxch, "Use native auxch experimental support (1 = enable, 0 = disable, -1 = auto)");
296module_param_named(auxch, radeon_auxch, int, 0444);
297
298MODULE_PARM_DESC(mst, "DisplayPort MST experimental support (1 = enable, 0 = disable)");
299module_param_named(mst, radeon_mst, int, 0444);
300
301MODULE_PARM_DESC(uvd, "uvd enable/disable uvd support (1 = enable, 0 = disable)");
302module_param_named(uvd, radeon_uvd, int, 0444);
303
304MODULE_PARM_DESC(vce, "vce enable/disable vce support (1 = enable, 0 = disable)");
305module_param_named(vce, radeon_vce, int, 0444);
306
307int radeon_si_support = 1;
308MODULE_PARM_DESC(si_support, "SI support (1 = enabled (default), 0 = disabled)");
309module_param_named(si_support, radeon_si_support, int, 0444);
310
311int radeon_cik_support = 1;
312MODULE_PARM_DESC(cik_support, "CIK support (1 = enabled (default), 0 = disabled)");
313module_param_named(cik_support, radeon_cik_support, int, 0444);
314
315static struct pci_device_id pciidlist[] = {
316 radeon_PCI_IDS
317};
318
319MODULE_DEVICE_TABLE(pci, pciidlist);
320
321static struct drm_driver kms_driver;
322
323bool radeon_device_is_virtual(void);
324
325static int radeon_pci_probe(struct pci_dev *pdev,
326 const struct pci_device_id *ent)
327{
328 int ret;
329
330 if (vga_switcheroo_client_probe_defer(pdev))
331 return -EPROBE_DEFER;
332
333
334 ret = drm_fb_helper_remove_conflicting_pci_framebuffers(pdev, 0, "radeondrmfb");
335 if (ret)
336 return ret;
337
338 return drm_get_pci_dev(pdev, ent, &kms_driver);
339}
340
341static void
342radeon_pci_remove(struct pci_dev *pdev)
343{
344 struct drm_device *dev = pci_get_drvdata(pdev);
345
346 drm_put_dev(dev);
347}
348
349static void
350radeon_pci_shutdown(struct pci_dev *pdev)
351{
352
353
354
355 if (radeon_device_is_virtual())
356 radeon_pci_remove(pdev);
357}
358
359static int radeon_pmops_suspend(struct device *dev)
360{
361 struct pci_dev *pdev = to_pci_dev(dev);
362 struct drm_device *drm_dev = pci_get_drvdata(pdev);
363 return radeon_suspend_kms(drm_dev, true, true, false);
364}
365
366static int radeon_pmops_resume(struct device *dev)
367{
368 struct pci_dev *pdev = to_pci_dev(dev);
369 struct drm_device *drm_dev = pci_get_drvdata(pdev);
370
371
372 if (radeon_is_px(drm_dev)) {
373 pm_runtime_disable(dev);
374 pm_runtime_set_active(dev);
375 pm_runtime_enable(dev);
376 }
377
378 return radeon_resume_kms(drm_dev, true, true);
379}
380
381static int radeon_pmops_freeze(struct device *dev)
382{
383 struct pci_dev *pdev = to_pci_dev(dev);
384 struct drm_device *drm_dev = pci_get_drvdata(pdev);
385 return radeon_suspend_kms(drm_dev, false, true, true);
386}
387
388static int radeon_pmops_thaw(struct device *dev)
389{
390 struct pci_dev *pdev = to_pci_dev(dev);
391 struct drm_device *drm_dev = pci_get_drvdata(pdev);
392 return radeon_resume_kms(drm_dev, false, true);
393}
394
395static int radeon_pmops_runtime_suspend(struct device *dev)
396{
397 struct pci_dev *pdev = to_pci_dev(dev);
398 struct drm_device *drm_dev = pci_get_drvdata(pdev);
399 int ret;
400
401 if (!radeon_is_px(drm_dev)) {
402 pm_runtime_forbid(dev);
403 return -EBUSY;
404 }
405
406 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
407 drm_kms_helper_poll_disable(drm_dev);
408
409 ret = radeon_suspend_kms(drm_dev, false, false, false);
410 pci_save_state(pdev);
411 pci_disable_device(pdev);
412 pci_ignore_hotplug(pdev);
413 if (radeon_is_atpx_hybrid())
414 pci_set_power_state(pdev, PCI_D3cold);
415 else if (!radeon_has_atpx_dgpu_power_cntl())
416 pci_set_power_state(pdev, PCI_D3hot);
417 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
418
419 return 0;
420}
421
422static int radeon_pmops_runtime_resume(struct device *dev)
423{
424 struct pci_dev *pdev = to_pci_dev(dev);
425 struct drm_device *drm_dev = pci_get_drvdata(pdev);
426 int ret;
427
428 if (!radeon_is_px(drm_dev))
429 return -EINVAL;
430
431 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
432
433 if (radeon_is_atpx_hybrid() ||
434 !radeon_has_atpx_dgpu_power_cntl())
435 pci_set_power_state(pdev, PCI_D0);
436 pci_restore_state(pdev);
437 ret = pci_enable_device(pdev);
438 if (ret)
439 return ret;
440 pci_set_master(pdev);
441
442 ret = radeon_resume_kms(drm_dev, false, false);
443 drm_kms_helper_poll_enable(drm_dev);
444 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
445 return 0;
446}
447
448static int radeon_pmops_runtime_idle(struct device *dev)
449{
450 struct pci_dev *pdev = to_pci_dev(dev);
451 struct drm_device *drm_dev = pci_get_drvdata(pdev);
452 struct drm_crtc *crtc;
453
454 if (!radeon_is_px(drm_dev)) {
455 pm_runtime_forbid(dev);
456 return -EBUSY;
457 }
458
459 list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) {
460 if (crtc->enabled) {
461 DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
462 return -EBUSY;
463 }
464 }
465
466 pm_runtime_mark_last_busy(dev);
467 pm_runtime_autosuspend(dev);
468
469 return 1;
470}
471
472long radeon_drm_ioctl(struct file *filp,
473 unsigned int cmd, unsigned long arg)
474{
475 struct drm_file *file_priv = filp->private_data;
476 struct drm_device *dev;
477 long ret;
478 dev = file_priv->minor->dev;
479 ret = pm_runtime_get_sync(dev->dev);
480 if (ret < 0)
481 return ret;
482
483 ret = drm_ioctl(filp, cmd, arg);
484
485 pm_runtime_mark_last_busy(dev->dev);
486 pm_runtime_put_autosuspend(dev->dev);
487 return ret;
488}
489
490#ifdef CONFIG_COMPAT
491static long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
492{
493 unsigned int nr = DRM_IOCTL_NR(cmd);
494 int ret;
495
496 if (nr < DRM_COMMAND_BASE)
497 return drm_compat_ioctl(filp, cmd, arg);
498
499 ret = radeon_drm_ioctl(filp, cmd, arg);
500
501 return ret;
502}
503#endif
504
505static const struct dev_pm_ops radeon_pm_ops = {
506 .suspend = radeon_pmops_suspend,
507 .resume = radeon_pmops_resume,
508 .freeze = radeon_pmops_freeze,
509 .thaw = radeon_pmops_thaw,
510 .poweroff = radeon_pmops_freeze,
511 .restore = radeon_pmops_resume,
512 .runtime_suspend = radeon_pmops_runtime_suspend,
513 .runtime_resume = radeon_pmops_runtime_resume,
514 .runtime_idle = radeon_pmops_runtime_idle,
515};
516
517static const struct file_operations radeon_driver_kms_fops = {
518 .owner = THIS_MODULE,
519 .open = drm_open,
520 .release = drm_release,
521 .unlocked_ioctl = radeon_drm_ioctl,
522 .mmap = radeon_mmap,
523 .poll = drm_poll,
524 .read = drm_read,
525#ifdef CONFIG_COMPAT
526 .compat_ioctl = radeon_kms_compat_ioctl,
527#endif
528};
529
530static bool
531radeon_get_crtc_scanout_position(struct drm_device *dev, unsigned int pipe,
532 bool in_vblank_irq, int *vpos, int *hpos,
533 ktime_t *stime, ktime_t *etime,
534 const struct drm_display_mode *mode)
535{
536 return radeon_get_crtc_scanoutpos(dev, pipe, 0, vpos, hpos,
537 stime, etime, mode);
538}
539
540static struct drm_driver kms_driver = {
541 .driver_features =
542 DRIVER_USE_AGP | DRIVER_GEM | DRIVER_PRIME | DRIVER_RENDER,
543 .load = radeon_driver_load_kms,
544 .open = radeon_driver_open_kms,
545 .postclose = radeon_driver_postclose_kms,
546 .lastclose = radeon_driver_lastclose_kms,
547 .unload = radeon_driver_unload_kms,
548 .get_vblank_counter = radeon_get_vblank_counter_kms,
549 .enable_vblank = radeon_enable_vblank_kms,
550 .disable_vblank = radeon_disable_vblank_kms,
551 .get_vblank_timestamp = drm_calc_vbltimestamp_from_scanoutpos,
552 .get_scanout_position = radeon_get_crtc_scanout_position,
553 .irq_preinstall = radeon_driver_irq_preinstall_kms,
554 .irq_postinstall = radeon_driver_irq_postinstall_kms,
555 .irq_uninstall = radeon_driver_irq_uninstall_kms,
556 .irq_handler = radeon_driver_irq_handler_kms,
557 .ioctls = radeon_ioctls_kms,
558 .gem_free_object_unlocked = radeon_gem_object_free,
559 .gem_open_object = radeon_gem_object_open,
560 .gem_close_object = radeon_gem_object_close,
561 .dumb_create = radeon_mode_dumb_create,
562 .dumb_map_offset = radeon_mode_dumb_mmap,
563 .fops = &radeon_driver_kms_fops,
564
565 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
566 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
567 .gem_prime_export = radeon_gem_prime_export,
568 .gem_prime_import = drm_gem_prime_import,
569 .gem_prime_pin = radeon_gem_prime_pin,
570 .gem_prime_unpin = radeon_gem_prime_unpin,
571 .gem_prime_res_obj = radeon_gem_prime_res_obj,
572 .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table,
573 .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table,
574 .gem_prime_vmap = radeon_gem_prime_vmap,
575 .gem_prime_vunmap = radeon_gem_prime_vunmap,
576
577 .name = DRIVER_NAME,
578 .desc = DRIVER_DESC,
579 .date = DRIVER_DATE,
580 .major = KMS_DRIVER_MAJOR,
581 .minor = KMS_DRIVER_MINOR,
582 .patchlevel = KMS_DRIVER_PATCHLEVEL,
583};
584
585static struct drm_driver *driver;
586static struct pci_driver *pdriver;
587
588static struct pci_driver radeon_kms_pci_driver = {
589 .name = DRIVER_NAME,
590 .id_table = pciidlist,
591 .probe = radeon_pci_probe,
592 .remove = radeon_pci_remove,
593 .shutdown = radeon_pci_shutdown,
594 .driver.pm = &radeon_pm_ops,
595};
596
597static int __init radeon_init(void)
598{
599 if (vgacon_text_force() && radeon_modeset == -1) {
600 DRM_INFO("VGACON disable radeon kernel modesetting.\n");
601 radeon_modeset = 0;
602 }
603
604 if (radeon_modeset == -1)
605 radeon_modeset = 1;
606
607 if (radeon_modeset == 1) {
608 DRM_INFO("radeon kernel modesetting enabled.\n");
609 driver = &kms_driver;
610 pdriver = &radeon_kms_pci_driver;
611 driver->driver_features |= DRIVER_MODESET;
612 driver->num_ioctls = radeon_max_kms_ioctl;
613 radeon_register_atpx_handler();
614
615 } else {
616 DRM_ERROR("No UMS support in radeon module!\n");
617 return -EINVAL;
618 }
619
620 return pci_register_driver(pdriver);
621}
622
623static void __exit radeon_exit(void)
624{
625 pci_unregister_driver(pdriver);
626 radeon_unregister_atpx_handler();
627}
628
629module_init(radeon_init);
630module_exit(radeon_exit);
631
632MODULE_AUTHOR(DRIVER_AUTHOR);
633MODULE_DESCRIPTION(DRIVER_DESC);
634MODULE_LICENSE("GPL and additional rights");
635
