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7#include <linux/clk.h>
8#include <linux/component.h>
9#include <linux/debugfs.h>
10#include <linux/module.h>
11#include <linux/of_gpio.h>
12#include <linux/platform_device.h>
13
14#include <drm/drm_atomic_helper.h>
15#include <drm/drm_device.h>
16#include <drm/drm_panel.h>
17#include <drm/drm_print.h>
18#include <drm/drm_probe_helper.h>
19
20#include "sti_awg_utils.h"
21#include "sti_drv.h"
22#include "sti_mixer.h"
23
24
25#define DVO_AWG_DIGSYNC_CTRL 0x0000
26#define DVO_DOF_CFG 0x0004
27#define DVO_LUT_PROG_LOW 0x0008
28#define DVO_LUT_PROG_MID 0x000C
29#define DVO_LUT_PROG_HIGH 0x0010
30#define DVO_DIGSYNC_INSTR_I 0x0100
31
32#define DVO_AWG_CTRL_EN BIT(0)
33#define DVO_AWG_FRAME_BASED_SYNC BIT(2)
34
35#define DVO_DOF_EN_LOWBYTE BIT(0)
36#define DVO_DOF_EN_MIDBYTE BIT(1)
37#define DVO_DOF_EN_HIGHBYTE BIT(2)
38#define DVO_DOF_EN BIT(6)
39#define DVO_DOF_MOD_COUNT_SHIFT 8
40
41#define DVO_LUT_ZERO 0
42#define DVO_LUT_Y_G 1
43#define DVO_LUT_Y_G_DEL 2
44#define DVO_LUT_CB_B 3
45#define DVO_LUT_CB_B_DEL 4
46#define DVO_LUT_CR_R 5
47#define DVO_LUT_CR_R_DEL 6
48#define DVO_LUT_HOLD 7
49
50struct dvo_config {
51 u32 flags;
52 u32 lowbyte;
53 u32 midbyte;
54 u32 highbyte;
55 int (*awg_fwgen_fct)(
56 struct awg_code_generation_params *fw_gen_params,
57 struct awg_timing *timing);
58};
59
60static struct dvo_config rgb_24bit_de_cfg = {
61 .flags = (0L << DVO_DOF_MOD_COUNT_SHIFT),
62 .lowbyte = DVO_LUT_CR_R,
63 .midbyte = DVO_LUT_Y_G,
64 .highbyte = DVO_LUT_CB_B,
65 .awg_fwgen_fct = sti_awg_generate_code_data_enable_mode,
66};
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83
84struct sti_dvo {
85 struct device dev;
86 struct drm_device *drm_dev;
87 struct drm_display_mode mode;
88 void __iomem *regs;
89 struct clk *clk_pix;
90 struct clk *clk;
91 struct clk *clk_main_parent;
92 struct clk *clk_aux_parent;
93 struct device_node *panel_node;
94 struct drm_panel *panel;
95 struct dvo_config *config;
96 bool enabled;
97 struct drm_encoder *encoder;
98 struct drm_bridge *bridge;
99};
100
101struct sti_dvo_connector {
102 struct drm_connector drm_connector;
103 struct drm_encoder *encoder;
104 struct sti_dvo *dvo;
105};
106
107#define to_sti_dvo_connector(x) \
108 container_of(x, struct sti_dvo_connector, drm_connector)
109
110#define BLANKING_LEVEL 16
111static int dvo_awg_generate_code(struct sti_dvo *dvo, u8 *ram_size, u32 *ram_code)
112{
113 struct drm_display_mode *mode = &dvo->mode;
114 struct dvo_config *config = dvo->config;
115 struct awg_code_generation_params fw_gen_params;
116 struct awg_timing timing;
117
118 fw_gen_params.ram_code = ram_code;
119 fw_gen_params.instruction_offset = 0;
120
121 timing.total_lines = mode->vtotal;
122 timing.active_lines = mode->vdisplay;
123 timing.blanking_lines = mode->vsync_start - mode->vdisplay;
124 timing.trailing_lines = mode->vtotal - mode->vsync_start;
125 timing.total_pixels = mode->htotal;
126 timing.active_pixels = mode->hdisplay;
127 timing.blanking_pixels = mode->hsync_start - mode->hdisplay;
128 timing.trailing_pixels = mode->htotal - mode->hsync_start;
129 timing.blanking_level = BLANKING_LEVEL;
130
131 if (config->awg_fwgen_fct(&fw_gen_params, &timing)) {
132 DRM_ERROR("AWG firmware not properly generated\n");
133 return -EINVAL;
134 }
135
136 *ram_size = fw_gen_params.instruction_offset;
137
138 return 0;
139}
140
141
142
143
144
145
146
147static void dvo_awg_configure(struct sti_dvo *dvo, u32 *awg_ram_code, int nb)
148{
149 int i;
150
151 DRM_DEBUG_DRIVER("\n");
152
153 for (i = 0; i < nb; i++)
154 writel(awg_ram_code[i],
155 dvo->regs + DVO_DIGSYNC_INSTR_I + i * 4);
156 for (i = nb; i < AWG_MAX_INST; i++)
157 writel(0, dvo->regs + DVO_DIGSYNC_INSTR_I + i * 4);
158
159 writel(DVO_AWG_CTRL_EN, dvo->regs + DVO_AWG_DIGSYNC_CTRL);
160}
161
162#define DBGFS_DUMP(reg) seq_printf(s, "\n %-25s 0x%08X", #reg, \
163 readl(dvo->regs + reg))
164
165static void dvo_dbg_awg_microcode(struct seq_file *s, void __iomem *reg)
166{
167 unsigned int i;
168
169 seq_puts(s, "\n\n");
170 seq_puts(s, " DVO AWG microcode:");
171 for (i = 0; i < AWG_MAX_INST; i++) {
172 if (i % 8 == 0)
173 seq_printf(s, "\n %04X:", i);
174 seq_printf(s, " %04X", readl(reg + i * 4));
175 }
176}
177
178static int dvo_dbg_show(struct seq_file *s, void *data)
179{
180 struct drm_info_node *node = s->private;
181 struct sti_dvo *dvo = (struct sti_dvo *)node->info_ent->data;
182
183 seq_printf(s, "DVO: (vaddr = 0x%p)", dvo->regs);
184 DBGFS_DUMP(DVO_AWG_DIGSYNC_CTRL);
185 DBGFS_DUMP(DVO_DOF_CFG);
186 DBGFS_DUMP(DVO_LUT_PROG_LOW);
187 DBGFS_DUMP(DVO_LUT_PROG_MID);
188 DBGFS_DUMP(DVO_LUT_PROG_HIGH);
189 dvo_dbg_awg_microcode(s, dvo->regs + DVO_DIGSYNC_INSTR_I);
190 seq_putc(s, '\n');
191 return 0;
192}
193
194static struct drm_info_list dvo_debugfs_files[] = {
195 { "dvo", dvo_dbg_show, 0, NULL },
196};
197
198static int dvo_debugfs_init(struct sti_dvo *dvo, struct drm_minor *minor)
199{
200 unsigned int i;
201
202 for (i = 0; i < ARRAY_SIZE(dvo_debugfs_files); i++)
203 dvo_debugfs_files[i].data = dvo;
204
205 return drm_debugfs_create_files(dvo_debugfs_files,
206 ARRAY_SIZE(dvo_debugfs_files),
207 minor->debugfs_root, minor);
208}
209
210static void sti_dvo_disable(struct drm_bridge *bridge)
211{
212 struct sti_dvo *dvo = bridge->driver_private;
213
214 if (!dvo->enabled)
215 return;
216
217 DRM_DEBUG_DRIVER("\n");
218
219 if (dvo->config->awg_fwgen_fct)
220 writel(0x00000000, dvo->regs + DVO_AWG_DIGSYNC_CTRL);
221
222 writel(0x00000000, dvo->regs + DVO_DOF_CFG);
223
224 if (dvo->panel)
225 dvo->panel->funcs->disable(dvo->panel);
226
227
228 clk_disable_unprepare(dvo->clk_pix);
229 clk_disable_unprepare(dvo->clk);
230
231 dvo->enabled = false;
232}
233
234static void sti_dvo_pre_enable(struct drm_bridge *bridge)
235{
236 struct sti_dvo *dvo = bridge->driver_private;
237 struct dvo_config *config = dvo->config;
238 u32 val;
239
240 DRM_DEBUG_DRIVER("\n");
241
242 if (dvo->enabled)
243 return;
244
245
246 writel(0x00000000, dvo->regs + DVO_DOF_CFG);
247 writel(0x00000000, dvo->regs + DVO_AWG_DIGSYNC_CTRL);
248
249 if (config->awg_fwgen_fct) {
250 u8 nb_instr;
251 u32 awg_ram_code[AWG_MAX_INST];
252
253 if (!dvo_awg_generate_code(dvo, &nb_instr, awg_ram_code))
254 dvo_awg_configure(dvo, awg_ram_code, nb_instr);
255 else
256 return;
257 }
258
259
260 if (clk_prepare_enable(dvo->clk_pix))
261 DRM_ERROR("Failed to prepare/enable dvo_pix clk\n");
262 if (clk_prepare_enable(dvo->clk))
263 DRM_ERROR("Failed to prepare/enable dvo clk\n");
264
265 if (dvo->panel)
266 dvo->panel->funcs->enable(dvo->panel);
267
268
269 writel(config->lowbyte, dvo->regs + DVO_LUT_PROG_LOW);
270 writel(config->midbyte, dvo->regs + DVO_LUT_PROG_MID);
271 writel(config->highbyte, dvo->regs + DVO_LUT_PROG_HIGH);
272
273
274 val = (config->flags | DVO_DOF_EN);
275 writel(val, dvo->regs + DVO_DOF_CFG);
276
277 dvo->enabled = true;
278}
279
280static void sti_dvo_set_mode(struct drm_bridge *bridge,
281 const struct drm_display_mode *mode,
282 const struct drm_display_mode *adjusted_mode)
283{
284 struct sti_dvo *dvo = bridge->driver_private;
285 struct sti_mixer *mixer = to_sti_mixer(dvo->encoder->crtc);
286 int rate = mode->clock * 1000;
287 struct clk *clkp;
288 int ret;
289
290 DRM_DEBUG_DRIVER("\n");
291
292 memcpy(&dvo->mode, mode, sizeof(struct drm_display_mode));
293
294
295
296 if (mixer->id == STI_MIXER_MAIN)
297 clkp = dvo->clk_main_parent;
298 else
299 clkp = dvo->clk_aux_parent;
300
301 if (clkp) {
302 clk_set_parent(dvo->clk_pix, clkp);
303 clk_set_parent(dvo->clk, clkp);
304 }
305
306
307 ret = clk_set_rate(dvo->clk_pix, rate);
308 if (ret < 0) {
309 DRM_ERROR("Cannot set rate (%dHz) for dvo_pix clk\n", rate);
310 return;
311 }
312
313 ret = clk_set_rate(dvo->clk, rate);
314 if (ret < 0) {
315 DRM_ERROR("Cannot set rate (%dHz) for dvo clk\n", rate);
316 return;
317 }
318
319
320 dvo->config = &rgb_24bit_de_cfg;
321}
322
323static void sti_dvo_bridge_nope(struct drm_bridge *bridge)
324{
325
326}
327
328static const struct drm_bridge_funcs sti_dvo_bridge_funcs = {
329 .pre_enable = sti_dvo_pre_enable,
330 .enable = sti_dvo_bridge_nope,
331 .disable = sti_dvo_disable,
332 .post_disable = sti_dvo_bridge_nope,
333 .mode_set = sti_dvo_set_mode,
334};
335
336static int sti_dvo_connector_get_modes(struct drm_connector *connector)
337{
338 struct sti_dvo_connector *dvo_connector
339 = to_sti_dvo_connector(connector);
340 struct sti_dvo *dvo = dvo_connector->dvo;
341
342 if (dvo->panel)
343 return dvo->panel->funcs->get_modes(dvo->panel);
344
345 return 0;
346}
347
348#define CLK_TOLERANCE_HZ 50
349
350static int sti_dvo_connector_mode_valid(struct drm_connector *connector,
351 struct drm_display_mode *mode)
352{
353 int target = mode->clock * 1000;
354 int target_min = target - CLK_TOLERANCE_HZ;
355 int target_max = target + CLK_TOLERANCE_HZ;
356 int result;
357 struct sti_dvo_connector *dvo_connector
358 = to_sti_dvo_connector(connector);
359 struct sti_dvo *dvo = dvo_connector->dvo;
360
361 result = clk_round_rate(dvo->clk_pix, target);
362
363 DRM_DEBUG_DRIVER("target rate = %d => available rate = %d\n",
364 target, result);
365
366 if ((result < target_min) || (result > target_max)) {
367 DRM_DEBUG_DRIVER("dvo pixclk=%d not supported\n", target);
368 return MODE_BAD;
369 }
370
371 return MODE_OK;
372}
373
374static const
375struct drm_connector_helper_funcs sti_dvo_connector_helper_funcs = {
376 .get_modes = sti_dvo_connector_get_modes,
377 .mode_valid = sti_dvo_connector_mode_valid,
378};
379
380static enum drm_connector_status
381sti_dvo_connector_detect(struct drm_connector *connector, bool force)
382{
383 struct sti_dvo_connector *dvo_connector
384 = to_sti_dvo_connector(connector);
385 struct sti_dvo *dvo = dvo_connector->dvo;
386
387 DRM_DEBUG_DRIVER("\n");
388
389 if (!dvo->panel) {
390 dvo->panel = of_drm_find_panel(dvo->panel_node);
391 if (IS_ERR(dvo->panel))
392 dvo->panel = NULL;
393 else
394 drm_panel_attach(dvo->panel, connector);
395 }
396
397 if (dvo->panel)
398 return connector_status_connected;
399
400 return connector_status_disconnected;
401}
402
403static int sti_dvo_late_register(struct drm_connector *connector)
404{
405 struct sti_dvo_connector *dvo_connector
406 = to_sti_dvo_connector(connector);
407 struct sti_dvo *dvo = dvo_connector->dvo;
408
409 if (dvo_debugfs_init(dvo, dvo->drm_dev->primary)) {
410 DRM_ERROR("DVO debugfs setup failed\n");
411 return -EINVAL;
412 }
413
414 return 0;
415}
416
417static const struct drm_connector_funcs sti_dvo_connector_funcs = {
418 .fill_modes = drm_helper_probe_single_connector_modes,
419 .detect = sti_dvo_connector_detect,
420 .destroy = drm_connector_cleanup,
421 .reset = drm_atomic_helper_connector_reset,
422 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
423 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
424 .late_register = sti_dvo_late_register,
425};
426
427static struct drm_encoder *sti_dvo_find_encoder(struct drm_device *dev)
428{
429 struct drm_encoder *encoder;
430
431 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
432 if (encoder->encoder_type == DRM_MODE_ENCODER_LVDS)
433 return encoder;
434 }
435
436 return NULL;
437}
438
439static int sti_dvo_bind(struct device *dev, struct device *master, void *data)
440{
441 struct sti_dvo *dvo = dev_get_drvdata(dev);
442 struct drm_device *drm_dev = data;
443 struct drm_encoder *encoder;
444 struct sti_dvo_connector *connector;
445 struct drm_connector *drm_connector;
446 struct drm_bridge *bridge;
447 int err;
448
449
450 dvo->drm_dev = drm_dev;
451
452 encoder = sti_dvo_find_encoder(drm_dev);
453 if (!encoder)
454 return -ENOMEM;
455
456 connector = devm_kzalloc(dev, sizeof(*connector), GFP_KERNEL);
457 if (!connector)
458 return -ENOMEM;
459
460 connector->dvo = dvo;
461
462 bridge = devm_kzalloc(dev, sizeof(*bridge), GFP_KERNEL);
463 if (!bridge)
464 return -ENOMEM;
465
466 bridge->driver_private = dvo;
467 bridge->funcs = &sti_dvo_bridge_funcs;
468 bridge->of_node = dvo->dev.of_node;
469 drm_bridge_add(bridge);
470
471 err = drm_bridge_attach(encoder, bridge, NULL);
472 if (err) {
473 DRM_ERROR("Failed to attach bridge\n");
474 return err;
475 }
476
477 dvo->bridge = bridge;
478 connector->encoder = encoder;
479 dvo->encoder = encoder;
480
481 drm_connector = (struct drm_connector *)connector;
482
483 drm_connector->polled = DRM_CONNECTOR_POLL_HPD;
484
485 drm_connector_init(drm_dev, drm_connector,
486 &sti_dvo_connector_funcs, DRM_MODE_CONNECTOR_LVDS);
487 drm_connector_helper_add(drm_connector,
488 &sti_dvo_connector_helper_funcs);
489
490 err = drm_connector_attach_encoder(drm_connector, encoder);
491 if (err) {
492 DRM_ERROR("Failed to attach a connector to a encoder\n");
493 goto err_sysfs;
494 }
495
496 return 0;
497
498err_sysfs:
499 drm_bridge_remove(bridge);
500 return -EINVAL;
501}
502
503static void sti_dvo_unbind(struct device *dev,
504 struct device *master, void *data)
505{
506 struct sti_dvo *dvo = dev_get_drvdata(dev);
507
508 drm_bridge_remove(dvo->bridge);
509}
510
511static const struct component_ops sti_dvo_ops = {
512 .bind = sti_dvo_bind,
513 .unbind = sti_dvo_unbind,
514};
515
516static int sti_dvo_probe(struct platform_device *pdev)
517{
518 struct device *dev = &pdev->dev;
519 struct sti_dvo *dvo;
520 struct resource *res;
521 struct device_node *np = dev->of_node;
522
523 DRM_INFO("%s\n", __func__);
524
525 dvo = devm_kzalloc(dev, sizeof(*dvo), GFP_KERNEL);
526 if (!dvo) {
527 DRM_ERROR("Failed to allocate memory for DVO\n");
528 return -ENOMEM;
529 }
530
531 dvo->dev = pdev->dev;
532
533 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dvo-reg");
534 if (!res) {
535 DRM_ERROR("Invalid dvo resource\n");
536 return -ENOMEM;
537 }
538 dvo->regs = devm_ioremap_nocache(dev, res->start,
539 resource_size(res));
540 if (!dvo->regs)
541 return -ENOMEM;
542
543 dvo->clk_pix = devm_clk_get(dev, "dvo_pix");
544 if (IS_ERR(dvo->clk_pix)) {
545 DRM_ERROR("Cannot get dvo_pix clock\n");
546 return PTR_ERR(dvo->clk_pix);
547 }
548
549 dvo->clk = devm_clk_get(dev, "dvo");
550 if (IS_ERR(dvo->clk)) {
551 DRM_ERROR("Cannot get dvo clock\n");
552 return PTR_ERR(dvo->clk);
553 }
554
555 dvo->clk_main_parent = devm_clk_get(dev, "main_parent");
556 if (IS_ERR(dvo->clk_main_parent)) {
557 DRM_DEBUG_DRIVER("Cannot get main_parent clock\n");
558 dvo->clk_main_parent = NULL;
559 }
560
561 dvo->clk_aux_parent = devm_clk_get(dev, "aux_parent");
562 if (IS_ERR(dvo->clk_aux_parent)) {
563 DRM_DEBUG_DRIVER("Cannot get aux_parent clock\n");
564 dvo->clk_aux_parent = NULL;
565 }
566
567 dvo->panel_node = of_parse_phandle(np, "sti,panel", 0);
568 if (!dvo->panel_node)
569 DRM_ERROR("No panel associated to the dvo output\n");
570 of_node_put(dvo->panel_node);
571
572 platform_set_drvdata(pdev, dvo);
573
574 return component_add(&pdev->dev, &sti_dvo_ops);
575}
576
577static int sti_dvo_remove(struct platform_device *pdev)
578{
579 component_del(&pdev->dev, &sti_dvo_ops);
580 return 0;
581}
582
583static const struct of_device_id dvo_of_match[] = {
584 { .compatible = "st,stih407-dvo", },
585 { }
586};
587MODULE_DEVICE_TABLE(of, dvo_of_match);
588
589struct platform_driver sti_dvo_driver = {
590 .driver = {
591 .name = "sti-dvo",
592 .owner = THIS_MODULE,
593 .of_match_table = dvo_of_match,
594 },
595 .probe = sti_dvo_probe,
596 .remove = sti_dvo_remove,
597};
598
599MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>");
600MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver");
601MODULE_LICENSE("GPL");
602
