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8#include <linux/backlight.h>
9#include <linux/delay.h>
10#include <linux/gpio/consumer.h>
11#include <linux/module.h>
12#include <linux/property.h>
13#include <linux/regulator/consumer.h>
14#include <linux/spi/spi.h>
15
16#include <drm/drm_atomic_helper.h>
17#include <drm/drm_drv.h>
18#include <drm/drm_fb_helper.h>
19#include <drm/drm_gem_cma_helper.h>
20#include <drm/drm_gem_framebuffer_helper.h>
21#include <drm/drm_modeset_helper.h>
22#include <drm/tinydrm/mipi-dbi.h>
23#include <drm/tinydrm/tinydrm-helpers.h>
24#include <video/mipi_display.h>
25
26#define ILI9341_FRMCTR1 0xb1
27#define ILI9341_DISCTRL 0xb6
28#define ILI9341_ETMOD 0xb7
29
30#define ILI9341_PWCTRL1 0xc0
31#define ILI9341_PWCTRL2 0xc1
32#define ILI9341_VMCTRL1 0xc5
33#define ILI9341_VMCTRL2 0xc7
34#define ILI9341_PWCTRLA 0xcb
35#define ILI9341_PWCTRLB 0xcf
36
37#define ILI9341_PGAMCTRL 0xe0
38#define ILI9341_NGAMCTRL 0xe1
39#define ILI9341_DTCTRLA 0xe8
40#define ILI9341_DTCTRLB 0xea
41#define ILI9341_PWRSEQ 0xed
42
43#define ILI9341_EN3GAM 0xf2
44#define ILI9341_PUMPCTRL 0xf7
45
46#define ILI9341_MADCTL_BGR BIT(3)
47#define ILI9341_MADCTL_MV BIT(5)
48#define ILI9341_MADCTL_MX BIT(6)
49#define ILI9341_MADCTL_MY BIT(7)
50
51static void mi0283qt_enable(struct drm_simple_display_pipe *pipe,
52 struct drm_crtc_state *crtc_state,
53 struct drm_plane_state *plane_state)
54{
55 struct mipi_dbi *mipi = drm_to_mipi_dbi(pipe->crtc.dev);
56 u8 addr_mode;
57 int ret, idx;
58
59 if (!drm_dev_enter(pipe->crtc.dev, &idx))
60 return;
61
62 DRM_DEBUG_KMS("\n");
63
64 ret = mipi_dbi_poweron_conditional_reset(mipi);
65 if (ret < 0)
66 goto out_exit;
67 if (ret == 1)
68 goto out_enable;
69
70 mipi_dbi_command(mipi, MIPI_DCS_SET_DISPLAY_OFF);
71
72 mipi_dbi_command(mipi, ILI9341_PWCTRLB, 0x00, 0x83, 0x30);
73 mipi_dbi_command(mipi, ILI9341_PWRSEQ, 0x64, 0x03, 0x12, 0x81);
74 mipi_dbi_command(mipi, ILI9341_DTCTRLA, 0x85, 0x01, 0x79);
75 mipi_dbi_command(mipi, ILI9341_PWCTRLA, 0x39, 0x2c, 0x00, 0x34, 0x02);
76 mipi_dbi_command(mipi, ILI9341_PUMPCTRL, 0x20);
77 mipi_dbi_command(mipi, ILI9341_DTCTRLB, 0x00, 0x00);
78
79
80 mipi_dbi_command(mipi, ILI9341_PWCTRL1, 0x26);
81 mipi_dbi_command(mipi, ILI9341_PWCTRL2, 0x11);
82
83 mipi_dbi_command(mipi, ILI9341_VMCTRL1, 0x35, 0x3e);
84 mipi_dbi_command(mipi, ILI9341_VMCTRL2, 0xbe);
85
86
87 mipi_dbi_command(mipi, MIPI_DCS_SET_PIXEL_FORMAT, MIPI_DCS_PIXEL_FMT_16BIT);
88
89
90 mipi_dbi_command(mipi, ILI9341_FRMCTR1, 0x00, 0x1b);
91
92
93 mipi_dbi_command(mipi, ILI9341_EN3GAM, 0x08);
94 mipi_dbi_command(mipi, MIPI_DCS_SET_GAMMA_CURVE, 0x01);
95 mipi_dbi_command(mipi, ILI9341_PGAMCTRL,
96 0x1f, 0x1a, 0x18, 0x0a, 0x0f, 0x06, 0x45, 0x87,
97 0x32, 0x0a, 0x07, 0x02, 0x07, 0x05, 0x00);
98 mipi_dbi_command(mipi, ILI9341_NGAMCTRL,
99 0x00, 0x25, 0x27, 0x05, 0x10, 0x09, 0x3a, 0x78,
100 0x4d, 0x05, 0x18, 0x0d, 0x38, 0x3a, 0x1f);
101
102
103 mipi_dbi_command(mipi, ILI9341_ETMOD, 0x07);
104
105
106 mipi_dbi_command(mipi, ILI9341_DISCTRL, 0x0a, 0x82, 0x27, 0x00);
107 mipi_dbi_command(mipi, MIPI_DCS_EXIT_SLEEP_MODE);
108 msleep(100);
109
110 mipi_dbi_command(mipi, MIPI_DCS_SET_DISPLAY_ON);
111 msleep(100);
112
113out_enable:
114
115
116
117
118
119
120 switch (mipi->rotation) {
121 default:
122 addr_mode = ILI9341_MADCTL_MV | ILI9341_MADCTL_MY |
123 ILI9341_MADCTL_MX;
124 break;
125 case 90:
126 addr_mode = ILI9341_MADCTL_MY;
127 break;
128 case 180:
129 addr_mode = ILI9341_MADCTL_MV;
130 break;
131 case 270:
132 addr_mode = ILI9341_MADCTL_MX;
133 break;
134 }
135 addr_mode |= ILI9341_MADCTL_BGR;
136 mipi_dbi_command(mipi, MIPI_DCS_SET_ADDRESS_MODE, addr_mode);
137 mipi_dbi_enable_flush(mipi, crtc_state, plane_state);
138out_exit:
139 drm_dev_exit(idx);
140}
141
142static const struct drm_simple_display_pipe_funcs mi0283qt_pipe_funcs = {
143 .enable = mi0283qt_enable,
144 .disable = mipi_dbi_pipe_disable,
145 .update = mipi_dbi_pipe_update,
146 .prepare_fb = drm_gem_fb_simple_display_pipe_prepare_fb,
147};
148
149static const struct drm_display_mode mi0283qt_mode = {
150 DRM_SIMPLE_MODE(320, 240, 58, 43),
151};
152
153DEFINE_DRM_GEM_CMA_FOPS(mi0283qt_fops);
154
155static struct drm_driver mi0283qt_driver = {
156 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME |
157 DRIVER_ATOMIC,
158 .fops = &mi0283qt_fops,
159 .release = mipi_dbi_release,
160 DRM_GEM_CMA_VMAP_DRIVER_OPS,
161 .debugfs_init = mipi_dbi_debugfs_init,
162 .name = "mi0283qt",
163 .desc = "Multi-Inno MI0283QT",
164 .date = "20160614",
165 .major = 1,
166 .minor = 0,
167};
168
169static const struct of_device_id mi0283qt_of_match[] = {
170 { .compatible = "multi-inno,mi0283qt" },
171 {},
172};
173MODULE_DEVICE_TABLE(of, mi0283qt_of_match);
174
175static const struct spi_device_id mi0283qt_id[] = {
176 { "mi0283qt", 0 },
177 { },
178};
179MODULE_DEVICE_TABLE(spi, mi0283qt_id);
180
181static int mi0283qt_probe(struct spi_device *spi)
182{
183 struct device *dev = &spi->dev;
184 struct drm_device *drm;
185 struct mipi_dbi *mipi;
186 struct gpio_desc *dc;
187 u32 rotation = 0;
188 int ret;
189
190 mipi = kzalloc(sizeof(*mipi), GFP_KERNEL);
191 if (!mipi)
192 return -ENOMEM;
193
194 drm = &mipi->drm;
195 ret = devm_drm_dev_init(dev, drm, &mi0283qt_driver);
196 if (ret) {
197 kfree(mipi);
198 return ret;
199 }
200
201 drm_mode_config_init(drm);
202
203 mipi->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
204 if (IS_ERR(mipi->reset)) {
205 DRM_DEV_ERROR(dev, "Failed to get gpio 'reset'\n");
206 return PTR_ERR(mipi->reset);
207 }
208
209 dc = devm_gpiod_get_optional(dev, "dc", GPIOD_OUT_LOW);
210 if (IS_ERR(dc)) {
211 DRM_DEV_ERROR(dev, "Failed to get gpio 'dc'\n");
212 return PTR_ERR(dc);
213 }
214
215 mipi->regulator = devm_regulator_get(dev, "power");
216 if (IS_ERR(mipi->regulator))
217 return PTR_ERR(mipi->regulator);
218
219 mipi->backlight = devm_of_find_backlight(dev);
220 if (IS_ERR(mipi->backlight))
221 return PTR_ERR(mipi->backlight);
222
223 device_property_read_u32(dev, "rotation", &rotation);
224
225 ret = mipi_dbi_spi_init(spi, mipi, dc);
226 if (ret)
227 return ret;
228
229 ret = mipi_dbi_init(mipi, &mi0283qt_pipe_funcs, &mi0283qt_mode, rotation);
230 if (ret)
231 return ret;
232
233 drm_mode_config_reset(drm);
234
235 ret = drm_dev_register(drm, 0);
236 if (ret)
237 return ret;
238
239 spi_set_drvdata(spi, drm);
240
241 drm_fbdev_generic_setup(drm, 0);
242
243 return 0;
244}
245
246static int mi0283qt_remove(struct spi_device *spi)
247{
248 struct drm_device *drm = spi_get_drvdata(spi);
249
250 drm_dev_unplug(drm);
251 drm_atomic_helper_shutdown(drm);
252
253 return 0;
254}
255
256static void mi0283qt_shutdown(struct spi_device *spi)
257{
258 drm_atomic_helper_shutdown(spi_get_drvdata(spi));
259}
260
261static int __maybe_unused mi0283qt_pm_suspend(struct device *dev)
262{
263 return drm_mode_config_helper_suspend(dev_get_drvdata(dev));
264}
265
266static int __maybe_unused mi0283qt_pm_resume(struct device *dev)
267{
268 drm_mode_config_helper_resume(dev_get_drvdata(dev));
269
270 return 0;
271}
272
273static const struct dev_pm_ops mi0283qt_pm_ops = {
274 SET_SYSTEM_SLEEP_PM_OPS(mi0283qt_pm_suspend, mi0283qt_pm_resume)
275};
276
277static struct spi_driver mi0283qt_spi_driver = {
278 .driver = {
279 .name = "mi0283qt",
280 .owner = THIS_MODULE,
281 .of_match_table = mi0283qt_of_match,
282 .pm = &mi0283qt_pm_ops,
283 },
284 .id_table = mi0283qt_id,
285 .probe = mi0283qt_probe,
286 .remove = mi0283qt_remove,
287 .shutdown = mi0283qt_shutdown,
288};
289module_spi_driver(mi0283qt_spi_driver);
290
291MODULE_DESCRIPTION("Multi-Inno MI0283QT DRM driver");
292MODULE_AUTHOR("Noralf Trønnes");
293MODULE_LICENSE("GPL");
294
