linux/drivers/gpu/host1x/dev.h
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   1/* SPDX-License-Identifier: GPL-2.0-only */
   2/*
   3 * Copyright (c) 2012-2015, NVIDIA Corporation.
   4 */
   5
   6#ifndef HOST1X_DEV_H
   7#define HOST1X_DEV_H
   8
   9#include <linux/device.h>
  10#include <linux/iommu.h>
  11#include <linux/iova.h>
  12#include <linux/platform_device.h>
  13#include <linux/reset.h>
  14
  15#include "cdma.h"
  16#include "channel.h"
  17#include "intr.h"
  18#include "job.h"
  19#include "syncpt.h"
  20
  21struct host1x_syncpt;
  22struct host1x_syncpt_base;
  23struct host1x_channel;
  24struct host1x_cdma;
  25struct host1x_job;
  26struct push_buffer;
  27struct output;
  28struct dentry;
  29
  30struct host1x_channel_ops {
  31        int (*init)(struct host1x_channel *channel, struct host1x *host,
  32                    unsigned int id);
  33        int (*submit)(struct host1x_job *job);
  34};
  35
  36struct host1x_cdma_ops {
  37        void (*start)(struct host1x_cdma *cdma);
  38        void (*stop)(struct host1x_cdma *cdma);
  39        void (*flush)(struct  host1x_cdma *cdma);
  40        int (*timeout_init)(struct host1x_cdma *cdma, unsigned int syncpt);
  41        void (*timeout_destroy)(struct host1x_cdma *cdma);
  42        void (*freeze)(struct host1x_cdma *cdma);
  43        void (*resume)(struct host1x_cdma *cdma, u32 getptr);
  44        void (*timeout_cpu_incr)(struct host1x_cdma *cdma, u32 getptr,
  45                                 u32 syncpt_incrs, u32 syncval, u32 nr_slots);
  46};
  47
  48struct host1x_pushbuffer_ops {
  49        void (*init)(struct push_buffer *pb);
  50};
  51
  52struct host1x_debug_ops {
  53        void (*debug_init)(struct dentry *de);
  54        void (*show_channel_cdma)(struct host1x *host,
  55                                  struct host1x_channel *ch,
  56                                  struct output *o);
  57        void (*show_channel_fifo)(struct host1x *host,
  58                                  struct host1x_channel *ch,
  59                                  struct output *o);
  60        void (*show_mlocks)(struct host1x *host, struct output *output);
  61
  62};
  63
  64struct host1x_syncpt_ops {
  65        void (*restore)(struct host1x_syncpt *syncpt);
  66        void (*restore_wait_base)(struct host1x_syncpt *syncpt);
  67        void (*load_wait_base)(struct host1x_syncpt *syncpt);
  68        u32 (*load)(struct host1x_syncpt *syncpt);
  69        int (*cpu_incr)(struct host1x_syncpt *syncpt);
  70        void (*assign_to_channel)(struct host1x_syncpt *syncpt,
  71                                  struct host1x_channel *channel);
  72        void (*enable_protection)(struct host1x *host);
  73};
  74
  75struct host1x_intr_ops {
  76        int (*init_host_sync)(struct host1x *host, u32 cpm,
  77                void (*syncpt_thresh_work)(struct work_struct *work));
  78        void (*set_syncpt_threshold)(
  79                struct host1x *host, unsigned int id, u32 thresh);
  80        void (*enable_syncpt_intr)(struct host1x *host, unsigned int id);
  81        void (*disable_syncpt_intr)(struct host1x *host, unsigned int id);
  82        void (*disable_all_syncpt_intrs)(struct host1x *host);
  83        int (*free_syncpt_irq)(struct host1x *host);
  84};
  85
  86struct host1x_sid_entry {
  87        unsigned int base;
  88        unsigned int offset;
  89        unsigned int limit;
  90};
  91
  92struct host1x_info {
  93        unsigned int nb_channels; /* host1x: number of channels supported */
  94        unsigned int nb_pts; /* host1x: number of syncpoints supported */
  95        unsigned int nb_bases; /* host1x: number of syncpoint bases supported */
  96        unsigned int nb_mlocks; /* host1x: number of mlocks supported */
  97        int (*init)(struct host1x *host1x); /* initialize per SoC ops */
  98        unsigned int sync_offset; /* offset of syncpoint registers */
  99        u64 dma_mask; /* mask of addressable memory */
 100        bool has_hypervisor; /* has hypervisor registers */
 101        unsigned int num_sid_entries;
 102        const struct host1x_sid_entry *sid_table;
 103};
 104
 105struct host1x {
 106        const struct host1x_info *info;
 107
 108        void __iomem *regs;
 109        void __iomem *hv_regs; /* hypervisor region */
 110        struct host1x_syncpt *syncpt;
 111        struct host1x_syncpt_base *bases;
 112        struct device *dev;
 113        struct clk *clk;
 114        struct reset_control *rst;
 115
 116        struct iommu_group *group;
 117        struct iommu_domain *domain;
 118        struct iova_domain iova;
 119        dma_addr_t iova_end;
 120
 121        struct mutex intr_mutex;
 122        int intr_syncpt_irq;
 123
 124        const struct host1x_syncpt_ops *syncpt_op;
 125        const struct host1x_intr_ops *intr_op;
 126        const struct host1x_channel_ops *channel_op;
 127        const struct host1x_cdma_ops *cdma_op;
 128        const struct host1x_pushbuffer_ops *cdma_pb_op;
 129        const struct host1x_debug_ops *debug_op;
 130
 131        struct host1x_syncpt *nop_sp;
 132
 133        struct mutex syncpt_mutex;
 134
 135        struct host1x_channel_list channel_list;
 136
 137        struct dentry *debugfs;
 138
 139        struct mutex devices_lock;
 140        struct list_head devices;
 141
 142        struct list_head list;
 143};
 144
 145void host1x_hypervisor_writel(struct host1x *host1x, u32 r, u32 v);
 146u32 host1x_hypervisor_readl(struct host1x *host1x, u32 r);
 147void host1x_sync_writel(struct host1x *host1x, u32 r, u32 v);
 148u32 host1x_sync_readl(struct host1x *host1x, u32 r);
 149void host1x_ch_writel(struct host1x_channel *ch, u32 r, u32 v);
 150u32 host1x_ch_readl(struct host1x_channel *ch, u32 r);
 151
 152static inline void host1x_hw_syncpt_restore(struct host1x *host,
 153                                            struct host1x_syncpt *sp)
 154{
 155        host->syncpt_op->restore(sp);
 156}
 157
 158static inline void host1x_hw_syncpt_restore_wait_base(struct host1x *host,
 159                                                      struct host1x_syncpt *sp)
 160{
 161        host->syncpt_op->restore_wait_base(sp);
 162}
 163
 164static inline void host1x_hw_syncpt_load_wait_base(struct host1x *host,
 165                                                   struct host1x_syncpt *sp)
 166{
 167        host->syncpt_op->load_wait_base(sp);
 168}
 169
 170static inline u32 host1x_hw_syncpt_load(struct host1x *host,
 171                                        struct host1x_syncpt *sp)
 172{
 173        return host->syncpt_op->load(sp);
 174}
 175
 176static inline int host1x_hw_syncpt_cpu_incr(struct host1x *host,
 177                                            struct host1x_syncpt *sp)
 178{
 179        return host->syncpt_op->cpu_incr(sp);
 180}
 181
 182static inline void host1x_hw_syncpt_assign_to_channel(
 183        struct host1x *host, struct host1x_syncpt *sp,
 184        struct host1x_channel *ch)
 185{
 186        return host->syncpt_op->assign_to_channel(sp, ch);
 187}
 188
 189static inline void host1x_hw_syncpt_enable_protection(struct host1x *host)
 190{
 191        return host->syncpt_op->enable_protection(host);
 192}
 193
 194static inline int host1x_hw_intr_init_host_sync(struct host1x *host, u32 cpm,
 195                        void (*syncpt_thresh_work)(struct work_struct *))
 196{
 197        return host->intr_op->init_host_sync(host, cpm, syncpt_thresh_work);
 198}
 199
 200static inline void host1x_hw_intr_set_syncpt_threshold(struct host1x *host,
 201                                                       unsigned int id,
 202                                                       u32 thresh)
 203{
 204        host->intr_op->set_syncpt_threshold(host, id, thresh);
 205}
 206
 207static inline void host1x_hw_intr_enable_syncpt_intr(struct host1x *host,
 208                                                     unsigned int id)
 209{
 210        host->intr_op->enable_syncpt_intr(host, id);
 211}
 212
 213static inline void host1x_hw_intr_disable_syncpt_intr(struct host1x *host,
 214                                                      unsigned int id)
 215{
 216        host->intr_op->disable_syncpt_intr(host, id);
 217}
 218
 219static inline void host1x_hw_intr_disable_all_syncpt_intrs(struct host1x *host)
 220{
 221        host->intr_op->disable_all_syncpt_intrs(host);
 222}
 223
 224static inline int host1x_hw_intr_free_syncpt_irq(struct host1x *host)
 225{
 226        return host->intr_op->free_syncpt_irq(host);
 227}
 228
 229static inline int host1x_hw_channel_init(struct host1x *host,
 230                                         struct host1x_channel *channel,
 231                                         unsigned int id)
 232{
 233        return host->channel_op->init(channel, host, id);
 234}
 235
 236static inline int host1x_hw_channel_submit(struct host1x *host,
 237                                           struct host1x_job *job)
 238{
 239        return host->channel_op->submit(job);
 240}
 241
 242static inline void host1x_hw_cdma_start(struct host1x *host,
 243                                        struct host1x_cdma *cdma)
 244{
 245        host->cdma_op->start(cdma);
 246}
 247
 248static inline void host1x_hw_cdma_stop(struct host1x *host,
 249                                       struct host1x_cdma *cdma)
 250{
 251        host->cdma_op->stop(cdma);
 252}
 253
 254static inline void host1x_hw_cdma_flush(struct host1x *host,
 255                                        struct host1x_cdma *cdma)
 256{
 257        host->cdma_op->flush(cdma);
 258}
 259
 260static inline int host1x_hw_cdma_timeout_init(struct host1x *host,
 261                                              struct host1x_cdma *cdma,
 262                                              unsigned int syncpt)
 263{
 264        return host->cdma_op->timeout_init(cdma, syncpt);
 265}
 266
 267static inline void host1x_hw_cdma_timeout_destroy(struct host1x *host,
 268                                                  struct host1x_cdma *cdma)
 269{
 270        host->cdma_op->timeout_destroy(cdma);
 271}
 272
 273static inline void host1x_hw_cdma_freeze(struct host1x *host,
 274                                         struct host1x_cdma *cdma)
 275{
 276        host->cdma_op->freeze(cdma);
 277}
 278
 279static inline void host1x_hw_cdma_resume(struct host1x *host,
 280                                         struct host1x_cdma *cdma, u32 getptr)
 281{
 282        host->cdma_op->resume(cdma, getptr);
 283}
 284
 285static inline void host1x_hw_cdma_timeout_cpu_incr(struct host1x *host,
 286                                                   struct host1x_cdma *cdma,
 287                                                   u32 getptr,
 288                                                   u32 syncpt_incrs,
 289                                                   u32 syncval, u32 nr_slots)
 290{
 291        host->cdma_op->timeout_cpu_incr(cdma, getptr, syncpt_incrs, syncval,
 292                                        nr_slots);
 293}
 294
 295static inline void host1x_hw_pushbuffer_init(struct host1x *host,
 296                                             struct push_buffer *pb)
 297{
 298        host->cdma_pb_op->init(pb);
 299}
 300
 301static inline void host1x_hw_debug_init(struct host1x *host, struct dentry *de)
 302{
 303        if (host->debug_op && host->debug_op->debug_init)
 304                host->debug_op->debug_init(de);
 305}
 306
 307static inline void host1x_hw_show_channel_cdma(struct host1x *host,
 308                                               struct host1x_channel *channel,
 309                                               struct output *o)
 310{
 311        host->debug_op->show_channel_cdma(host, channel, o);
 312}
 313
 314static inline void host1x_hw_show_channel_fifo(struct host1x *host,
 315                                               struct host1x_channel *channel,
 316                                               struct output *o)
 317{
 318        host->debug_op->show_channel_fifo(host, channel, o);
 319}
 320
 321static inline void host1x_hw_show_mlocks(struct host1x *host, struct output *o)
 322{
 323        host->debug_op->show_mlocks(host, o);
 324}
 325
 326extern struct platform_driver tegra_mipi_driver;
 327
 328#endif
 329