linux/drivers/i2c/busses/i2c-designware-platdrv.c
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   1// SPDX-License-Identifier: GPL-2.0-or-later
   2/*
   3 * Synopsys DesignWare I2C adapter driver.
   4 *
   5 * Based on the TI DAVINCI I2C adapter driver.
   6 *
   7 * Copyright (C) 2006 Texas Instruments.
   8 * Copyright (C) 2007 MontaVista Software Inc.
   9 * Copyright (C) 2009 Provigent Ltd.
  10 */
  11#include <linux/acpi.h>
  12#include <linux/clk-provider.h>
  13#include <linux/clk.h>
  14#include <linux/delay.h>
  15#include <linux/dmi.h>
  16#include <linux/err.h>
  17#include <linux/errno.h>
  18#include <linux/i2c.h>
  19#include <linux/interrupt.h>
  20#include <linux/io.h>
  21#include <linux/kernel.h>
  22#include <linux/module.h>
  23#include <linux/of.h>
  24#include <linux/platform_data/i2c-designware.h>
  25#include <linux/platform_device.h>
  26#include <linux/pm.h>
  27#include <linux/pm_runtime.h>
  28#include <linux/property.h>
  29#include <linux/reset.h>
  30#include <linux/sched.h>
  31#include <linux/slab.h>
  32#include <linux/suspend.h>
  33
  34#include "i2c-designware-core.h"
  35
  36static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
  37{
  38        return clk_get_rate(dev->clk)/1000;
  39}
  40
  41#ifdef CONFIG_ACPI
  42/*
  43 * The HCNT/LCNT information coming from ACPI should be the most accurate
  44 * for given platform. However, some systems get it wrong. On such systems
  45 * we get better results by calculating those based on the input clock.
  46 */
  47static const struct dmi_system_id dw_i2c_no_acpi_params[] = {
  48        {
  49                .ident = "Dell Inspiron 7348",
  50                .matches = {
  51                        DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  52                        DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 7348"),
  53                },
  54        },
  55        { }
  56};
  57
  58static void dw_i2c_acpi_params(struct platform_device *pdev, char method[],
  59                               u16 *hcnt, u16 *lcnt, u32 *sda_hold)
  60{
  61        struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER };
  62        acpi_handle handle = ACPI_HANDLE(&pdev->dev);
  63        union acpi_object *obj;
  64
  65        if (dmi_check_system(dw_i2c_no_acpi_params))
  66                return;
  67
  68        if (ACPI_FAILURE(acpi_evaluate_object(handle, method, NULL, &buf)))
  69                return;
  70
  71        obj = (union acpi_object *)buf.pointer;
  72        if (obj->type == ACPI_TYPE_PACKAGE && obj->package.count == 3) {
  73                const union acpi_object *objs = obj->package.elements;
  74
  75                *hcnt = (u16)objs[0].integer.value;
  76                *lcnt = (u16)objs[1].integer.value;
  77                *sda_hold = (u32)objs[2].integer.value;
  78        }
  79
  80        kfree(buf.pointer);
  81}
  82
  83static int dw_i2c_acpi_configure(struct platform_device *pdev)
  84{
  85        struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
  86        struct i2c_timings *t = &dev->timings;
  87        u32 ss_ht = 0, fp_ht = 0, hs_ht = 0, fs_ht = 0;
  88
  89        dev->tx_fifo_depth = 32;
  90        dev->rx_fifo_depth = 32;
  91
  92        /*
  93         * Try to get SDA hold time and *CNT values from an ACPI method for
  94         * selected speed modes.
  95         */
  96        dw_i2c_acpi_params(pdev, "SSCN", &dev->ss_hcnt, &dev->ss_lcnt, &ss_ht);
  97        dw_i2c_acpi_params(pdev, "FPCN", &dev->fp_hcnt, &dev->fp_lcnt, &fp_ht);
  98        dw_i2c_acpi_params(pdev, "HSCN", &dev->hs_hcnt, &dev->hs_lcnt, &hs_ht);
  99        dw_i2c_acpi_params(pdev, "FMCN", &dev->fs_hcnt, &dev->fs_lcnt, &fs_ht);
 100
 101        switch (t->bus_freq_hz) {
 102        case 100000:
 103                dev->sda_hold_time = ss_ht;
 104                break;
 105        case 1000000:
 106                dev->sda_hold_time = fp_ht;
 107                break;
 108        case 3400000:
 109                dev->sda_hold_time = hs_ht;
 110                break;
 111        case 400000:
 112        default:
 113                dev->sda_hold_time = fs_ht;
 114                break;
 115        }
 116
 117        return 0;
 118}
 119
 120static const struct acpi_device_id dw_i2c_acpi_match[] = {
 121        { "INT33C2", 0 },
 122        { "INT33C3", 0 },
 123        { "INT3432", 0 },
 124        { "INT3433", 0 },
 125        { "80860F41", ACCESS_NO_IRQ_SUSPEND },
 126        { "808622C1", ACCESS_NO_IRQ_SUSPEND | MODEL_CHERRYTRAIL },
 127        { "AMD0010", ACCESS_INTR_MASK },
 128        { "AMDI0010", ACCESS_INTR_MASK },
 129        { "AMDI0510", 0 },
 130        { "APMC0D0F", 0 },
 131        { "HISI02A1", 0 },
 132        { "HISI02A2", 0 },
 133        { }
 134};
 135MODULE_DEVICE_TABLE(acpi, dw_i2c_acpi_match);
 136#else
 137static inline int dw_i2c_acpi_configure(struct platform_device *pdev)
 138{
 139        return -ENODEV;
 140}
 141#endif
 142
 143#ifdef CONFIG_OF
 144#define MSCC_ICPU_CFG_TWI_DELAY         0x0
 145#define MSCC_ICPU_CFG_TWI_DELAY_ENABLE  BIT(0)
 146#define MSCC_ICPU_CFG_TWI_SPIKE_FILTER  0x4
 147
 148static int mscc_twi_set_sda_hold_time(struct dw_i2c_dev *dev)
 149{
 150        writel((dev->sda_hold_time << 1) | MSCC_ICPU_CFG_TWI_DELAY_ENABLE,
 151               dev->ext + MSCC_ICPU_CFG_TWI_DELAY);
 152
 153        return 0;
 154}
 155
 156static int dw_i2c_of_configure(struct platform_device *pdev)
 157{
 158        struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
 159        struct resource *mem;
 160
 161        switch (dev->flags & MODEL_MASK) {
 162        case MODEL_MSCC_OCELOT:
 163                mem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
 164                dev->ext = devm_ioremap_resource(&pdev->dev, mem);
 165                if (!IS_ERR(dev->ext))
 166                        dev->set_sda_hold_time = mscc_twi_set_sda_hold_time;
 167                break;
 168        default:
 169                break;
 170        }
 171
 172        return 0;
 173}
 174
 175static const struct of_device_id dw_i2c_of_match[] = {
 176        { .compatible = "snps,designware-i2c", },
 177        { .compatible = "mscc,ocelot-i2c", .data = (void *)MODEL_MSCC_OCELOT },
 178        {},
 179};
 180MODULE_DEVICE_TABLE(of, dw_i2c_of_match);
 181#else
 182static inline int dw_i2c_of_configure(struct platform_device *pdev)
 183{
 184        return -ENODEV;
 185}
 186#endif
 187
 188static void i2c_dw_configure_master(struct dw_i2c_dev *dev)
 189{
 190        struct i2c_timings *t = &dev->timings;
 191
 192        dev->functionality = I2C_FUNC_10BIT_ADDR | DW_IC_DEFAULT_FUNCTIONALITY;
 193
 194        dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE |
 195                          DW_IC_CON_RESTART_EN;
 196
 197        dev->mode = DW_IC_MASTER;
 198
 199        switch (t->bus_freq_hz) {
 200        case 100000:
 201                dev->master_cfg |= DW_IC_CON_SPEED_STD;
 202                break;
 203        case 3400000:
 204                dev->master_cfg |= DW_IC_CON_SPEED_HIGH;
 205                break;
 206        default:
 207                dev->master_cfg |= DW_IC_CON_SPEED_FAST;
 208        }
 209}
 210
 211static void i2c_dw_configure_slave(struct dw_i2c_dev *dev)
 212{
 213        dev->functionality = I2C_FUNC_SLAVE | DW_IC_DEFAULT_FUNCTIONALITY;
 214
 215        dev->slave_cfg = DW_IC_CON_RX_FIFO_FULL_HLD_CTRL |
 216                         DW_IC_CON_RESTART_EN | DW_IC_CON_STOP_DET_IFADDRESSED;
 217
 218        dev->mode = DW_IC_SLAVE;
 219}
 220
 221static void dw_i2c_set_fifo_size(struct dw_i2c_dev *dev)
 222{
 223        u32 param, tx_fifo_depth, rx_fifo_depth;
 224
 225        /*
 226         * Try to detect the FIFO depth if not set by interface driver,
 227         * the depth could be from 2 to 256 from HW spec.
 228         */
 229        param = i2c_dw_read_comp_param(dev);
 230        tx_fifo_depth = ((param >> 16) & 0xff) + 1;
 231        rx_fifo_depth = ((param >> 8)  & 0xff) + 1;
 232        if (!dev->tx_fifo_depth) {
 233                dev->tx_fifo_depth = tx_fifo_depth;
 234                dev->rx_fifo_depth = rx_fifo_depth;
 235        } else if (tx_fifo_depth >= 2) {
 236                dev->tx_fifo_depth = min_t(u32, dev->tx_fifo_depth,
 237                                tx_fifo_depth);
 238                dev->rx_fifo_depth = min_t(u32, dev->rx_fifo_depth,
 239                                rx_fifo_depth);
 240        }
 241}
 242
 243static void dw_i2c_plat_pm_cleanup(struct dw_i2c_dev *dev)
 244{
 245        pm_runtime_disable(dev->dev);
 246
 247        if (dev->shared_with_punit)
 248                pm_runtime_put_noidle(dev->dev);
 249}
 250
 251static int dw_i2c_plat_probe(struct platform_device *pdev)
 252{
 253        struct dw_i2c_platform_data *pdata = dev_get_platdata(&pdev->dev);
 254        struct i2c_adapter *adap;
 255        struct dw_i2c_dev *dev;
 256        struct i2c_timings *t;
 257        u32 acpi_speed;
 258        struct resource *mem;
 259        int i, irq, ret;
 260        static const int supported_speeds[] = {
 261                0, 100000, 400000, 1000000, 3400000
 262        };
 263
 264        irq = platform_get_irq(pdev, 0);
 265        if (irq < 0)
 266                return irq;
 267
 268        dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL);
 269        if (!dev)
 270                return -ENOMEM;
 271
 272        mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 273        dev->base = devm_ioremap_resource(&pdev->dev, mem);
 274        if (IS_ERR(dev->base))
 275                return PTR_ERR(dev->base);
 276
 277        dev->dev = &pdev->dev;
 278        dev->irq = irq;
 279        platform_set_drvdata(pdev, dev);
 280
 281        dev->rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL);
 282        if (IS_ERR(dev->rst)) {
 283                if (PTR_ERR(dev->rst) == -EPROBE_DEFER)
 284                        return -EPROBE_DEFER;
 285        } else {
 286                reset_control_deassert(dev->rst);
 287        }
 288
 289        t = &dev->timings;
 290        if (pdata)
 291                t->bus_freq_hz = pdata->i2c_scl_freq;
 292        else
 293                i2c_parse_fw_timings(&pdev->dev, t, false);
 294
 295        acpi_speed = i2c_acpi_find_bus_speed(&pdev->dev);
 296        /*
 297         * Some DSTDs use a non standard speed, round down to the lowest
 298         * standard speed.
 299         */
 300        for (i = 1; i < ARRAY_SIZE(supported_speeds); i++) {
 301                if (acpi_speed < supported_speeds[i])
 302                        break;
 303        }
 304        acpi_speed = supported_speeds[i - 1];
 305
 306        /*
 307         * Find bus speed from the "clock-frequency" device property, ACPI
 308         * or by using fast mode if neither is set.
 309         */
 310        if (acpi_speed && t->bus_freq_hz)
 311                t->bus_freq_hz = min(t->bus_freq_hz, acpi_speed);
 312        else if (acpi_speed || t->bus_freq_hz)
 313                t->bus_freq_hz = max(t->bus_freq_hz, acpi_speed);
 314        else
 315                t->bus_freq_hz = 400000;
 316
 317        dev->flags |= (uintptr_t)device_get_match_data(&pdev->dev);
 318
 319        if (pdev->dev.of_node)
 320                dw_i2c_of_configure(pdev);
 321
 322        if (has_acpi_companion(&pdev->dev))
 323                dw_i2c_acpi_configure(pdev);
 324
 325        /*
 326         * Only standard mode at 100kHz, fast mode at 400kHz,
 327         * fast mode plus at 1MHz and high speed mode at 3.4MHz are supported.
 328         */
 329        if (t->bus_freq_hz != 100000 && t->bus_freq_hz != 400000 &&
 330            t->bus_freq_hz != 1000000 && t->bus_freq_hz != 3400000) {
 331                dev_err(&pdev->dev,
 332                        "%d Hz is unsupported, only 100kHz, 400kHz, 1MHz and 3.4MHz are supported\n",
 333                        t->bus_freq_hz);
 334                ret = -EINVAL;
 335                goto exit_reset;
 336        }
 337
 338        ret = i2c_dw_probe_lock_support(dev);
 339        if (ret)
 340                goto exit_reset;
 341
 342        if (i2c_detect_slave_mode(&pdev->dev))
 343                i2c_dw_configure_slave(dev);
 344        else
 345                i2c_dw_configure_master(dev);
 346
 347        /* Optional interface clock */
 348        dev->pclk = devm_clk_get_optional(&pdev->dev, "pclk");
 349        if (IS_ERR(dev->pclk))
 350                return PTR_ERR(dev->pclk);
 351
 352        dev->clk = devm_clk_get(&pdev->dev, NULL);
 353        if (!i2c_dw_prepare_clk(dev, true)) {
 354                u64 clk_khz;
 355
 356                dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz;
 357                clk_khz = dev->get_clk_rate_khz(dev);
 358
 359                if (!dev->sda_hold_time && t->sda_hold_ns)
 360                        dev->sda_hold_time =
 361                                div_u64(clk_khz * t->sda_hold_ns + 500000, 1000000);
 362        }
 363
 364        dw_i2c_set_fifo_size(dev);
 365
 366        adap = &dev->adapter;
 367        adap->owner = THIS_MODULE;
 368        adap->class = I2C_CLASS_DEPRECATED;
 369        ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev));
 370        adap->dev.of_node = pdev->dev.of_node;
 371        adap->nr = -1;
 372
 373        dev_pm_set_driver_flags(&pdev->dev,
 374                                DPM_FLAG_SMART_PREPARE |
 375                                DPM_FLAG_SMART_SUSPEND |
 376                                DPM_FLAG_LEAVE_SUSPENDED);
 377
 378        /* The code below assumes runtime PM to be disabled. */
 379        WARN_ON(pm_runtime_enabled(&pdev->dev));
 380
 381        pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
 382        pm_runtime_use_autosuspend(&pdev->dev);
 383        pm_runtime_set_active(&pdev->dev);
 384
 385        if (dev->shared_with_punit)
 386                pm_runtime_get_noresume(&pdev->dev);
 387
 388        pm_runtime_enable(&pdev->dev);
 389
 390        if (dev->mode == DW_IC_SLAVE)
 391                ret = i2c_dw_probe_slave(dev);
 392        else
 393                ret = i2c_dw_probe(dev);
 394
 395        if (ret)
 396                goto exit_probe;
 397
 398        return ret;
 399
 400exit_probe:
 401        dw_i2c_plat_pm_cleanup(dev);
 402exit_reset:
 403        if (!IS_ERR_OR_NULL(dev->rst))
 404                reset_control_assert(dev->rst);
 405        return ret;
 406}
 407
 408static int dw_i2c_plat_remove(struct platform_device *pdev)
 409{
 410        struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
 411
 412        pm_runtime_get_sync(&pdev->dev);
 413
 414        i2c_del_adapter(&dev->adapter);
 415
 416        dev->disable(dev);
 417
 418        pm_runtime_dont_use_autosuspend(&pdev->dev);
 419        pm_runtime_put_sync(&pdev->dev);
 420        dw_i2c_plat_pm_cleanup(dev);
 421
 422        if (!IS_ERR_OR_NULL(dev->rst))
 423                reset_control_assert(dev->rst);
 424
 425        return 0;
 426}
 427
 428#ifdef CONFIG_PM_SLEEP
 429static int dw_i2c_plat_prepare(struct device *dev)
 430{
 431        /*
 432         * If the ACPI companion device object is present for this device, it
 433         * may be accessed during suspend and resume of other devices via I2C
 434         * operation regions, so tell the PM core and middle layers to avoid
 435         * skipping system suspend/resume callbacks for it in that case.
 436         */
 437        return !has_acpi_companion(dev);
 438}
 439
 440static void dw_i2c_plat_complete(struct device *dev)
 441{
 442        /*
 443         * The device can only be in runtime suspend at this point if it has not
 444         * been resumed throughout the ending system suspend/resume cycle, so if
 445         * the platform firmware might mess up with it, request the runtime PM
 446         * framework to resume it.
 447         */
 448        if (pm_runtime_suspended(dev) && pm_resume_via_firmware())
 449                pm_request_resume(dev);
 450}
 451#else
 452#define dw_i2c_plat_prepare     NULL
 453#define dw_i2c_plat_complete    NULL
 454#endif
 455
 456#ifdef CONFIG_PM
 457static int dw_i2c_plat_suspend(struct device *dev)
 458{
 459        struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
 460
 461        i_dev->suspended = true;
 462
 463        if (i_dev->shared_with_punit)
 464                return 0;
 465
 466        i_dev->disable(i_dev);
 467        i2c_dw_prepare_clk(i_dev, false);
 468
 469        return 0;
 470}
 471
 472static int dw_i2c_plat_resume(struct device *dev)
 473{
 474        struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
 475
 476        if (!i_dev->shared_with_punit)
 477                i2c_dw_prepare_clk(i_dev, true);
 478
 479        i_dev->init(i_dev);
 480        i_dev->suspended = false;
 481
 482        return 0;
 483}
 484
 485static const struct dev_pm_ops dw_i2c_dev_pm_ops = {
 486        .prepare = dw_i2c_plat_prepare,
 487        .complete = dw_i2c_plat_complete,
 488        SET_LATE_SYSTEM_SLEEP_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume)
 489        SET_RUNTIME_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume, NULL)
 490};
 491
 492#define DW_I2C_DEV_PMOPS (&dw_i2c_dev_pm_ops)
 493#else
 494#define DW_I2C_DEV_PMOPS NULL
 495#endif
 496
 497/* Work with hotplug and coldplug */
 498MODULE_ALIAS("platform:i2c_designware");
 499
 500static struct platform_driver dw_i2c_driver = {
 501        .probe = dw_i2c_plat_probe,
 502        .remove = dw_i2c_plat_remove,
 503        .driver         = {
 504                .name   = "i2c_designware",
 505                .of_match_table = of_match_ptr(dw_i2c_of_match),
 506                .acpi_match_table = ACPI_PTR(dw_i2c_acpi_match),
 507                .pm     = DW_I2C_DEV_PMOPS,
 508        },
 509};
 510
 511static int __init dw_i2c_init_driver(void)
 512{
 513        return platform_driver_register(&dw_i2c_driver);
 514}
 515subsys_initcall(dw_i2c_init_driver);
 516
 517static void __exit dw_i2c_exit_driver(void)
 518{
 519        platform_driver_unregister(&dw_i2c_driver);
 520}
 521module_exit(dw_i2c_exit_driver);
 522
 523MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
 524MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter");
 525MODULE_LICENSE("GPL");
 526