LXR linux/drivers/ide/opti621.c

   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 *  Copyright (C) 1996-1998  Linus Torvalds & authors (see below)
   4 */
   5
   6/*
   7 * Authors:
   8 * Jaromir Koutek <miri@punknet.cz>,
   9 * Jan Harkes <jaharkes@cwi.nl>,
  10 * Mark Lord <mlord@pobox.com>
  11 * Some parts of code are from ali14xx.c and from rz1000.c.
  12 */
  13
  14#include <linux/types.h>
  15#include <linux/module.h>
  16#include <linux/kernel.h>
  17#include <linux/pci.h>
  18#include <linux/ide.h>
  19
  20#include <asm/io.h>
  21
  22#define DRV_NAME "opti621"
  23
  24#define READ_REG 0      /* index of Read cycle timing register */
  25#define WRITE_REG 1     /* index of Write cycle timing register */
  26#define CNTRL_REG 3     /* index of Control register */
  27#define STRAP_REG 5     /* index of Strap register */
  28#define MISC_REG 6      /* index of Miscellaneous register */
  29
  30static int reg_base;
  31
  32static DEFINE_SPINLOCK(opti621_lock);
  33
  34/* Write value to register reg, base of register
  35 * is at reg_base (0x1f0 primary, 0x170 secondary,
  36 * if not changed by PCI configuration).
  37 * This is from setupvic.exe program.
  38 */
  39static void write_reg(u8 value, int reg)
  40{
  41        inw(reg_base + 1);
  42        inw(reg_base + 1);
  43        outb(3, reg_base + 2);
  44        outb(value, reg_base + reg);
  45        outb(0x83, reg_base + 2);
  46}
  47
  48/* Read value from register reg, base of register
  49 * is at reg_base (0x1f0 primary, 0x170 secondary,
  50 * if not changed by PCI configuration).
  51 * This is from setupvic.exe program.
  52 */
  53static u8 read_reg(int reg)
  54{
  55        u8 ret = 0;
  56
  57        inw(reg_base + 1);
  58        inw(reg_base + 1);
  59        outb(3, reg_base + 2);
  60        ret = inb(reg_base + reg);
  61        outb(0x83, reg_base + 2);
  62
  63        return ret;
  64}
  65
  66static void opti621_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
  67{
  68        ide_drive_t *pair = ide_get_pair_dev(drive);
  69        unsigned long flags;
  70        unsigned long mode = drive->pio_mode, pair_mode;
  71        const u8 pio = mode - XFER_PIO_0;
  72        u8 tim, misc, addr_pio = pio, clk;
  73
  74        /* DRDY is default 2 (by OPTi Databook) */
  75        static const u8 addr_timings[2][5] = {
  76                { 0x20, 0x10, 0x00, 0x00, 0x00 },       /* 33 MHz */
  77                { 0x10, 0x10, 0x00, 0x00, 0x00 },       /* 25 MHz */
  78        };
  79        static const u8 data_rec_timings[2][5] = {
  80                { 0x5b, 0x45, 0x32, 0x21, 0x20 },       /* 33 MHz */
  81                { 0x48, 0x34, 0x21, 0x10, 0x10 }        /* 25 MHz */
  82        };
  83
  84        ide_set_drivedata(drive, (void *)mode);
  85
  86        if (pair) {
  87                pair_mode = (unsigned long)ide_get_drivedata(pair);
  88                if (pair_mode && pair_mode < mode)
  89                        addr_pio = pair_mode - XFER_PIO_0;
  90        }
  91
  92        spin_lock_irqsave(&opti621_lock, flags);
  93
  94        reg_base = hwif->io_ports.data_addr;
  95
  96        /* allow Register-B */
  97        outb(0xc0, reg_base + CNTRL_REG);
  98        /* hmm, setupvic.exe does this ;-) */
  99        outb(0xff, reg_base + 5);
 100        /* if reads 0xff, adapter not exist? */
 101        (void)inb(reg_base + CNTRL_REG);
 102        /* if reads 0xc0, no interface exist? */
 103        read_reg(CNTRL_REG);
 104
 105        /* check CLK speed */
 106        clk = read_reg(STRAP_REG) & 1;
 107
 108        printk(KERN_INFO "%s: CLK = %d MHz\n", hwif->name, clk ? 25 : 33);
 109
 110        tim  = data_rec_timings[clk][pio];
 111        misc = addr_timings[clk][addr_pio];
 112
 113        /* select Index-0/1 for Register-A/B */
 114        write_reg(drive->dn & 1, MISC_REG);
 115        /* set read cycle timings */
 116        write_reg(tim, READ_REG);
 117        /* set write cycle timings */
 118        write_reg(tim, WRITE_REG);
 119
 120        /* use Register-A for drive 0 */
 121        /* use Register-B for drive 1 */
 122        write_reg(0x85, CNTRL_REG);
 123
 124        /* set address setup, DRDY timings,   */
 125        /*  and read prefetch for both drives */
 126        write_reg(misc, MISC_REG);
 127
 128        spin_unlock_irqrestore(&opti621_lock, flags);
 129}
 130
 131static const struct ide_port_ops opti621_port_ops = {
 132        .set_pio_mode           = opti621_set_pio_mode,
 133};
 134
 135static const struct ide_port_info opti621_chipset = {
 136        .name           = DRV_NAME,
 137        .enablebits     = { {0x45, 0x80, 0x00}, {0x40, 0x08, 0x00} },
 138        .port_ops       = &opti621_port_ops,
 139        .host_flags     = IDE_HFLAG_NO_DMA,
 140        .pio_mask       = ATA_PIO4,
 141};
 142
 143static int opti621_init_one(struct pci_dev *dev, const struct pci_device_id *id)
 144{
 145        return ide_pci_init_one(dev, &opti621_chipset, NULL);
 146}
 147
 148static const struct pci_device_id opti621_pci_tbl[] = {
 149        { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C621), 0 },
 150        { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C825), 0 },
 151        { 0, },
 152};
 153MODULE_DEVICE_TABLE(pci, opti621_pci_tbl);
 154
 155static struct pci_driver opti621_pci_driver = {
 156        .name           = "Opti621_IDE",
 157        .id_table       = opti621_pci_tbl,
 158        .probe          = opti621_init_one,
 159        .remove         = ide_pci_remove,
 160        .suspend        = ide_pci_suspend,
 161        .resume         = ide_pci_resume,
 162};
 163
 164static int __init opti621_ide_init(void)
 165{
 166        return ide_pci_register_driver(&opti621_pci_driver);
 167}
 168
 169static void __exit opti621_ide_exit(void)
 170{
 171        pci_unregister_driver(&opti621_pci_driver);
 172}
 173
 174module_init(opti621_ide_init);
 175module_exit(opti621_ide_exit);
 176
 177MODULE_AUTHOR("Jaromir Koutek, Jan Harkes, Mark Lord");
 178MODULE_DESCRIPTION("PCI driver module for Opti621 IDE");
 179MODULE_LICENSE("GPL");
 180