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12#include <linux/module.h>
13#include <linux/i2c.h>
14#include <linux/err.h>
15#include <linux/delay.h>
16#include <linux/regmap.h>
17#include <linux/acpi.h>
18
19#include <linux/iio/iio.h>
20#include <linux/iio/events.h>
21#include <linux/iio/sysfs.h>
22#include <linux/iio/trigger_consumer.h>
23#include <linux/iio/buffer.h>
24#include <linux/iio/triggered_buffer.h>
25
26#define LTR501_DRV_NAME "ltr501"
27
28#define LTR501_ALS_CONTR 0x80
29#define LTR501_PS_CONTR 0x81
30#define LTR501_PS_MEAS_RATE 0x84
31#define LTR501_ALS_MEAS_RATE 0x85
32#define LTR501_PART_ID 0x86
33#define LTR501_MANUFAC_ID 0x87
34#define LTR501_ALS_DATA1 0x88
35#define LTR501_ALS_DATA0 0x8a
36#define LTR501_ALS_PS_STATUS 0x8c
37#define LTR501_PS_DATA 0x8d
38#define LTR501_INTR 0x8f
39#define LTR501_PS_THRESH_UP 0x90
40#define LTR501_PS_THRESH_LOW 0x92
41#define LTR501_ALS_THRESH_UP 0x97
42#define LTR501_ALS_THRESH_LOW 0x99
43#define LTR501_INTR_PRST 0x9e
44#define LTR501_MAX_REG 0x9f
45
46#define LTR501_ALS_CONTR_SW_RESET BIT(2)
47#define LTR501_CONTR_PS_GAIN_MASK (BIT(3) | BIT(2))
48#define LTR501_CONTR_PS_GAIN_SHIFT 2
49#define LTR501_CONTR_ALS_GAIN_MASK BIT(3)
50#define LTR501_CONTR_ACTIVE BIT(1)
51
52#define LTR501_STATUS_ALS_INTR BIT(3)
53#define LTR501_STATUS_ALS_RDY BIT(2)
54#define LTR501_STATUS_PS_INTR BIT(1)
55#define LTR501_STATUS_PS_RDY BIT(0)
56
57#define LTR501_PS_DATA_MASK 0x7ff
58#define LTR501_PS_THRESH_MASK 0x7ff
59#define LTR501_ALS_THRESH_MASK 0xffff
60
61#define LTR501_ALS_DEF_PERIOD 500000
62#define LTR501_PS_DEF_PERIOD 100000
63
64#define LTR501_REGMAP_NAME "ltr501_regmap"
65
66#define LTR501_LUX_CONV(vis_coeff, vis_data, ir_coeff, ir_data) \
67 ((vis_coeff * vis_data) - (ir_coeff * ir_data))
68
69static const int int_time_mapping[] = {100000, 50000, 200000, 400000};
70
71static const struct reg_field reg_field_it =
72 REG_FIELD(LTR501_ALS_MEAS_RATE, 3, 4);
73static const struct reg_field reg_field_als_intr =
74 REG_FIELD(LTR501_INTR, 1, 1);
75static const struct reg_field reg_field_ps_intr =
76 REG_FIELD(LTR501_INTR, 0, 0);
77static const struct reg_field reg_field_als_rate =
78 REG_FIELD(LTR501_ALS_MEAS_RATE, 0, 2);
79static const struct reg_field reg_field_ps_rate =
80 REG_FIELD(LTR501_PS_MEAS_RATE, 0, 3);
81static const struct reg_field reg_field_als_prst =
82 REG_FIELD(LTR501_INTR_PRST, 0, 3);
83static const struct reg_field reg_field_ps_prst =
84 REG_FIELD(LTR501_INTR_PRST, 4, 7);
85
86struct ltr501_samp_table {
87 int freq_val;
88 int time_val;
89};
90
91#define LTR501_RESERVED_GAIN -1
92
93enum {
94 ltr501 = 0,
95 ltr559,
96 ltr301,
97};
98
99struct ltr501_gain {
100 int scale;
101 int uscale;
102};
103
104static struct ltr501_gain ltr501_als_gain_tbl[] = {
105 {1, 0},
106 {0, 5000},
107};
108
109static struct ltr501_gain ltr559_als_gain_tbl[] = {
110 {1, 0},
111 {0, 500000},
112 {0, 250000},
113 {0, 125000},
114 {LTR501_RESERVED_GAIN, LTR501_RESERVED_GAIN},
115 {LTR501_RESERVED_GAIN, LTR501_RESERVED_GAIN},
116 {0, 20000},
117 {0, 10000},
118};
119
120static struct ltr501_gain ltr501_ps_gain_tbl[] = {
121 {1, 0},
122 {0, 250000},
123 {0, 125000},
124 {0, 62500},
125};
126
127static struct ltr501_gain ltr559_ps_gain_tbl[] = {
128 {0, 62500},
129 {0, 31250},
130 {0, 15625},
131 {0, 15624},
132};
133
134struct ltr501_chip_info {
135 u8 partid;
136 struct ltr501_gain *als_gain;
137 int als_gain_tbl_size;
138 struct ltr501_gain *ps_gain;
139 int ps_gain_tbl_size;
140 u8 als_mode_active;
141 u8 als_gain_mask;
142 u8 als_gain_shift;
143 struct iio_chan_spec const *channels;
144 const int no_channels;
145 const struct iio_info *info;
146 const struct iio_info *info_no_irq;
147};
148
149struct ltr501_data {
150 struct i2c_client *client;
151 struct mutex lock_als, lock_ps;
152 struct ltr501_chip_info *chip_info;
153 u8 als_contr, ps_contr;
154 int als_period, ps_period;
155 struct regmap *regmap;
156 struct regmap_field *reg_it;
157 struct regmap_field *reg_als_intr;
158 struct regmap_field *reg_ps_intr;
159 struct regmap_field *reg_als_rate;
160 struct regmap_field *reg_ps_rate;
161 struct regmap_field *reg_als_prst;
162 struct regmap_field *reg_ps_prst;
163};
164
165static const struct ltr501_samp_table ltr501_als_samp_table[] = {
166 {20000000, 50000}, {10000000, 100000},
167 {5000000, 200000}, {2000000, 500000},
168 {1000000, 1000000}, {500000, 2000000},
169 {500000, 2000000}, {500000, 2000000}
170};
171
172static const struct ltr501_samp_table ltr501_ps_samp_table[] = {
173 {20000000, 50000}, {14285714, 70000},
174 {10000000, 100000}, {5000000, 200000},
175 {2000000, 500000}, {1000000, 1000000},
176 {500000, 2000000}, {500000, 2000000},
177 {500000, 2000000}
178};
179
180static int ltr501_match_samp_freq(const struct ltr501_samp_table *tab,
181 int len, int val, int val2)
182{
183 int i, freq;
184
185 freq = val * 1000000 + val2;
186
187 for (i = 0; i < len; i++) {
188 if (tab[i].freq_val == freq)
189 return i;
190 }
191
192 return -EINVAL;
193}
194
195static int ltr501_als_read_samp_freq(struct ltr501_data *data,
196 int *val, int *val2)
197{
198 int ret, i;
199
200 ret = regmap_field_read(data->reg_als_rate, &i);
201 if (ret < 0)
202 return ret;
203
204 if (i < 0 || i >= ARRAY_SIZE(ltr501_als_samp_table))
205 return -EINVAL;
206
207 *val = ltr501_als_samp_table[i].freq_val / 1000000;
208 *val2 = ltr501_als_samp_table[i].freq_val % 1000000;
209
210 return IIO_VAL_INT_PLUS_MICRO;
211}
212
213static int ltr501_ps_read_samp_freq(struct ltr501_data *data,
214 int *val, int *val2)
215{
216 int ret, i;
217
218 ret = regmap_field_read(data->reg_ps_rate, &i);
219 if (ret < 0)
220 return ret;
221
222 if (i < 0 || i >= ARRAY_SIZE(ltr501_ps_samp_table))
223 return -EINVAL;
224
225 *val = ltr501_ps_samp_table[i].freq_val / 1000000;
226 *val2 = ltr501_ps_samp_table[i].freq_val % 1000000;
227
228 return IIO_VAL_INT_PLUS_MICRO;
229}
230
231static int ltr501_als_write_samp_freq(struct ltr501_data *data,
232 int val, int val2)
233{
234 int i, ret;
235
236 i = ltr501_match_samp_freq(ltr501_als_samp_table,
237 ARRAY_SIZE(ltr501_als_samp_table),
238 val, val2);
239
240 if (i < 0)
241 return i;
242
243 mutex_lock(&data->lock_als);
244 ret = regmap_field_write(data->reg_als_rate, i);
245 mutex_unlock(&data->lock_als);
246
247 return ret;
248}
249
250static int ltr501_ps_write_samp_freq(struct ltr501_data *data,
251 int val, int val2)
252{
253 int i, ret;
254
255 i = ltr501_match_samp_freq(ltr501_ps_samp_table,
256 ARRAY_SIZE(ltr501_ps_samp_table),
257 val, val2);
258
259 if (i < 0)
260 return i;
261
262 mutex_lock(&data->lock_ps);
263 ret = regmap_field_write(data->reg_ps_rate, i);
264 mutex_unlock(&data->lock_ps);
265
266 return ret;
267}
268
269static int ltr501_als_read_samp_period(struct ltr501_data *data, int *val)
270{
271 int ret, i;
272
273 ret = regmap_field_read(data->reg_als_rate, &i);
274 if (ret < 0)
275 return ret;
276
277 if (i < 0 || i >= ARRAY_SIZE(ltr501_als_samp_table))
278 return -EINVAL;
279
280 *val = ltr501_als_samp_table[i].time_val;
281
282 return IIO_VAL_INT;
283}
284
285static int ltr501_ps_read_samp_period(struct ltr501_data *data, int *val)
286{
287 int ret, i;
288
289 ret = regmap_field_read(data->reg_ps_rate, &i);
290 if (ret < 0)
291 return ret;
292
293 if (i < 0 || i >= ARRAY_SIZE(ltr501_ps_samp_table))
294 return -EINVAL;
295
296 *val = ltr501_ps_samp_table[i].time_val;
297
298 return IIO_VAL_INT;
299}
300
301
302static unsigned long ltr501_calculate_lux(u16 vis_data, u16 ir_data)
303{
304 unsigned long ratio, lux;
305
306 if (vis_data == 0)
307 return 0;
308
309
310 ratio = DIV_ROUND_UP(ir_data * 100, ir_data + vis_data);
311
312 if (ratio < 45)
313 lux = LTR501_LUX_CONV(1774, vis_data, -1105, ir_data);
314 else if (ratio >= 45 && ratio < 64)
315 lux = LTR501_LUX_CONV(3772, vis_data, 1336, ir_data);
316 else if (ratio >= 64 && ratio < 85)
317 lux = LTR501_LUX_CONV(1690, vis_data, 169, ir_data);
318 else
319 lux = 0;
320
321 return lux / 1000;
322}
323
324static int ltr501_drdy(struct ltr501_data *data, u8 drdy_mask)
325{
326 int tries = 100;
327 int ret, status;
328
329 while (tries--) {
330 ret = regmap_read(data->regmap, LTR501_ALS_PS_STATUS, &status);
331 if (ret < 0)
332 return ret;
333 if ((status & drdy_mask) == drdy_mask)
334 return 0;
335 msleep(25);
336 }
337
338 dev_err(&data->client->dev, "ltr501_drdy() failed, data not ready\n");
339 return -EIO;
340}
341
342static int ltr501_set_it_time(struct ltr501_data *data, int it)
343{
344 int ret, i, index = -1, status;
345
346 for (i = 0; i < ARRAY_SIZE(int_time_mapping); i++) {
347 if (int_time_mapping[i] == it) {
348 index = i;
349 break;
350 }
351 }
352
353 if (index < 0)
354 return -EINVAL;
355
356 ret = regmap_read(data->regmap, LTR501_ALS_CONTR, &status);
357 if (ret < 0)
358 return ret;
359
360 if (status & LTR501_CONTR_ALS_GAIN_MASK) {
361
362
363
364
365 if (index > 1)
366 return -EINVAL;
367 } else
368
369 if (index == 1)
370 return -EINVAL;
371
372 return regmap_field_write(data->reg_it, index);
373}
374
375
376static int ltr501_read_it_time(struct ltr501_data *data, int *val, int *val2)
377{
378 int ret, index;
379
380 ret = regmap_field_read(data->reg_it, &index);
381 if (ret < 0)
382 return ret;
383
384
385 if (index < 0 || index >= ARRAY_SIZE(int_time_mapping))
386 return -EINVAL;
387
388 *val2 = int_time_mapping[index];
389 *val = 0;
390
391 return IIO_VAL_INT_PLUS_MICRO;
392}
393
394static int ltr501_read_als(struct ltr501_data *data, __le16 buf[2])
395{
396 int ret;
397
398 ret = ltr501_drdy(data, LTR501_STATUS_ALS_RDY);
399 if (ret < 0)
400 return ret;
401
402 return regmap_bulk_read(data->regmap, LTR501_ALS_DATA1,
403 buf, 2 * sizeof(__le16));
404}
405
406static int ltr501_read_ps(struct ltr501_data *data)
407{
408 int ret, status;
409
410 ret = ltr501_drdy(data, LTR501_STATUS_PS_RDY);
411 if (ret < 0)
412 return ret;
413
414 ret = regmap_bulk_read(data->regmap, LTR501_PS_DATA,
415 &status, 2);
416 if (ret < 0)
417 return ret;
418
419 return status;
420}
421
422static int ltr501_read_intr_prst(struct ltr501_data *data,
423 enum iio_chan_type type,
424 int *val2)
425{
426 int ret, samp_period, prst;
427
428 switch (type) {
429 case IIO_INTENSITY:
430 ret = regmap_field_read(data->reg_als_prst, &prst);
431 if (ret < 0)
432 return ret;
433
434 ret = ltr501_als_read_samp_period(data, &samp_period);
435
436 if (ret < 0)
437 return ret;
438 *val2 = samp_period * prst;
439 return IIO_VAL_INT_PLUS_MICRO;
440 case IIO_PROXIMITY:
441 ret = regmap_field_read(data->reg_ps_prst, &prst);
442 if (ret < 0)
443 return ret;
444
445 ret = ltr501_ps_read_samp_period(data, &samp_period);
446
447 if (ret < 0)
448 return ret;
449
450 *val2 = samp_period * prst;
451 return IIO_VAL_INT_PLUS_MICRO;
452 default:
453 return -EINVAL;
454 }
455
456 return -EINVAL;
457}
458
459static int ltr501_write_intr_prst(struct ltr501_data *data,
460 enum iio_chan_type type,
461 int val, int val2)
462{
463 int ret, samp_period, new_val;
464 unsigned long period;
465
466 if (val < 0 || val2 < 0)
467 return -EINVAL;
468
469
470 period = ((val * 1000000) + val2);
471
472 switch (type) {
473 case IIO_INTENSITY:
474 ret = ltr501_als_read_samp_period(data, &samp_period);
475 if (ret < 0)
476 return ret;
477
478
479 if (period < samp_period)
480 return -EINVAL;
481
482 new_val = DIV_ROUND_UP(period, samp_period);
483 if (new_val < 0 || new_val > 0x0f)
484 return -EINVAL;
485
486 mutex_lock(&data->lock_als);
487 ret = regmap_field_write(data->reg_als_prst, new_val);
488 mutex_unlock(&data->lock_als);
489 if (ret >= 0)
490 data->als_period = period;
491
492 return ret;
493 case IIO_PROXIMITY:
494 ret = ltr501_ps_read_samp_period(data, &samp_period);
495 if (ret < 0)
496 return ret;
497
498
499 if (period < samp_period)
500 return -EINVAL;
501
502 new_val = DIV_ROUND_UP(period, samp_period);
503 if (new_val < 0 || new_val > 0x0f)
504 return -EINVAL;
505
506 mutex_lock(&data->lock_ps);
507 ret = regmap_field_write(data->reg_ps_prst, new_val);
508 mutex_unlock(&data->lock_ps);
509 if (ret >= 0)
510 data->ps_period = period;
511
512 return ret;
513 default:
514 return -EINVAL;
515 }
516
517 return -EINVAL;
518}
519
520static const struct iio_event_spec ltr501_als_event_spec[] = {
521 {
522 .type = IIO_EV_TYPE_THRESH,
523 .dir = IIO_EV_DIR_RISING,
524 .mask_separate = BIT(IIO_EV_INFO_VALUE),
525 }, {
526 .type = IIO_EV_TYPE_THRESH,
527 .dir = IIO_EV_DIR_FALLING,
528 .mask_separate = BIT(IIO_EV_INFO_VALUE),
529 }, {
530 .type = IIO_EV_TYPE_THRESH,
531 .dir = IIO_EV_DIR_EITHER,
532 .mask_separate = BIT(IIO_EV_INFO_ENABLE) |
533 BIT(IIO_EV_INFO_PERIOD),
534 },
535
536};
537
538static const struct iio_event_spec ltr501_pxs_event_spec[] = {
539 {
540 .type = IIO_EV_TYPE_THRESH,
541 .dir = IIO_EV_DIR_RISING,
542 .mask_separate = BIT(IIO_EV_INFO_VALUE),
543 }, {
544 .type = IIO_EV_TYPE_THRESH,
545 .dir = IIO_EV_DIR_FALLING,
546 .mask_separate = BIT(IIO_EV_INFO_VALUE),
547 }, {
548 .type = IIO_EV_TYPE_THRESH,
549 .dir = IIO_EV_DIR_EITHER,
550 .mask_separate = BIT(IIO_EV_INFO_ENABLE) |
551 BIT(IIO_EV_INFO_PERIOD),
552 },
553};
554
555#define LTR501_INTENSITY_CHANNEL(_idx, _addr, _mod, _shared, \
556 _evspec, _evsize) { \
557 .type = IIO_INTENSITY, \
558 .modified = 1, \
559 .address = (_addr), \
560 .channel2 = (_mod), \
561 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
562 .info_mask_shared_by_type = (_shared), \
563 .scan_index = (_idx), \
564 .scan_type = { \
565 .sign = 'u', \
566 .realbits = 16, \
567 .storagebits = 16, \
568 .endianness = IIO_CPU, \
569 }, \
570 .event_spec = _evspec,\
571 .num_event_specs = _evsize,\
572}
573
574#define LTR501_LIGHT_CHANNEL() { \
575 .type = IIO_LIGHT, \
576 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), \
577 .scan_index = -1, \
578}
579
580static const struct iio_chan_spec ltr501_channels[] = {
581 LTR501_LIGHT_CHANNEL(),
582 LTR501_INTENSITY_CHANNEL(0, LTR501_ALS_DATA0, IIO_MOD_LIGHT_BOTH, 0,
583 ltr501_als_event_spec,
584 ARRAY_SIZE(ltr501_als_event_spec)),
585 LTR501_INTENSITY_CHANNEL(1, LTR501_ALS_DATA1, IIO_MOD_LIGHT_IR,
586 BIT(IIO_CHAN_INFO_SCALE) |
587 BIT(IIO_CHAN_INFO_INT_TIME) |
588 BIT(IIO_CHAN_INFO_SAMP_FREQ),
589 NULL, 0),
590 {
591 .type = IIO_PROXIMITY,
592 .address = LTR501_PS_DATA,
593 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
594 BIT(IIO_CHAN_INFO_SCALE),
595 .scan_index = 2,
596 .scan_type = {
597 .sign = 'u',
598 .realbits = 11,
599 .storagebits = 16,
600 .endianness = IIO_CPU,
601 },
602 .event_spec = ltr501_pxs_event_spec,
603 .num_event_specs = ARRAY_SIZE(ltr501_pxs_event_spec),
604 },
605 IIO_CHAN_SOFT_TIMESTAMP(3),
606};
607
608static const struct iio_chan_spec ltr301_channels[] = {
609 LTR501_LIGHT_CHANNEL(),
610 LTR501_INTENSITY_CHANNEL(0, LTR501_ALS_DATA0, IIO_MOD_LIGHT_BOTH, 0,
611 ltr501_als_event_spec,
612 ARRAY_SIZE(ltr501_als_event_spec)),
613 LTR501_INTENSITY_CHANNEL(1, LTR501_ALS_DATA1, IIO_MOD_LIGHT_IR,
614 BIT(IIO_CHAN_INFO_SCALE) |
615 BIT(IIO_CHAN_INFO_INT_TIME) |
616 BIT(IIO_CHAN_INFO_SAMP_FREQ),
617 NULL, 0),
618 IIO_CHAN_SOFT_TIMESTAMP(2),
619};
620
621static int ltr501_read_raw(struct iio_dev *indio_dev,
622 struct iio_chan_spec const *chan,
623 int *val, int *val2, long mask)
624{
625 struct ltr501_data *data = iio_priv(indio_dev);
626 __le16 buf[2];
627 int ret, i;
628
629 switch (mask) {
630 case IIO_CHAN_INFO_PROCESSED:
631 switch (chan->type) {
632 case IIO_LIGHT:
633 ret = iio_device_claim_direct_mode(indio_dev);
634 if (ret)
635 return ret;
636
637 mutex_lock(&data->lock_als);
638 ret = ltr501_read_als(data, buf);
639 mutex_unlock(&data->lock_als);
640 iio_device_release_direct_mode(indio_dev);
641 if (ret < 0)
642 return ret;
643 *val = ltr501_calculate_lux(le16_to_cpu(buf[1]),
644 le16_to_cpu(buf[0]));
645 return IIO_VAL_INT;
646 default:
647 return -EINVAL;
648 }
649 case IIO_CHAN_INFO_RAW:
650 ret = iio_device_claim_direct_mode(indio_dev);
651 if (ret)
652 return ret;
653
654 switch (chan->type) {
655 case IIO_INTENSITY:
656 mutex_lock(&data->lock_als);
657 ret = ltr501_read_als(data, buf);
658 mutex_unlock(&data->lock_als);
659 if (ret < 0)
660 break;
661 *val = le16_to_cpu(chan->address == LTR501_ALS_DATA1 ?
662 buf[0] : buf[1]);
663 ret = IIO_VAL_INT;
664 break;
665 case IIO_PROXIMITY:
666 mutex_lock(&data->lock_ps);
667 ret = ltr501_read_ps(data);
668 mutex_unlock(&data->lock_ps);
669 if (ret < 0)
670 break;
671 *val = ret & LTR501_PS_DATA_MASK;
672 ret = IIO_VAL_INT;
673 break;
674 default:
675 ret = -EINVAL;
676 break;
677 }
678
679 iio_device_release_direct_mode(indio_dev);
680 return ret;
681
682 case IIO_CHAN_INFO_SCALE:
683 switch (chan->type) {
684 case IIO_INTENSITY:
685 i = (data->als_contr & data->chip_info->als_gain_mask)
686 >> data->chip_info->als_gain_shift;
687 *val = data->chip_info->als_gain[i].scale;
688 *val2 = data->chip_info->als_gain[i].uscale;
689 return IIO_VAL_INT_PLUS_MICRO;
690 case IIO_PROXIMITY:
691 i = (data->ps_contr & LTR501_CONTR_PS_GAIN_MASK) >>
692 LTR501_CONTR_PS_GAIN_SHIFT;
693 *val = data->chip_info->ps_gain[i].scale;
694 *val2 = data->chip_info->ps_gain[i].uscale;
695 return IIO_VAL_INT_PLUS_MICRO;
696 default:
697 return -EINVAL;
698 }
699 case IIO_CHAN_INFO_INT_TIME:
700 switch (chan->type) {
701 case IIO_INTENSITY:
702 return ltr501_read_it_time(data, val, val2);
703 default:
704 return -EINVAL;
705 }
706 case IIO_CHAN_INFO_SAMP_FREQ:
707 switch (chan->type) {
708 case IIO_INTENSITY:
709 return ltr501_als_read_samp_freq(data, val, val2);
710 case IIO_PROXIMITY:
711 return ltr501_ps_read_samp_freq(data, val, val2);
712 default:
713 return -EINVAL;
714 }
715 }
716 return -EINVAL;
717}
718
719static int ltr501_get_gain_index(struct ltr501_gain *gain, int size,
720 int val, int val2)
721{
722 int i;
723
724 for (i = 0; i < size; i++)
725 if (val == gain[i].scale && val2 == gain[i].uscale)
726 return i;
727
728 return -1;
729}
730
731static int ltr501_write_raw(struct iio_dev *indio_dev,
732 struct iio_chan_spec const *chan,
733 int val, int val2, long mask)
734{
735 struct ltr501_data *data = iio_priv(indio_dev);
736 int i, ret, freq_val, freq_val2;
737 struct ltr501_chip_info *info = data->chip_info;
738
739 ret = iio_device_claim_direct_mode(indio_dev);
740 if (ret)
741 return ret;
742
743 switch (mask) {
744 case IIO_CHAN_INFO_SCALE:
745 switch (chan->type) {
746 case IIO_INTENSITY:
747 i = ltr501_get_gain_index(info->als_gain,
748 info->als_gain_tbl_size,
749 val, val2);
750 if (i < 0) {
751 ret = -EINVAL;
752 break;
753 }
754
755 data->als_contr &= ~info->als_gain_mask;
756 data->als_contr |= i << info->als_gain_shift;
757
758 ret = regmap_write(data->regmap, LTR501_ALS_CONTR,
759 data->als_contr);
760 break;
761 case IIO_PROXIMITY:
762 i = ltr501_get_gain_index(info->ps_gain,
763 info->ps_gain_tbl_size,
764 val, val2);
765 if (i < 0) {
766 ret = -EINVAL;
767 break;
768 }
769 data->ps_contr &= ~LTR501_CONTR_PS_GAIN_MASK;
770 data->ps_contr |= i << LTR501_CONTR_PS_GAIN_SHIFT;
771
772 ret = regmap_write(data->regmap, LTR501_PS_CONTR,
773 data->ps_contr);
774 break;
775 default:
776 ret = -EINVAL;
777 break;
778 }
779 break;
780
781 case IIO_CHAN_INFO_INT_TIME:
782 switch (chan->type) {
783 case IIO_INTENSITY:
784 if (val != 0) {
785 ret = -EINVAL;
786 break;
787 }
788 mutex_lock(&data->lock_als);
789 ret = ltr501_set_it_time(data, val2);
790 mutex_unlock(&data->lock_als);
791 break;
792 default:
793 ret = -EINVAL;
794 break;
795 }
796 break;
797
798 case IIO_CHAN_INFO_SAMP_FREQ:
799 switch (chan->type) {
800 case IIO_INTENSITY:
801 ret = ltr501_als_read_samp_freq(data, &freq_val,
802 &freq_val2);
803 if (ret < 0)
804 break;
805
806 ret = ltr501_als_write_samp_freq(data, val, val2);
807 if (ret < 0)
808 break;
809
810
811 ret = ltr501_write_intr_prst(data, chan->type,
812 0, data->als_period);
813
814 if (ret < 0)
815 ret = ltr501_als_write_samp_freq(data, freq_val,
816 freq_val2);
817 break;
818 case IIO_PROXIMITY:
819 ret = ltr501_ps_read_samp_freq(data, &freq_val,
820 &freq_val2);
821 if (ret < 0)
822 break;
823
824 ret = ltr501_ps_write_samp_freq(data, val, val2);
825 if (ret < 0)
826 break;
827
828
829 ret = ltr501_write_intr_prst(data, chan->type,
830 0, data->ps_period);
831
832 if (ret < 0)
833 ret = ltr501_ps_write_samp_freq(data, freq_val,
834 freq_val2);
835 break;
836 default:
837 ret = -EINVAL;
838 break;
839 }
840 break;
841
842 default:
843 ret = -EINVAL;
844 break;
845 }
846
847 iio_device_release_direct_mode(indio_dev);
848 return ret;
849}
850
851static int ltr501_read_thresh(struct iio_dev *indio_dev,
852 const struct iio_chan_spec *chan,
853 enum iio_event_type type,
854 enum iio_event_direction dir,
855 enum iio_event_info info,
856 int *val, int *val2)
857{
858 struct ltr501_data *data = iio_priv(indio_dev);
859 int ret, thresh_data;
860
861 switch (chan->type) {
862 case IIO_INTENSITY:
863 switch (dir) {
864 case IIO_EV_DIR_RISING:
865 ret = regmap_bulk_read(data->regmap,
866 LTR501_ALS_THRESH_UP,
867 &thresh_data, 2);
868 if (ret < 0)
869 return ret;
870 *val = thresh_data & LTR501_ALS_THRESH_MASK;
871 return IIO_VAL_INT;
872 case IIO_EV_DIR_FALLING:
873 ret = regmap_bulk_read(data->regmap,
874 LTR501_ALS_THRESH_LOW,
875 &thresh_data, 2);
876 if (ret < 0)
877 return ret;
878 *val = thresh_data & LTR501_ALS_THRESH_MASK;
879 return IIO_VAL_INT;
880 default:
881 return -EINVAL;
882 }
883 case IIO_PROXIMITY:
884 switch (dir) {
885 case IIO_EV_DIR_RISING:
886 ret = regmap_bulk_read(data->regmap,
887 LTR501_PS_THRESH_UP,
888 &thresh_data, 2);
889 if (ret < 0)
890 return ret;
891 *val = thresh_data & LTR501_PS_THRESH_MASK;
892 return IIO_VAL_INT;
893 case IIO_EV_DIR_FALLING:
894 ret = regmap_bulk_read(data->regmap,
895 LTR501_PS_THRESH_LOW,
896 &thresh_data, 2);
897 if (ret < 0)
898 return ret;
899 *val = thresh_data & LTR501_PS_THRESH_MASK;
900 return IIO_VAL_INT;
901 default:
902 return -EINVAL;
903 }
904 default:
905 return -EINVAL;
906 }
907
908 return -EINVAL;
909}
910
911static int ltr501_write_thresh(struct iio_dev *indio_dev,
912 const struct iio_chan_spec *chan,
913 enum iio_event_type type,
914 enum iio_event_direction dir,
915 enum iio_event_info info,
916 int val, int val2)
917{
918 struct ltr501_data *data = iio_priv(indio_dev);
919 int ret;
920
921 if (val < 0)
922 return -EINVAL;
923
924 switch (chan->type) {
925 case IIO_INTENSITY:
926 if (val > LTR501_ALS_THRESH_MASK)
927 return -EINVAL;
928 switch (dir) {
929 case IIO_EV_DIR_RISING:
930 mutex_lock(&data->lock_als);
931 ret = regmap_bulk_write(data->regmap,
932 LTR501_ALS_THRESH_UP,
933 &val, 2);
934 mutex_unlock(&data->lock_als);
935 return ret;
936 case IIO_EV_DIR_FALLING:
937 mutex_lock(&data->lock_als);
938 ret = regmap_bulk_write(data->regmap,
939 LTR501_ALS_THRESH_LOW,
940 &val, 2);
941 mutex_unlock(&data->lock_als);
942 return ret;
943 default:
944 return -EINVAL;
945 }
946 case IIO_PROXIMITY:
947 if (val > LTR501_PS_THRESH_MASK)
948 return -EINVAL;
949 switch (dir) {
950 case IIO_EV_DIR_RISING:
951 mutex_lock(&data->lock_ps);
952 ret = regmap_bulk_write(data->regmap,
953 LTR501_PS_THRESH_UP,
954 &val, 2);
955 mutex_unlock(&data->lock_ps);
956 return ret;
957 case IIO_EV_DIR_FALLING:
958 mutex_lock(&data->lock_ps);
959 ret = regmap_bulk_write(data->regmap,
960 LTR501_PS_THRESH_LOW,
961 &val, 2);
962 mutex_unlock(&data->lock_ps);
963 return ret;
964 default:
965 return -EINVAL;
966 }
967 default:
968 return -EINVAL;
969 }
970
971 return -EINVAL;
972}
973
974static int ltr501_read_event(struct iio_dev *indio_dev,
975 const struct iio_chan_spec *chan,
976 enum iio_event_type type,
977 enum iio_event_direction dir,
978 enum iio_event_info info,
979 int *val, int *val2)
980{
981 int ret;
982
983 switch (info) {
984 case IIO_EV_INFO_VALUE:
985 return ltr501_read_thresh(indio_dev, chan, type, dir,
986 info, val, val2);
987 case IIO_EV_INFO_PERIOD:
988 ret = ltr501_read_intr_prst(iio_priv(indio_dev),
989 chan->type, val2);
990 *val = *val2 / 1000000;
991 *val2 = *val2 % 1000000;
992 return ret;
993 default:
994 return -EINVAL;
995 }
996
997 return -EINVAL;
998}
999
1000static int ltr501_write_event(struct iio_dev *indio_dev,
1001 const struct iio_chan_spec *chan,
1002 enum iio_event_type type,
1003 enum iio_event_direction dir,
1004 enum iio_event_info info,
1005 int val, int val2)
1006{
1007 switch (info) {
1008 case IIO_EV_INFO_VALUE:
1009 if (val2 != 0)
1010 return -EINVAL;
1011 return ltr501_write_thresh(indio_dev, chan, type, dir,
1012 info, val, val2);
1013 case IIO_EV_INFO_PERIOD:
1014 return ltr501_write_intr_prst(iio_priv(indio_dev), chan->type,
1015 val, val2);
1016 default:
1017 return -EINVAL;
1018 }
1019
1020 return -EINVAL;
1021}
1022
1023static int ltr501_read_event_config(struct iio_dev *indio_dev,
1024 const struct iio_chan_spec *chan,
1025 enum iio_event_type type,
1026 enum iio_event_direction dir)
1027{
1028 struct ltr501_data *data = iio_priv(indio_dev);
1029 int ret, status;
1030
1031 switch (chan->type) {
1032 case IIO_INTENSITY:
1033 ret = regmap_field_read(data->reg_als_intr, &status);
1034 if (ret < 0)
1035 return ret;
1036 return status;
1037 case IIO_PROXIMITY:
1038 ret = regmap_field_read(data->reg_ps_intr, &status);
1039 if (ret < 0)
1040 return ret;
1041 return status;
1042 default:
1043 return -EINVAL;
1044 }
1045
1046 return -EINVAL;
1047}
1048
1049static int ltr501_write_event_config(struct iio_dev *indio_dev,
1050 const struct iio_chan_spec *chan,
1051 enum iio_event_type type,
1052 enum iio_event_direction dir, int state)
1053{
1054 struct ltr501_data *data = iio_priv(indio_dev);
1055 int ret;
1056
1057
1058 if (state != 1 && state != 0)
1059 return -EINVAL;
1060
1061 switch (chan->type) {
1062 case IIO_INTENSITY:
1063 mutex_lock(&data->lock_als);
1064 ret = regmap_field_write(data->reg_als_intr, state);
1065 mutex_unlock(&data->lock_als);
1066 return ret;
1067 case IIO_PROXIMITY:
1068 mutex_lock(&data->lock_ps);
1069 ret = regmap_field_write(data->reg_ps_intr, state);
1070 mutex_unlock(&data->lock_ps);
1071 return ret;
1072 default:
1073 return -EINVAL;
1074 }
1075
1076 return -EINVAL;
1077}
1078
1079static ssize_t ltr501_show_proximity_scale_avail(struct device *dev,
1080 struct device_attribute *attr,
1081 char *buf)
1082{
1083 struct ltr501_data *data = iio_priv(dev_to_iio_dev(dev));
1084 struct ltr501_chip_info *info = data->chip_info;
1085 ssize_t len = 0;
1086 int i;
1087
1088 for (i = 0; i < info->ps_gain_tbl_size; i++) {
1089 if (info->ps_gain[i].scale == LTR501_RESERVED_GAIN)
1090 continue;
1091 len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%06d ",
1092 info->ps_gain[i].scale,
1093 info->ps_gain[i].uscale);
1094 }
1095
1096 buf[len - 1] = '\n';
1097
1098 return len;
1099}
1100
1101static ssize_t ltr501_show_intensity_scale_avail(struct device *dev,
1102 struct device_attribute *attr,
1103 char *buf)
1104{
1105 struct ltr501_data *data = iio_priv(dev_to_iio_dev(dev));
1106 struct ltr501_chip_info *info = data->chip_info;
1107 ssize_t len = 0;
1108 int i;
1109
1110 for (i = 0; i < info->als_gain_tbl_size; i++) {
1111 if (info->als_gain[i].scale == LTR501_RESERVED_GAIN)
1112 continue;
1113 len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%06d ",
1114 info->als_gain[i].scale,
1115 info->als_gain[i].uscale);
1116 }
1117
1118 buf[len - 1] = '\n';
1119
1120 return len;
1121}
1122
1123static IIO_CONST_ATTR_INT_TIME_AVAIL("0.05 0.1 0.2 0.4");
1124static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("20 10 5 2 1 0.5");
1125
1126static IIO_DEVICE_ATTR(in_proximity_scale_available, S_IRUGO,
1127 ltr501_show_proximity_scale_avail, NULL, 0);
1128static IIO_DEVICE_ATTR(in_intensity_scale_available, S_IRUGO,
1129 ltr501_show_intensity_scale_avail, NULL, 0);
1130
1131static struct attribute *ltr501_attributes[] = {
1132 &iio_dev_attr_in_proximity_scale_available.dev_attr.attr,
1133 &iio_dev_attr_in_intensity_scale_available.dev_attr.attr,
1134 &iio_const_attr_integration_time_available.dev_attr.attr,
1135 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
1136 NULL
1137};
1138
1139static struct attribute *ltr301_attributes[] = {
1140 &iio_dev_attr_in_intensity_scale_available.dev_attr.attr,
1141 &iio_const_attr_integration_time_available.dev_attr.attr,
1142 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
1143 NULL
1144};
1145
1146static const struct attribute_group ltr501_attribute_group = {
1147 .attrs = ltr501_attributes,
1148};
1149
1150static const struct attribute_group ltr301_attribute_group = {
1151 .attrs = ltr301_attributes,
1152};
1153
1154static const struct iio_info ltr501_info_no_irq = {
1155 .read_raw = ltr501_read_raw,
1156 .write_raw = ltr501_write_raw,
1157 .attrs = <r501_attribute_group,
1158};
1159
1160static const struct iio_info ltr501_info = {
1161 .read_raw = ltr501_read_raw,
1162 .write_raw = ltr501_write_raw,
1163 .attrs = <r501_attribute_group,
1164 .read_event_value = <r501_read_event,
1165 .write_event_value = <r501_write_event,
1166 .read_event_config = <r501_read_event_config,
1167 .write_event_config = <r501_write_event_config,
1168};
1169
1170static const struct iio_info ltr301_info_no_irq = {
1171 .read_raw = ltr501_read_raw,
1172 .write_raw = ltr501_write_raw,
1173 .attrs = <r301_attribute_group,
1174};
1175
1176static const struct iio_info ltr301_info = {
1177 .read_raw = ltr501_read_raw,
1178 .write_raw = ltr501_write_raw,
1179 .attrs = <r301_attribute_group,
1180 .read_event_value = <r501_read_event,
1181 .write_event_value = <r501_write_event,
1182 .read_event_config = <r501_read_event_config,
1183 .write_event_config = <r501_write_event_config,
1184};
1185
1186static struct ltr501_chip_info ltr501_chip_info_tbl[] = {
1187 [ltr501] = {
1188 .partid = 0x08,
1189 .als_gain = ltr501_als_gain_tbl,
1190 .als_gain_tbl_size = ARRAY_SIZE(ltr501_als_gain_tbl),
1191 .ps_gain = ltr501_ps_gain_tbl,
1192 .ps_gain_tbl_size = ARRAY_SIZE(ltr501_ps_gain_tbl),
1193 .als_mode_active = BIT(0) | BIT(1),
1194 .als_gain_mask = BIT(3),
1195 .als_gain_shift = 3,
1196 .info = <r501_info,
1197 .info_no_irq = <r501_info_no_irq,
1198 .channels = ltr501_channels,
1199 .no_channels = ARRAY_SIZE(ltr501_channels),
1200 },
1201 [ltr559] = {
1202 .partid = 0x09,
1203 .als_gain = ltr559_als_gain_tbl,
1204 .als_gain_tbl_size = ARRAY_SIZE(ltr559_als_gain_tbl),
1205 .ps_gain = ltr559_ps_gain_tbl,
1206 .ps_gain_tbl_size = ARRAY_SIZE(ltr559_ps_gain_tbl),
1207 .als_mode_active = BIT(1),
1208 .als_gain_mask = BIT(2) | BIT(3) | BIT(4),
1209 .als_gain_shift = 2,
1210 .info = <r501_info,
1211 .info_no_irq = <r501_info_no_irq,
1212 .channels = ltr501_channels,
1213 .no_channels = ARRAY_SIZE(ltr501_channels),
1214 },
1215 [ltr301] = {
1216 .partid = 0x08,
1217 .als_gain = ltr501_als_gain_tbl,
1218 .als_gain_tbl_size = ARRAY_SIZE(ltr501_als_gain_tbl),
1219 .als_mode_active = BIT(0) | BIT(1),
1220 .als_gain_mask = BIT(3),
1221 .als_gain_shift = 3,
1222 .info = <r301_info,
1223 .info_no_irq = <r301_info_no_irq,
1224 .channels = ltr301_channels,
1225 .no_channels = ARRAY_SIZE(ltr301_channels),
1226 },
1227};
1228
1229static int ltr501_write_contr(struct ltr501_data *data, u8 als_val, u8 ps_val)
1230{
1231 int ret;
1232
1233 ret = regmap_write(data->regmap, LTR501_ALS_CONTR, als_val);
1234 if (ret < 0)
1235 return ret;
1236
1237 return regmap_write(data->regmap, LTR501_PS_CONTR, ps_val);
1238}
1239
1240static irqreturn_t ltr501_trigger_handler(int irq, void *p)
1241{
1242 struct iio_poll_func *pf = p;
1243 struct iio_dev *indio_dev = pf->indio_dev;
1244 struct ltr501_data *data = iio_priv(indio_dev);
1245 u16 buf[8];
1246 __le16 als_buf[2];
1247 u8 mask = 0;
1248 int j = 0;
1249 int ret, psdata;
1250
1251 memset(buf, 0, sizeof(buf));
1252
1253
1254 if (test_bit(0, indio_dev->active_scan_mask) ||
1255 test_bit(1, indio_dev->active_scan_mask))
1256 mask |= LTR501_STATUS_ALS_RDY;
1257 if (test_bit(2, indio_dev->active_scan_mask))
1258 mask |= LTR501_STATUS_PS_RDY;
1259
1260 ret = ltr501_drdy(data, mask);
1261 if (ret < 0)
1262 goto done;
1263
1264 if (mask & LTR501_STATUS_ALS_RDY) {
1265 ret = regmap_bulk_read(data->regmap, LTR501_ALS_DATA1,
1266 (u8 *)als_buf, sizeof(als_buf));
1267 if (ret < 0)
1268 return ret;
1269 if (test_bit(0, indio_dev->active_scan_mask))
1270 buf[j++] = le16_to_cpu(als_buf[1]);
1271 if (test_bit(1, indio_dev->active_scan_mask))
1272 buf[j++] = le16_to_cpu(als_buf[0]);
1273 }
1274
1275 if (mask & LTR501_STATUS_PS_RDY) {
1276 ret = regmap_bulk_read(data->regmap, LTR501_PS_DATA,
1277 &psdata, 2);
1278 if (ret < 0)
1279 goto done;
1280 buf[j++] = psdata & LTR501_PS_DATA_MASK;
1281 }
1282
1283 iio_push_to_buffers_with_timestamp(indio_dev, buf,
1284 iio_get_time_ns(indio_dev));
1285
1286done:
1287 iio_trigger_notify_done(indio_dev->trig);
1288
1289 return IRQ_HANDLED;
1290}
1291
1292static irqreturn_t ltr501_interrupt_handler(int irq, void *private)
1293{
1294 struct iio_dev *indio_dev = private;
1295 struct ltr501_data *data = iio_priv(indio_dev);
1296 int ret, status;
1297
1298 ret = regmap_read(data->regmap, LTR501_ALS_PS_STATUS, &status);
1299 if (ret < 0) {
1300 dev_err(&data->client->dev,
1301 "irq read int reg failed\n");
1302 return IRQ_HANDLED;
1303 }
1304
1305 if (status & LTR501_STATUS_ALS_INTR)
1306 iio_push_event(indio_dev,
1307 IIO_UNMOD_EVENT_CODE(IIO_INTENSITY, 0,
1308 IIO_EV_TYPE_THRESH,
1309 IIO_EV_DIR_EITHER),
1310 iio_get_time_ns(indio_dev));
1311
1312 if (status & LTR501_STATUS_PS_INTR)
1313 iio_push_event(indio_dev,
1314 IIO_UNMOD_EVENT_CODE(IIO_PROXIMITY, 0,
1315 IIO_EV_TYPE_THRESH,
1316 IIO_EV_DIR_EITHER),
1317 iio_get_time_ns(indio_dev));
1318
1319 return IRQ_HANDLED;
1320}
1321
1322static int ltr501_init(struct ltr501_data *data)
1323{
1324 int ret, status;
1325
1326 ret = regmap_read(data->regmap, LTR501_ALS_CONTR, &status);
1327 if (ret < 0)
1328 return ret;
1329
1330 data->als_contr = status | data->chip_info->als_mode_active;
1331
1332 ret = regmap_read(data->regmap, LTR501_PS_CONTR, &status);
1333 if (ret < 0)
1334 return ret;
1335
1336 data->ps_contr = status | LTR501_CONTR_ACTIVE;
1337
1338 ret = ltr501_read_intr_prst(data, IIO_INTENSITY, &data->als_period);
1339 if (ret < 0)
1340 return ret;
1341
1342 ret = ltr501_read_intr_prst(data, IIO_PROXIMITY, &data->ps_period);
1343 if (ret < 0)
1344 return ret;
1345
1346 return ltr501_write_contr(data, data->als_contr, data->ps_contr);
1347}
1348
1349static bool ltr501_is_volatile_reg(struct device *dev, unsigned int reg)
1350{
1351 switch (reg) {
1352 case LTR501_ALS_DATA1:
1353 case LTR501_ALS_DATA0:
1354 case LTR501_ALS_PS_STATUS:
1355 case LTR501_PS_DATA:
1356 return true;
1357 default:
1358 return false;
1359 }
1360}
1361
1362static struct regmap_config ltr501_regmap_config = {
1363 .name = LTR501_REGMAP_NAME,
1364 .reg_bits = 8,
1365 .val_bits = 8,
1366 .max_register = LTR501_MAX_REG,
1367 .cache_type = REGCACHE_RBTREE,
1368 .volatile_reg = ltr501_is_volatile_reg,
1369};
1370
1371static int ltr501_powerdown(struct ltr501_data *data)
1372{
1373 return ltr501_write_contr(data, data->als_contr &
1374 ~data->chip_info->als_mode_active,
1375 data->ps_contr & ~LTR501_CONTR_ACTIVE);
1376}
1377
1378static const char *ltr501_match_acpi_device(struct device *dev, int *chip_idx)
1379{
1380 const struct acpi_device_id *id;
1381
1382 id = acpi_match_device(dev->driver->acpi_match_table, dev);
1383 if (!id)
1384 return NULL;
1385 *chip_idx = id->driver_data;
1386 return dev_name(dev);
1387}
1388
1389static int ltr501_probe(struct i2c_client *client,
1390 const struct i2c_device_id *id)
1391{
1392 struct ltr501_data *data;
1393 struct iio_dev *indio_dev;
1394 struct regmap *regmap;
1395 int ret, partid, chip_idx = 0;
1396 const char *name = NULL;
1397
1398 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
1399 if (!indio_dev)
1400 return -ENOMEM;
1401
1402 regmap = devm_regmap_init_i2c(client, <r501_regmap_config);
1403 if (IS_ERR(regmap)) {
1404 dev_err(&client->dev, "Regmap initialization failed.\n");
1405 return PTR_ERR(regmap);
1406 }
1407
1408 data = iio_priv(indio_dev);
1409 i2c_set_clientdata(client, indio_dev);
1410 data->client = client;
1411 data->regmap = regmap;
1412 mutex_init(&data->lock_als);
1413 mutex_init(&data->lock_ps);
1414
1415 data->reg_it = devm_regmap_field_alloc(&client->dev, regmap,
1416 reg_field_it);
1417 if (IS_ERR(data->reg_it)) {
1418 dev_err(&client->dev, "Integ time reg field init failed.\n");
1419 return PTR_ERR(data->reg_it);
1420 }
1421
1422 data->reg_als_intr = devm_regmap_field_alloc(&client->dev, regmap,
1423 reg_field_als_intr);
1424 if (IS_ERR(data->reg_als_intr)) {
1425 dev_err(&client->dev, "ALS intr mode reg field init failed\n");
1426 return PTR_ERR(data->reg_als_intr);
1427 }
1428
1429 data->reg_ps_intr = devm_regmap_field_alloc(&client->dev, regmap,
1430 reg_field_ps_intr);
1431 if (IS_ERR(data->reg_ps_intr)) {
1432 dev_err(&client->dev, "PS intr mode reg field init failed.\n");
1433 return PTR_ERR(data->reg_ps_intr);
1434 }
1435
1436 data->reg_als_rate = devm_regmap_field_alloc(&client->dev, regmap,
1437 reg_field_als_rate);
1438 if (IS_ERR(data->reg_als_rate)) {
1439 dev_err(&client->dev, "ALS samp rate field init failed.\n");
1440 return PTR_ERR(data->reg_als_rate);
1441 }
1442
1443 data->reg_ps_rate = devm_regmap_field_alloc(&client->dev, regmap,
1444 reg_field_ps_rate);
1445 if (IS_ERR(data->reg_ps_rate)) {
1446 dev_err(&client->dev, "PS samp rate field init failed.\n");
1447 return PTR_ERR(data->reg_ps_rate);
1448 }
1449
1450 data->reg_als_prst = devm_regmap_field_alloc(&client->dev, regmap,
1451 reg_field_als_prst);
1452 if (IS_ERR(data->reg_als_prst)) {
1453 dev_err(&client->dev, "ALS prst reg field init failed\n");
1454 return PTR_ERR(data->reg_als_prst);
1455 }
1456
1457 data->reg_ps_prst = devm_regmap_field_alloc(&client->dev, regmap,
1458 reg_field_ps_prst);
1459 if (IS_ERR(data->reg_ps_prst)) {
1460 dev_err(&client->dev, "PS prst reg field init failed.\n");
1461 return PTR_ERR(data->reg_ps_prst);
1462 }
1463
1464 ret = regmap_read(data->regmap, LTR501_PART_ID, &partid);
1465 if (ret < 0)
1466 return ret;
1467
1468 if (id) {
1469 name = id->name;
1470 chip_idx = id->driver_data;
1471 } else if (ACPI_HANDLE(&client->dev)) {
1472 name = ltr501_match_acpi_device(&client->dev, &chip_idx);
1473 } else {
1474 return -ENODEV;
1475 }
1476
1477 data->chip_info = <r501_chip_info_tbl[chip_idx];
1478
1479 if ((partid >> 4) != data->chip_info->partid)
1480 return -ENODEV;
1481
1482 indio_dev->dev.parent = &client->dev;
1483 indio_dev->info = data->chip_info->info;
1484 indio_dev->channels = data->chip_info->channels;
1485 indio_dev->num_channels = data->chip_info->no_channels;
1486 indio_dev->name = name;
1487 indio_dev->modes = INDIO_DIRECT_MODE;
1488
1489 ret = ltr501_init(data);
1490 if (ret < 0)
1491 return ret;
1492
1493 if (client->irq > 0) {
1494 ret = devm_request_threaded_irq(&client->dev, client->irq,
1495 NULL, ltr501_interrupt_handler,
1496 IRQF_TRIGGER_FALLING |
1497 IRQF_ONESHOT,
1498 "ltr501_thresh_event",
1499 indio_dev);
1500 if (ret) {
1501 dev_err(&client->dev, "request irq (%d) failed\n",
1502 client->irq);
1503 return ret;
1504 }
1505 } else {
1506 indio_dev->info = data->chip_info->info_no_irq;
1507 }
1508
1509 ret = iio_triggered_buffer_setup(indio_dev, NULL,
1510 ltr501_trigger_handler, NULL);
1511 if (ret)
1512 goto powerdown_on_error;
1513
1514 ret = iio_device_register(indio_dev);
1515 if (ret)
1516 goto error_unreg_buffer;
1517
1518 return 0;
1519
1520error_unreg_buffer:
1521 iio_triggered_buffer_cleanup(indio_dev);
1522powerdown_on_error:
1523 ltr501_powerdown(data);
1524 return ret;
1525}
1526
1527static int ltr501_remove(struct i2c_client *client)
1528{
1529 struct iio_dev *indio_dev = i2c_get_clientdata(client);
1530
1531 iio_device_unregister(indio_dev);
1532 iio_triggered_buffer_cleanup(indio_dev);
1533 ltr501_powerdown(iio_priv(indio_dev));
1534
1535 return 0;
1536}
1537
1538#ifdef CONFIG_PM_SLEEP
1539static int ltr501_suspend(struct device *dev)
1540{
1541 struct ltr501_data *data = iio_priv(i2c_get_clientdata(
1542 to_i2c_client(dev)));
1543 return ltr501_powerdown(data);
1544}
1545
1546static int ltr501_resume(struct device *dev)
1547{
1548 struct ltr501_data *data = iio_priv(i2c_get_clientdata(
1549 to_i2c_client(dev)));
1550
1551 return ltr501_write_contr(data, data->als_contr,
1552 data->ps_contr);
1553}
1554#endif
1555
1556static SIMPLE_DEV_PM_OPS(ltr501_pm_ops, ltr501_suspend, ltr501_resume);
1557
1558static const struct acpi_device_id ltr_acpi_match[] = {
1559 {"LTER0501", ltr501},
1560 {"LTER0559", ltr559},
1561 {"LTER0301", ltr301},
1562 { },
1563};
1564MODULE_DEVICE_TABLE(acpi, ltr_acpi_match);
1565
1566static const struct i2c_device_id ltr501_id[] = {
1567 { "ltr501", ltr501},
1568 { "ltr559", ltr559},
1569 { "ltr301", ltr301},
1570 { }
1571};
1572MODULE_DEVICE_TABLE(i2c, ltr501_id);
1573
1574static struct i2c_driver ltr501_driver = {
1575 .driver = {
1576 .name = LTR501_DRV_NAME,
1577 .pm = <r501_pm_ops,
1578 .acpi_match_table = ACPI_PTR(ltr_acpi_match),
1579 },
1580 .probe = ltr501_probe,
1581 .remove = ltr501_remove,
1582 .id_table = ltr501_id,
1583};
1584
1585module_i2c_driver(ltr501_driver);
1586
1587MODULE_AUTHOR("Peter Meerwald <pmeerw@pmeerw.net>");
1588MODULE_DESCRIPTION("Lite-On LTR501 ambient light and proximity sensor driver");
1589MODULE_LICENSE("GPL");
1590
