LXR linux/drivers/iommu/intel-pasid.h

   1/* SPDX-License-Identifier: GPL-2.0 */
   2/*
   3 * intel-pasid.h - PASID idr, table and entry header
   4 *
   5 * Copyright (C) 2018 Intel Corporation
   6 *
   7 * Author: Lu Baolu <baolu.lu@linux.intel.com>
   8 */
   9
  10#ifndef __INTEL_PASID_H
  11#define __INTEL_PASID_H
  12
  13#define PASID_RID2PASID                 0x0
  14#define PASID_MIN                       0x1
  15#define PASID_MAX                       0x100000
  16#define PASID_PTE_MASK                  0x3F
  17#define PASID_PTE_PRESENT               1
  18#define PDE_PFN_MASK                    PAGE_MASK
  19#define PASID_PDE_SHIFT                 6
  20#define MAX_NR_PASID_BITS               20
  21#define PASID_TBL_ENTRIES               BIT(PASID_PDE_SHIFT)
  22
  23#define is_pasid_enabled(entry)         (((entry)->lo >> 3) & 0x1)
  24#define get_pasid_dir_size(entry)       (1 << ((((entry)->lo >> 9) & 0x7) + 7))
  25
  26/*
  27 * Domain ID reserved for pasid entries programmed for first-level
  28 * only and pass-through transfer modes.
  29 */
  30#define FLPT_DEFAULT_DID                1
  31
  32/*
  33 * The SUPERVISOR_MODE flag indicates a first level translation which
  34 * can be used for access to kernel addresses. It is valid only for
  35 * access to the kernel's static 1:1 mapping of physical memory — not
  36 * to vmalloc or even module mappings.
  37 */
  38#define PASID_FLAG_SUPERVISOR_MODE      BIT(0)
  39
  40struct pasid_dir_entry {
  41        u64 val;
  42};
  43
  44struct pasid_entry {
  45        u64 val[8];
  46};
  47
  48/* The representative of a PASID table */
  49struct pasid_table {
  50        void                    *table;         /* pasid table pointer */
  51        int                     order;          /* page order of pasid table */
  52        int                     max_pasid;      /* max pasid */
  53        struct list_head        dev;            /* device list */
  54};
  55
  56/* Get PRESENT bit of a PASID directory entry. */
  57static inline bool pasid_pde_is_present(struct pasid_dir_entry *pde)
  58{
  59        return READ_ONCE(pde->val) & PASID_PTE_PRESENT;
  60}
  61
  62/* Get PASID table from a PASID directory entry. */
  63static inline struct pasid_entry *
  64get_pasid_table_from_pde(struct pasid_dir_entry *pde)
  65{
  66        if (!pasid_pde_is_present(pde))
  67                return NULL;
  68
  69        return phys_to_virt(READ_ONCE(pde->val) & PDE_PFN_MASK);
  70}
  71
  72/* Get PRESENT bit of a PASID table entry. */
  73static inline bool pasid_pte_is_present(struct pasid_entry *pte)
  74{
  75        return READ_ONCE(pte->val[0]) & PASID_PTE_PRESENT;
  76}
  77
  78extern u32 intel_pasid_max_id;
  79int intel_pasid_alloc_id(void *ptr, int start, int end, gfp_t gfp);
  80void intel_pasid_free_id(int pasid);
  81void *intel_pasid_lookup_id(int pasid);
  82int intel_pasid_alloc_table(struct device *dev);
  83void intel_pasid_free_table(struct device *dev);
  84struct pasid_table *intel_pasid_get_table(struct device *dev);
  85int intel_pasid_get_dev_max_id(struct device *dev);
  86struct pasid_entry *intel_pasid_get_entry(struct device *dev, int pasid);
  87int intel_pasid_setup_first_level(struct intel_iommu *iommu,
  88                                  struct device *dev, pgd_t *pgd,
  89                                  int pasid, u16 did, int flags);
  90int intel_pasid_setup_second_level(struct intel_iommu *iommu,
  91                                   struct dmar_domain *domain,
  92                                   struct device *dev, int pasid);
  93int intel_pasid_setup_pass_through(struct intel_iommu *iommu,
  94                                   struct dmar_domain *domain,
  95                                   struct device *dev, int pasid);
  96void intel_pasid_tear_down_entry(struct intel_iommu *iommu,
  97                                 struct device *dev, int pasid);
  98
  99#endif /* __INTEL_PASID_H */
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