LXR linux/drivers/irqchip/irq-aspeed-i2c-ic.c

   1// SPDX-License-Identifier: GPL-2.0-only
   2/*
   3 *  Aspeed 24XX/25XX I2C Interrupt Controller.
   4 *
   5 *  Copyright (C) 2012-2017 ASPEED Technology Inc.
   6 *  Copyright 2017 IBM Corporation
   7 *  Copyright 2017 Google, Inc.
   8 */
   9
  10#include <linux/irq.h>
  11#include <linux/irqchip.h>
  12#include <linux/irqchip/chained_irq.h>
  13#include <linux/irqdomain.h>
  14#include <linux/of_address.h>
  15#include <linux/of_irq.h>
  16#include <linux/io.h>
  17
  18
  19#define ASPEED_I2C_IC_NUM_BUS 14
  20
  21struct aspeed_i2c_ic {
  22        void __iomem            *base;
  23        int                     parent_irq;
  24        struct irq_domain       *irq_domain;
  25};
  26
  27/*
  28 * The aspeed chip provides a single hardware interrupt for all of the I2C
  29 * busses, so we use a dummy interrupt chip to translate this single interrupt
  30 * into multiple interrupts, each associated with a single I2C bus.
  31 */
  32static void aspeed_i2c_ic_irq_handler(struct irq_desc *desc)
  33{
  34        struct aspeed_i2c_ic *i2c_ic = irq_desc_get_handler_data(desc);
  35        struct irq_chip *chip = irq_desc_get_chip(desc);
  36        unsigned long bit, status;
  37        unsigned int bus_irq;
  38
  39        chained_irq_enter(chip, desc);
  40        status = readl(i2c_ic->base);
  41        for_each_set_bit(bit, &status, ASPEED_I2C_IC_NUM_BUS) {
  42                bus_irq = irq_find_mapping(i2c_ic->irq_domain, bit);
  43                generic_handle_irq(bus_irq);
  44        }
  45        chained_irq_exit(chip, desc);
  46}
  47
  48/*
  49 * Set simple handler and mark IRQ as valid. Nothing interesting to do here
  50 * since we are using a dummy interrupt chip.
  51 */
  52static int aspeed_i2c_ic_map_irq_domain(struct irq_domain *domain,
  53                                        unsigned int irq, irq_hw_number_t hwirq)
  54{
  55        irq_set_chip_and_handler(irq, &dummy_irq_chip, handle_simple_irq);
  56        irq_set_chip_data(irq, domain->host_data);
  57
  58        return 0;
  59}
  60
  61static const struct irq_domain_ops aspeed_i2c_ic_irq_domain_ops = {
  62        .map = aspeed_i2c_ic_map_irq_domain,
  63};
  64
  65static int __init aspeed_i2c_ic_of_init(struct device_node *node,
  66                                        struct device_node *parent)
  67{
  68        struct aspeed_i2c_ic *i2c_ic;
  69        int ret = 0;
  70
  71        i2c_ic = kzalloc(sizeof(*i2c_ic), GFP_KERNEL);
  72        if (!i2c_ic)
  73                return -ENOMEM;
  74
  75        i2c_ic->base = of_iomap(node, 0);
  76        if (!i2c_ic->base) {
  77                ret = -ENOMEM;
  78                goto err_free_ic;
  79        }
  80
  81        i2c_ic->parent_irq = irq_of_parse_and_map(node, 0);
  82        if (i2c_ic->parent_irq < 0) {
  83                ret = i2c_ic->parent_irq;
  84                goto err_iounmap;
  85        }
  86
  87        i2c_ic->irq_domain = irq_domain_add_linear(node, ASPEED_I2C_IC_NUM_BUS,
  88                                                   &aspeed_i2c_ic_irq_domain_ops,
  89                                                   NULL);
  90        if (!i2c_ic->irq_domain) {
  91                ret = -ENOMEM;
  92                goto err_iounmap;
  93        }
  94
  95        i2c_ic->irq_domain->name = "aspeed-i2c-domain";
  96
  97        irq_set_chained_handler_and_data(i2c_ic->parent_irq,
  98                                         aspeed_i2c_ic_irq_handler, i2c_ic);
  99
 100        pr_info("i2c controller registered, irq %d\n", i2c_ic->parent_irq);
 101
 102        return 0;
 103
 104err_iounmap:
 105        iounmap(i2c_ic->base);
 106err_free_ic:
 107        kfree(i2c_ic);
 108        return ret;
 109}
 110
 111IRQCHIP_DECLARE(ast2400_i2c_ic, "aspeed,ast2400-i2c-ic", aspeed_i2c_ic_of_init);
 112IRQCHIP_DECLARE(ast2500_i2c_ic, "aspeed,ast2500-i2c-ic", aspeed_i2c_ic_of_init);
 113