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20#include <linux/bitops.h>
21#include <linux/clk.h>
22#include <linux/delay.h>
23#include <linux/device.h>
24#include <linux/gpio/consumer.h>
25#include <linux/i2c.h>
26#include <linux/init.h>
27#include <linux/module.h>
28#include <linux/of.h>
29#include <linux/of_graph.h>
30#include <linux/regulator/consumer.h>
31#include <linux/slab.h>
32#include <linux/types.h>
33#include <media/v4l2-ctrls.h>
34#include <media/v4l2-fwnode.h>
35#include <media/v4l2-subdev.h>
36
37#define OV5645_VOLTAGE_ANALOG 2800000
38#define OV5645_VOLTAGE_DIGITAL_CORE 1500000
39#define OV5645_VOLTAGE_DIGITAL_IO 1800000
40
41#define OV5645_SYSTEM_CTRL0 0x3008
42#define OV5645_SYSTEM_CTRL0_START 0x02
43#define OV5645_SYSTEM_CTRL0_STOP 0x42
44#define OV5645_CHIP_ID_HIGH 0x300a
45#define OV5645_CHIP_ID_HIGH_BYTE 0x56
46#define OV5645_CHIP_ID_LOW 0x300b
47#define OV5645_CHIP_ID_LOW_BYTE 0x45
48#define OV5645_AWB_MANUAL_CONTROL 0x3406
49#define OV5645_AWB_MANUAL_ENABLE BIT(0)
50#define OV5645_AEC_PK_MANUAL 0x3503
51#define OV5645_AEC_MANUAL_ENABLE BIT(0)
52#define OV5645_AGC_MANUAL_ENABLE BIT(1)
53#define OV5645_TIMING_TC_REG20 0x3820
54#define OV5645_SENSOR_VFLIP BIT(1)
55#define OV5645_ISP_VFLIP BIT(2)
56#define OV5645_TIMING_TC_REG21 0x3821
57#define OV5645_SENSOR_MIRROR BIT(1)
58#define OV5645_PRE_ISP_TEST_SETTING_1 0x503d
59#define OV5645_TEST_PATTERN_MASK 0x3
60#define OV5645_SET_TEST_PATTERN(x) ((x) & OV5645_TEST_PATTERN_MASK)
61#define OV5645_TEST_PATTERN_ENABLE BIT(7)
62#define OV5645_SDE_SAT_U 0x5583
63#define OV5645_SDE_SAT_V 0x5584
64
65struct reg_value {
66 u16 reg;
67 u8 val;
68};
69
70struct ov5645_mode_info {
71 u32 width;
72 u32 height;
73 const struct reg_value *data;
74 u32 data_size;
75 u32 pixel_clock;
76 u32 link_freq;
77};
78
79struct ov5645 {
80 struct i2c_client *i2c_client;
81 struct device *dev;
82 struct v4l2_subdev sd;
83 struct media_pad pad;
84 struct v4l2_fwnode_endpoint ep;
85 struct v4l2_mbus_framefmt fmt;
86 struct v4l2_rect crop;
87 struct clk *xclk;
88
89 struct regulator *io_regulator;
90 struct regulator *core_regulator;
91 struct regulator *analog_regulator;
92
93 const struct ov5645_mode_info *current_mode;
94
95 struct v4l2_ctrl_handler ctrls;
96 struct v4l2_ctrl *pixel_clock;
97 struct v4l2_ctrl *link_freq;
98
99
100 u8 aec_pk_manual;
101 u8 timing_tc_reg20;
102 u8 timing_tc_reg21;
103
104 struct mutex power_lock;
105 int power_count;
106
107 struct gpio_desc *enable_gpio;
108 struct gpio_desc *rst_gpio;
109};
110
111static inline struct ov5645 *to_ov5645(struct v4l2_subdev *sd)
112{
113 return container_of(sd, struct ov5645, sd);
114}
115
116static const struct reg_value ov5645_global_init_setting[] = {
117 { 0x3103, 0x11 },
118 { 0x3008, 0x82 },
119 { 0x3008, 0x42 },
120 { 0x3103, 0x03 },
121 { 0x3503, 0x07 },
122 { 0x3002, 0x1c },
123 { 0x3006, 0xc3 },
124 { 0x300e, 0x45 },
125 { 0x3017, 0x00 },
126 { 0x3018, 0x00 },
127 { 0x302e, 0x0b },
128 { 0x3037, 0x13 },
129 { 0x3108, 0x01 },
130 { 0x3611, 0x06 },
131 { 0x3500, 0x00 },
132 { 0x3501, 0x01 },
133 { 0x3502, 0x00 },
134 { 0x350a, 0x00 },
135 { 0x350b, 0x3f },
136 { 0x3620, 0x33 },
137 { 0x3621, 0xe0 },
138 { 0x3622, 0x01 },
139 { 0x3630, 0x2e },
140 { 0x3631, 0x00 },
141 { 0x3632, 0x32 },
142 { 0x3633, 0x52 },
143 { 0x3634, 0x70 },
144 { 0x3635, 0x13 },
145 { 0x3636, 0x03 },
146 { 0x3703, 0x5a },
147 { 0x3704, 0xa0 },
148 { 0x3705, 0x1a },
149 { 0x3709, 0x12 },
150 { 0x370b, 0x61 },
151 { 0x370f, 0x10 },
152 { 0x3715, 0x78 },
153 { 0x3717, 0x01 },
154 { 0x371b, 0x20 },
155 { 0x3731, 0x12 },
156 { 0x3901, 0x0a },
157 { 0x3905, 0x02 },
158 { 0x3906, 0x10 },
159 { 0x3719, 0x86 },
160 { 0x3810, 0x00 },
161 { 0x3811, 0x10 },
162 { 0x3812, 0x00 },
163 { 0x3821, 0x01 },
164 { 0x3824, 0x01 },
165 { 0x3826, 0x03 },
166 { 0x3828, 0x08 },
167 { 0x3a19, 0xf8 },
168 { 0x3c01, 0x34 },
169 { 0x3c04, 0x28 },
170 { 0x3c05, 0x98 },
171 { 0x3c07, 0x07 },
172 { 0x3c09, 0xc2 },
173 { 0x3c0a, 0x9c },
174 { 0x3c0b, 0x40 },
175 { 0x3c01, 0x34 },
176 { 0x4001, 0x02 },
177 { 0x4514, 0x00 },
178 { 0x4520, 0xb0 },
179 { 0x460b, 0x37 },
180 { 0x460c, 0x20 },
181 { 0x4818, 0x01 },
182 { 0x481d, 0xf0 },
183 { 0x481f, 0x50 },
184 { 0x4823, 0x70 },
185 { 0x4831, 0x14 },
186 { 0x5000, 0xa7 },
187 { 0x5001, 0x83 },
188 { 0x501d, 0x00 },
189 { 0x501f, 0x00 },
190 { 0x503d, 0x00 },
191 { 0x505c, 0x30 },
192 { 0x5181, 0x59 },
193 { 0x5183, 0x00 },
194 { 0x5191, 0xf0 },
195 { 0x5192, 0x03 },
196 { 0x5684, 0x10 },
197 { 0x5685, 0xa0 },
198 { 0x5686, 0x0c },
199 { 0x5687, 0x78 },
200 { 0x5a00, 0x08 },
201 { 0x5a21, 0x00 },
202 { 0x5a24, 0x00 },
203 { 0x3008, 0x02 },
204 { 0x3503, 0x00 },
205 { 0x5180, 0xff },
206 { 0x5181, 0xf2 },
207 { 0x5182, 0x00 },
208 { 0x5183, 0x14 },
209 { 0x5184, 0x25 },
210 { 0x5185, 0x24 },
211 { 0x5186, 0x09 },
212 { 0x5187, 0x09 },
213 { 0x5188, 0x0a },
214 { 0x5189, 0x75 },
215 { 0x518a, 0x52 },
216 { 0x518b, 0xea },
217 { 0x518c, 0xa8 },
218 { 0x518d, 0x42 },
219 { 0x518e, 0x38 },
220 { 0x518f, 0x56 },
221 { 0x5190, 0x42 },
222 { 0x5191, 0xf8 },
223 { 0x5192, 0x04 },
224 { 0x5193, 0x70 },
225 { 0x5194, 0xf0 },
226 { 0x5195, 0xf0 },
227 { 0x5196, 0x03 },
228 { 0x5197, 0x01 },
229 { 0x5198, 0x04 },
230 { 0x5199, 0x12 },
231 { 0x519a, 0x04 },
232 { 0x519b, 0x00 },
233 { 0x519c, 0x06 },
234 { 0x519d, 0x82 },
235 { 0x519e, 0x38 },
236 { 0x5381, 0x1e },
237 { 0x5382, 0x5b },
238 { 0x5383, 0x08 },
239 { 0x5384, 0x0a },
240 { 0x5385, 0x7e },
241 { 0x5386, 0x88 },
242 { 0x5387, 0x7c },
243 { 0x5388, 0x6c },
244 { 0x5389, 0x10 },
245 { 0x538a, 0x01 },
246 { 0x538b, 0x98 },
247 { 0x5300, 0x08 },
248 { 0x5301, 0x30 },
249 { 0x5302, 0x10 },
250 { 0x5303, 0x00 },
251 { 0x5304, 0x08 },
252 { 0x5305, 0x30 },
253 { 0x5306, 0x08 },
254 { 0x5307, 0x16 },
255 { 0x5309, 0x08 },
256 { 0x530a, 0x30 },
257 { 0x530b, 0x04 },
258 { 0x530c, 0x06 },
259 { 0x5480, 0x01 },
260 { 0x5481, 0x08 },
261 { 0x5482, 0x14 },
262 { 0x5483, 0x28 },
263 { 0x5484, 0x51 },
264 { 0x5485, 0x65 },
265 { 0x5486, 0x71 },
266 { 0x5487, 0x7d },
267 { 0x5488, 0x87 },
268 { 0x5489, 0x91 },
269 { 0x548a, 0x9a },
270 { 0x548b, 0xaa },
271 { 0x548c, 0xb8 },
272 { 0x548d, 0xcd },
273 { 0x548e, 0xdd },
274 { 0x548f, 0xea },
275 { 0x5490, 0x1d },
276 { 0x5580, 0x02 },
277 { 0x5583, 0x40 },
278 { 0x5584, 0x10 },
279 { 0x5589, 0x10 },
280 { 0x558a, 0x00 },
281 { 0x558b, 0xf8 },
282 { 0x5800, 0x3f },
283 { 0x5801, 0x16 },
284 { 0x5802, 0x0e },
285 { 0x5803, 0x0d },
286 { 0x5804, 0x17 },
287 { 0x5805, 0x3f },
288 { 0x5806, 0x0b },
289 { 0x5807, 0x06 },
290 { 0x5808, 0x04 },
291 { 0x5809, 0x04 },
292 { 0x580a, 0x06 },
293 { 0x580b, 0x0b },
294 { 0x580c, 0x09 },
295 { 0x580d, 0x03 },
296 { 0x580e, 0x00 },
297 { 0x580f, 0x00 },
298 { 0x5810, 0x03 },
299 { 0x5811, 0x08 },
300 { 0x5812, 0x0a },
301 { 0x5813, 0x03 },
302 { 0x5814, 0x00 },
303 { 0x5815, 0x00 },
304 { 0x5816, 0x04 },
305 { 0x5817, 0x09 },
306 { 0x5818, 0x0f },
307 { 0x5819, 0x08 },
308 { 0x581a, 0x06 },
309 { 0x581b, 0x06 },
310 { 0x581c, 0x08 },
311 { 0x581d, 0x0c },
312 { 0x581e, 0x3f },
313 { 0x581f, 0x1e },
314 { 0x5820, 0x12 },
315 { 0x5821, 0x13 },
316 { 0x5822, 0x21 },
317 { 0x5823, 0x3f },
318 { 0x5824, 0x68 },
319 { 0x5825, 0x28 },
320 { 0x5826, 0x2c },
321 { 0x5827, 0x28 },
322 { 0x5828, 0x08 },
323 { 0x5829, 0x48 },
324 { 0x582a, 0x64 },
325 { 0x582b, 0x62 },
326 { 0x582c, 0x64 },
327 { 0x582d, 0x28 },
328 { 0x582e, 0x46 },
329 { 0x582f, 0x62 },
330 { 0x5830, 0x60 },
331 { 0x5831, 0x62 },
332 { 0x5832, 0x26 },
333 { 0x5833, 0x48 },
334 { 0x5834, 0x66 },
335 { 0x5835, 0x44 },
336 { 0x5836, 0x64 },
337 { 0x5837, 0x28 },
338 { 0x5838, 0x66 },
339 { 0x5839, 0x48 },
340 { 0x583a, 0x2c },
341 { 0x583b, 0x28 },
342 { 0x583c, 0x26 },
343 { 0x583d, 0xae },
344 { 0x5025, 0x00 },
345 { 0x3a0f, 0x30 },
346 { 0x3a10, 0x28 },
347 { 0x3a1b, 0x30 },
348 { 0x3a1e, 0x26 },
349 { 0x3a11, 0x60 },
350 { 0x3a1f, 0x14 },
351 { 0x0601, 0x02 },
352 { 0x3008, 0x42 },
353 { 0x3008, 0x02 }
354};
355
356static const struct reg_value ov5645_setting_sxga[] = {
357 { 0x3612, 0xa9 },
358 { 0x3614, 0x50 },
359 { 0x3618, 0x00 },
360 { 0x3034, 0x18 },
361 { 0x3035, 0x21 },
362 { 0x3036, 0x70 },
363 { 0x3600, 0x09 },
364 { 0x3601, 0x43 },
365 { 0x3708, 0x66 },
366 { 0x370c, 0xc3 },
367 { 0x3800, 0x00 },
368 { 0x3801, 0x00 },
369 { 0x3802, 0x00 },
370 { 0x3803, 0x06 },
371 { 0x3804, 0x0a },
372 { 0x3805, 0x3f },
373 { 0x3806, 0x07 },
374 { 0x3807, 0x9d },
375 { 0x3808, 0x05 },
376 { 0x3809, 0x00 },
377 { 0x380a, 0x03 },
378 { 0x380b, 0xc0 },
379 { 0x380c, 0x07 },
380 { 0x380d, 0x68 },
381 { 0x380e, 0x03 },
382 { 0x380f, 0xd8 },
383 { 0x3813, 0x06 },
384 { 0x3814, 0x31 },
385 { 0x3815, 0x31 },
386 { 0x3820, 0x47 },
387 { 0x3a02, 0x03 },
388 { 0x3a03, 0xd8 },
389 { 0x3a08, 0x01 },
390 { 0x3a09, 0xf8 },
391 { 0x3a0a, 0x01 },
392 { 0x3a0b, 0xa4 },
393 { 0x3a0e, 0x02 },
394 { 0x3a0d, 0x02 },
395 { 0x3a14, 0x03 },
396 { 0x3a15, 0xd8 },
397 { 0x3a18, 0x00 },
398 { 0x4004, 0x02 },
399 { 0x4005, 0x18 },
400 { 0x4300, 0x32 },
401 { 0x4202, 0x00 }
402};
403
404static const struct reg_value ov5645_setting_1080p[] = {
405 { 0x3612, 0xab },
406 { 0x3614, 0x50 },
407 { 0x3618, 0x04 },
408 { 0x3034, 0x18 },
409 { 0x3035, 0x11 },
410 { 0x3036, 0x54 },
411 { 0x3600, 0x08 },
412 { 0x3601, 0x33 },
413 { 0x3708, 0x63 },
414 { 0x370c, 0xc0 },
415 { 0x3800, 0x01 },
416 { 0x3801, 0x50 },
417 { 0x3802, 0x01 },
418 { 0x3803, 0xb2 },
419 { 0x3804, 0x08 },
420 { 0x3805, 0xef },
421 { 0x3806, 0x05 },
422 { 0x3807, 0xf1 },
423 { 0x3808, 0x07 },
424 { 0x3809, 0x80 },
425 { 0x380a, 0x04 },
426 { 0x380b, 0x38 },
427 { 0x380c, 0x09 },
428 { 0x380d, 0xc4 },
429 { 0x380e, 0x04 },
430 { 0x380f, 0x60 },
431 { 0x3813, 0x04 },
432 { 0x3814, 0x11 },
433 { 0x3815, 0x11 },
434 { 0x3820, 0x47 },
435 { 0x4514, 0x88 },
436 { 0x3a02, 0x04 },
437 { 0x3a03, 0x60 },
438 { 0x3a08, 0x01 },
439 { 0x3a09, 0x50 },
440 { 0x3a0a, 0x01 },
441 { 0x3a0b, 0x18 },
442 { 0x3a0e, 0x03 },
443 { 0x3a0d, 0x04 },
444 { 0x3a14, 0x04 },
445 { 0x3a15, 0x60 },
446 { 0x3a18, 0x00 },
447 { 0x4004, 0x06 },
448 { 0x4005, 0x18 },
449 { 0x4300, 0x32 },
450 { 0x4202, 0x00 },
451 { 0x4837, 0x0b }
452};
453
454static const struct reg_value ov5645_setting_full[] = {
455 { 0x3612, 0xab },
456 { 0x3614, 0x50 },
457 { 0x3618, 0x04 },
458 { 0x3034, 0x18 },
459 { 0x3035, 0x11 },
460 { 0x3036, 0x54 },
461 { 0x3600, 0x08 },
462 { 0x3601, 0x33 },
463 { 0x3708, 0x63 },
464 { 0x370c, 0xc0 },
465 { 0x3800, 0x00 },
466 { 0x3801, 0x00 },
467 { 0x3802, 0x00 },
468 { 0x3803, 0x00 },
469 { 0x3804, 0x0a },
470 { 0x3805, 0x3f },
471 { 0x3806, 0x07 },
472 { 0x3807, 0x9f },
473 { 0x3808, 0x0a },
474 { 0x3809, 0x20 },
475 { 0x380a, 0x07 },
476 { 0x380b, 0x98 },
477 { 0x380c, 0x0b },
478 { 0x380d, 0x1c },
479 { 0x380e, 0x07 },
480 { 0x380f, 0xb0 },
481 { 0x3813, 0x06 },
482 { 0x3814, 0x11 },
483 { 0x3815, 0x11 },
484 { 0x3820, 0x47 },
485 { 0x4514, 0x88 },
486 { 0x3a02, 0x07 },
487 { 0x3a03, 0xb0 },
488 { 0x3a08, 0x01 },
489 { 0x3a09, 0x27 },
490 { 0x3a0a, 0x00 },
491 { 0x3a0b, 0xf6 },
492 { 0x3a0e, 0x06 },
493 { 0x3a0d, 0x08 },
494 { 0x3a14, 0x07 },
495 { 0x3a15, 0xb0 },
496 { 0x3a18, 0x01 },
497 { 0x4004, 0x06 },
498 { 0x4005, 0x18 },
499 { 0x4300, 0x32 },
500 { 0x4837, 0x0b },
501 { 0x4202, 0x00 }
502};
503
504static const s64 link_freq[] = {
505 224000000,
506 336000000
507};
508
509static const struct ov5645_mode_info ov5645_mode_info_data[] = {
510 {
511 .width = 1280,
512 .height = 960,
513 .data = ov5645_setting_sxga,
514 .data_size = ARRAY_SIZE(ov5645_setting_sxga),
515 .pixel_clock = 112000000,
516 .link_freq = 0
517 },
518 {
519 .width = 1920,
520 .height = 1080,
521 .data = ov5645_setting_1080p,
522 .data_size = ARRAY_SIZE(ov5645_setting_1080p),
523 .pixel_clock = 168000000,
524 .link_freq = 1
525 },
526 {
527 .width = 2592,
528 .height = 1944,
529 .data = ov5645_setting_full,
530 .data_size = ARRAY_SIZE(ov5645_setting_full),
531 .pixel_clock = 168000000,
532 .link_freq = 1
533 },
534};
535
536static int ov5645_regulators_enable(struct ov5645 *ov5645)
537{
538 int ret;
539
540 ret = regulator_enable(ov5645->io_regulator);
541 if (ret < 0) {
542 dev_err(ov5645->dev, "set io voltage failed\n");
543 return ret;
544 }
545
546 ret = regulator_enable(ov5645->analog_regulator);
547 if (ret) {
548 dev_err(ov5645->dev, "set analog voltage failed\n");
549 goto err_disable_io;
550 }
551
552 ret = regulator_enable(ov5645->core_regulator);
553 if (ret) {
554 dev_err(ov5645->dev, "set core voltage failed\n");
555 goto err_disable_analog;
556 }
557
558 return 0;
559
560err_disable_analog:
561 regulator_disable(ov5645->analog_regulator);
562err_disable_io:
563 regulator_disable(ov5645->io_regulator);
564
565 return ret;
566}
567
568static void ov5645_regulators_disable(struct ov5645 *ov5645)
569{
570 int ret;
571
572 ret = regulator_disable(ov5645->core_regulator);
573 if (ret < 0)
574 dev_err(ov5645->dev, "core regulator disable failed\n");
575
576 ret = regulator_disable(ov5645->analog_regulator);
577 if (ret < 0)
578 dev_err(ov5645->dev, "analog regulator disable failed\n");
579
580 ret = regulator_disable(ov5645->io_regulator);
581 if (ret < 0)
582 dev_err(ov5645->dev, "io regulator disable failed\n");
583}
584
585static int ov5645_write_reg(struct ov5645 *ov5645, u16 reg, u8 val)
586{
587 u8 regbuf[3];
588 int ret;
589
590 regbuf[0] = reg >> 8;
591 regbuf[1] = reg & 0xff;
592 regbuf[2] = val;
593
594 ret = i2c_master_send(ov5645->i2c_client, regbuf, 3);
595 if (ret < 0) {
596 dev_err(ov5645->dev, "%s: write reg error %d: reg=%x, val=%x\n",
597 __func__, ret, reg, val);
598 return ret;
599 }
600
601 return 0;
602}
603
604static int ov5645_read_reg(struct ov5645 *ov5645, u16 reg, u8 *val)
605{
606 u8 regbuf[2];
607 int ret;
608
609 regbuf[0] = reg >> 8;
610 regbuf[1] = reg & 0xff;
611
612 ret = i2c_master_send(ov5645->i2c_client, regbuf, 2);
613 if (ret < 0) {
614 dev_err(ov5645->dev, "%s: write reg error %d: reg=%x\n",
615 __func__, ret, reg);
616 return ret;
617 }
618
619 ret = i2c_master_recv(ov5645->i2c_client, val, 1);
620 if (ret < 0) {
621 dev_err(ov5645->dev, "%s: read reg error %d: reg=%x\n",
622 __func__, ret, reg);
623 return ret;
624 }
625
626 return 0;
627}
628
629static int ov5645_set_aec_mode(struct ov5645 *ov5645, u32 mode)
630{
631 u8 val = ov5645->aec_pk_manual;
632 int ret;
633
634 if (mode == V4L2_EXPOSURE_AUTO)
635 val &= ~OV5645_AEC_MANUAL_ENABLE;
636 else
637 val |= OV5645_AEC_MANUAL_ENABLE;
638
639 ret = ov5645_write_reg(ov5645, OV5645_AEC_PK_MANUAL, val);
640 if (!ret)
641 ov5645->aec_pk_manual = val;
642
643 return ret;
644}
645
646static int ov5645_set_agc_mode(struct ov5645 *ov5645, u32 enable)
647{
648 u8 val = ov5645->aec_pk_manual;
649 int ret;
650
651 if (enable)
652 val &= ~OV5645_AGC_MANUAL_ENABLE;
653 else
654 val |= OV5645_AGC_MANUAL_ENABLE;
655
656 ret = ov5645_write_reg(ov5645, OV5645_AEC_PK_MANUAL, val);
657 if (!ret)
658 ov5645->aec_pk_manual = val;
659
660 return ret;
661}
662
663static int ov5645_set_register_array(struct ov5645 *ov5645,
664 const struct reg_value *settings,
665 unsigned int num_settings)
666{
667 unsigned int i;
668 int ret;
669
670 for (i = 0; i < num_settings; ++i, ++settings) {
671 ret = ov5645_write_reg(ov5645, settings->reg, settings->val);
672 if (ret < 0)
673 return ret;
674 }
675
676 return 0;
677}
678
679static int ov5645_set_power_on(struct ov5645 *ov5645)
680{
681 int ret;
682
683 ret = ov5645_regulators_enable(ov5645);
684 if (ret < 0) {
685 return ret;
686 }
687
688 ret = clk_prepare_enable(ov5645->xclk);
689 if (ret < 0) {
690 dev_err(ov5645->dev, "clk prepare enable failed\n");
691 ov5645_regulators_disable(ov5645);
692 return ret;
693 }
694
695 usleep_range(5000, 15000);
696 gpiod_set_value_cansleep(ov5645->enable_gpio, 1);
697
698 usleep_range(1000, 2000);
699 gpiod_set_value_cansleep(ov5645->rst_gpio, 0);
700
701 msleep(20);
702
703 return 0;
704}
705
706static void ov5645_set_power_off(struct ov5645 *ov5645)
707{
708 gpiod_set_value_cansleep(ov5645->rst_gpio, 1);
709 gpiod_set_value_cansleep(ov5645->enable_gpio, 0);
710 clk_disable_unprepare(ov5645->xclk);
711 ov5645_regulators_disable(ov5645);
712}
713
714static int ov5645_s_power(struct v4l2_subdev *sd, int on)
715{
716 struct ov5645 *ov5645 = to_ov5645(sd);
717 int ret = 0;
718
719 mutex_lock(&ov5645->power_lock);
720
721
722
723
724 if (ov5645->power_count == !on) {
725 if (on) {
726 ret = ov5645_set_power_on(ov5645);
727 if (ret < 0)
728 goto exit;
729
730 ret = ov5645_set_register_array(ov5645,
731 ov5645_global_init_setting,
732 ARRAY_SIZE(ov5645_global_init_setting));
733 if (ret < 0) {
734 dev_err(ov5645->dev,
735 "could not set init registers\n");
736 ov5645_set_power_off(ov5645);
737 goto exit;
738 }
739
740 ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0,
741 OV5645_SYSTEM_CTRL0_STOP);
742 if (ret < 0) {
743 ov5645_set_power_off(ov5645);
744 goto exit;
745 }
746 } else {
747 ov5645_set_power_off(ov5645);
748 }
749 }
750
751
752 ov5645->power_count += on ? 1 : -1;
753 WARN_ON(ov5645->power_count < 0);
754
755exit:
756 mutex_unlock(&ov5645->power_lock);
757
758 return ret;
759}
760
761static int ov5645_set_saturation(struct ov5645 *ov5645, s32 value)
762{
763 u32 reg_value = (value * 0x10) + 0x40;
764 int ret;
765
766 ret = ov5645_write_reg(ov5645, OV5645_SDE_SAT_U, reg_value);
767 if (ret < 0)
768 return ret;
769
770 return ov5645_write_reg(ov5645, OV5645_SDE_SAT_V, reg_value);
771}
772
773static int ov5645_set_hflip(struct ov5645 *ov5645, s32 value)
774{
775 u8 val = ov5645->timing_tc_reg21;
776 int ret;
777
778 if (value == 0)
779 val &= ~(OV5645_SENSOR_MIRROR);
780 else
781 val |= (OV5645_SENSOR_MIRROR);
782
783 ret = ov5645_write_reg(ov5645, OV5645_TIMING_TC_REG21, val);
784 if (!ret)
785 ov5645->timing_tc_reg21 = val;
786
787 return ret;
788}
789
790static int ov5645_set_vflip(struct ov5645 *ov5645, s32 value)
791{
792 u8 val = ov5645->timing_tc_reg20;
793 int ret;
794
795 if (value == 0)
796 val |= (OV5645_SENSOR_VFLIP | OV5645_ISP_VFLIP);
797 else
798 val &= ~(OV5645_SENSOR_VFLIP | OV5645_ISP_VFLIP);
799
800 ret = ov5645_write_reg(ov5645, OV5645_TIMING_TC_REG20, val);
801 if (!ret)
802 ov5645->timing_tc_reg20 = val;
803
804 return ret;
805}
806
807static int ov5645_set_test_pattern(struct ov5645 *ov5645, s32 value)
808{
809 u8 val = 0;
810
811 if (value) {
812 val = OV5645_SET_TEST_PATTERN(value - 1);
813 val |= OV5645_TEST_PATTERN_ENABLE;
814 }
815
816 return ov5645_write_reg(ov5645, OV5645_PRE_ISP_TEST_SETTING_1, val);
817}
818
819static const char * const ov5645_test_pattern_menu[] = {
820 "Disabled",
821 "Vertical Color Bars",
822 "Pseudo-Random Data",
823 "Color Square",
824 "Black Image",
825};
826
827static int ov5645_set_awb(struct ov5645 *ov5645, s32 enable_auto)
828{
829 u8 val = 0;
830
831 if (!enable_auto)
832 val = OV5645_AWB_MANUAL_ENABLE;
833
834 return ov5645_write_reg(ov5645, OV5645_AWB_MANUAL_CONTROL, val);
835}
836
837static int ov5645_s_ctrl(struct v4l2_ctrl *ctrl)
838{
839 struct ov5645 *ov5645 = container_of(ctrl->handler,
840 struct ov5645, ctrls);
841 int ret;
842
843 mutex_lock(&ov5645->power_lock);
844 if (!ov5645->power_count) {
845 mutex_unlock(&ov5645->power_lock);
846 return 0;
847 }
848
849 switch (ctrl->id) {
850 case V4L2_CID_SATURATION:
851 ret = ov5645_set_saturation(ov5645, ctrl->val);
852 break;
853 case V4L2_CID_AUTO_WHITE_BALANCE:
854 ret = ov5645_set_awb(ov5645, ctrl->val);
855 break;
856 case V4L2_CID_AUTOGAIN:
857 ret = ov5645_set_agc_mode(ov5645, ctrl->val);
858 break;
859 case V4L2_CID_EXPOSURE_AUTO:
860 ret = ov5645_set_aec_mode(ov5645, ctrl->val);
861 break;
862 case V4L2_CID_TEST_PATTERN:
863 ret = ov5645_set_test_pattern(ov5645, ctrl->val);
864 break;
865 case V4L2_CID_HFLIP:
866 ret = ov5645_set_hflip(ov5645, ctrl->val);
867 break;
868 case V4L2_CID_VFLIP:
869 ret = ov5645_set_vflip(ov5645, ctrl->val);
870 break;
871 default:
872 ret = -EINVAL;
873 break;
874 }
875
876 mutex_unlock(&ov5645->power_lock);
877
878 return ret;
879}
880
881static const struct v4l2_ctrl_ops ov5645_ctrl_ops = {
882 .s_ctrl = ov5645_s_ctrl,
883};
884
885static int ov5645_enum_mbus_code(struct v4l2_subdev *sd,
886 struct v4l2_subdev_pad_config *cfg,
887 struct v4l2_subdev_mbus_code_enum *code)
888{
889 if (code->index > 0)
890 return -EINVAL;
891
892 code->code = MEDIA_BUS_FMT_UYVY8_2X8;
893
894 return 0;
895}
896
897static int ov5645_enum_frame_size(struct v4l2_subdev *subdev,
898 struct v4l2_subdev_pad_config *cfg,
899 struct v4l2_subdev_frame_size_enum *fse)
900{
901 if (fse->code != MEDIA_BUS_FMT_UYVY8_2X8)
902 return -EINVAL;
903
904 if (fse->index >= ARRAY_SIZE(ov5645_mode_info_data))
905 return -EINVAL;
906
907 fse->min_width = ov5645_mode_info_data[fse->index].width;
908 fse->max_width = ov5645_mode_info_data[fse->index].width;
909 fse->min_height = ov5645_mode_info_data[fse->index].height;
910 fse->max_height = ov5645_mode_info_data[fse->index].height;
911
912 return 0;
913}
914
915static struct v4l2_mbus_framefmt *
916__ov5645_get_pad_format(struct ov5645 *ov5645,
917 struct v4l2_subdev_pad_config *cfg,
918 unsigned int pad,
919 enum v4l2_subdev_format_whence which)
920{
921 switch (which) {
922 case V4L2_SUBDEV_FORMAT_TRY:
923 return v4l2_subdev_get_try_format(&ov5645->sd, cfg, pad);
924 case V4L2_SUBDEV_FORMAT_ACTIVE:
925 return &ov5645->fmt;
926 default:
927 return NULL;
928 }
929}
930
931static int ov5645_get_format(struct v4l2_subdev *sd,
932 struct v4l2_subdev_pad_config *cfg,
933 struct v4l2_subdev_format *format)
934{
935 struct ov5645 *ov5645 = to_ov5645(sd);
936
937 format->format = *__ov5645_get_pad_format(ov5645, cfg, format->pad,
938 format->which);
939 return 0;
940}
941
942static struct v4l2_rect *
943__ov5645_get_pad_crop(struct ov5645 *ov5645, struct v4l2_subdev_pad_config *cfg,
944 unsigned int pad, enum v4l2_subdev_format_whence which)
945{
946 switch (which) {
947 case V4L2_SUBDEV_FORMAT_TRY:
948 return v4l2_subdev_get_try_crop(&ov5645->sd, cfg, pad);
949 case V4L2_SUBDEV_FORMAT_ACTIVE:
950 return &ov5645->crop;
951 default:
952 return NULL;
953 }
954}
955
956static int ov5645_set_format(struct v4l2_subdev *sd,
957 struct v4l2_subdev_pad_config *cfg,
958 struct v4l2_subdev_format *format)
959{
960 struct ov5645 *ov5645 = to_ov5645(sd);
961 struct v4l2_mbus_framefmt *__format;
962 struct v4l2_rect *__crop;
963 const struct ov5645_mode_info *new_mode;
964 int ret;
965
966 __crop = __ov5645_get_pad_crop(ov5645, cfg, format->pad,
967 format->which);
968
969 new_mode = v4l2_find_nearest_size(ov5645_mode_info_data,
970 ARRAY_SIZE(ov5645_mode_info_data),
971 width, height,
972 format->format.width, format->format.height);
973
974 __crop->width = new_mode->width;
975 __crop->height = new_mode->height;
976
977 if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
978 ret = v4l2_ctrl_s_ctrl_int64(ov5645->pixel_clock,
979 new_mode->pixel_clock);
980 if (ret < 0)
981 return ret;
982
983 ret = v4l2_ctrl_s_ctrl(ov5645->link_freq,
984 new_mode->link_freq);
985 if (ret < 0)
986 return ret;
987
988 ov5645->current_mode = new_mode;
989 }
990
991 __format = __ov5645_get_pad_format(ov5645, cfg, format->pad,
992 format->which);
993 __format->width = __crop->width;
994 __format->height = __crop->height;
995 __format->code = MEDIA_BUS_FMT_UYVY8_2X8;
996 __format->field = V4L2_FIELD_NONE;
997 __format->colorspace = V4L2_COLORSPACE_SRGB;
998
999 format->format = *__format;
1000
1001 return 0;
1002}
1003
1004static int ov5645_entity_init_cfg(struct v4l2_subdev *subdev,
1005 struct v4l2_subdev_pad_config *cfg)
1006{
1007 struct v4l2_subdev_format fmt = { 0 };
1008
1009 fmt.which = cfg ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
1010 fmt.format.width = 1920;
1011 fmt.format.height = 1080;
1012
1013 ov5645_set_format(subdev, cfg, &fmt);
1014
1015 return 0;
1016}
1017
1018static int ov5645_get_selection(struct v4l2_subdev *sd,
1019 struct v4l2_subdev_pad_config *cfg,
1020 struct v4l2_subdev_selection *sel)
1021{
1022 struct ov5645 *ov5645 = to_ov5645(sd);
1023
1024 if (sel->target != V4L2_SEL_TGT_CROP)
1025 return -EINVAL;
1026
1027 sel->r = *__ov5645_get_pad_crop(ov5645, cfg, sel->pad,
1028 sel->which);
1029 return 0;
1030}
1031
1032static int ov5645_s_stream(struct v4l2_subdev *subdev, int enable)
1033{
1034 struct ov5645 *ov5645 = to_ov5645(subdev);
1035 int ret;
1036
1037 if (enable) {
1038 ret = ov5645_set_register_array(ov5645,
1039 ov5645->current_mode->data,
1040 ov5645->current_mode->data_size);
1041 if (ret < 0) {
1042 dev_err(ov5645->dev, "could not set mode %dx%d\n",
1043 ov5645->current_mode->width,
1044 ov5645->current_mode->height);
1045 return ret;
1046 }
1047 ret = v4l2_ctrl_handler_setup(&ov5645->ctrls);
1048 if (ret < 0) {
1049 dev_err(ov5645->dev, "could not sync v4l2 controls\n");
1050 return ret;
1051 }
1052 ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0,
1053 OV5645_SYSTEM_CTRL0_START);
1054 if (ret < 0)
1055 return ret;
1056 } else {
1057 ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0,
1058 OV5645_SYSTEM_CTRL0_STOP);
1059 if (ret < 0)
1060 return ret;
1061 }
1062
1063 return 0;
1064}
1065
1066static const struct v4l2_subdev_core_ops ov5645_core_ops = {
1067 .s_power = ov5645_s_power,
1068};
1069
1070static const struct v4l2_subdev_video_ops ov5645_video_ops = {
1071 .s_stream = ov5645_s_stream,
1072};
1073
1074static const struct v4l2_subdev_pad_ops ov5645_subdev_pad_ops = {
1075 .init_cfg = ov5645_entity_init_cfg,
1076 .enum_mbus_code = ov5645_enum_mbus_code,
1077 .enum_frame_size = ov5645_enum_frame_size,
1078 .get_fmt = ov5645_get_format,
1079 .set_fmt = ov5645_set_format,
1080 .get_selection = ov5645_get_selection,
1081};
1082
1083static const struct v4l2_subdev_ops ov5645_subdev_ops = {
1084 .core = &ov5645_core_ops,
1085 .video = &ov5645_video_ops,
1086 .pad = &ov5645_subdev_pad_ops,
1087};
1088
1089static int ov5645_probe(struct i2c_client *client,
1090 const struct i2c_device_id *id)
1091{
1092 struct device *dev = &client->dev;
1093 struct device_node *endpoint;
1094 struct ov5645 *ov5645;
1095 u8 chip_id_high, chip_id_low;
1096 u32 xclk_freq;
1097 int ret;
1098
1099 ov5645 = devm_kzalloc(dev, sizeof(struct ov5645), GFP_KERNEL);
1100 if (!ov5645)
1101 return -ENOMEM;
1102
1103 ov5645->i2c_client = client;
1104 ov5645->dev = dev;
1105
1106 endpoint = of_graph_get_next_endpoint(dev->of_node, NULL);
1107 if (!endpoint) {
1108 dev_err(dev, "endpoint node not found\n");
1109 return -EINVAL;
1110 }
1111
1112 ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(endpoint),
1113 &ov5645->ep);
1114
1115 of_node_put(endpoint);
1116
1117 if (ret < 0) {
1118 dev_err(dev, "parsing endpoint node failed\n");
1119 return ret;
1120 }
1121
1122 if (ov5645->ep.bus_type != V4L2_MBUS_CSI2_DPHY) {
1123 dev_err(dev, "invalid bus type, must be CSI2\n");
1124 return -EINVAL;
1125 }
1126
1127
1128 ov5645->xclk = devm_clk_get(dev, "xclk");
1129 if (IS_ERR(ov5645->xclk)) {
1130 dev_err(dev, "could not get xclk");
1131 return PTR_ERR(ov5645->xclk);
1132 }
1133
1134 ret = of_property_read_u32(dev->of_node, "clock-frequency", &xclk_freq);
1135 if (ret) {
1136 dev_err(dev, "could not get xclk frequency\n");
1137 return ret;
1138 }
1139
1140
1141 if (xclk_freq < 23760000 || xclk_freq > 24240000) {
1142 dev_err(dev, "external clock frequency %u is not supported\n",
1143 xclk_freq);
1144 return -EINVAL;
1145 }
1146
1147 ret = clk_set_rate(ov5645->xclk, xclk_freq);
1148 if (ret) {
1149 dev_err(dev, "could not set xclk frequency\n");
1150 return ret;
1151 }
1152
1153 ov5645->io_regulator = devm_regulator_get(dev, "vdddo");
1154 if (IS_ERR(ov5645->io_regulator)) {
1155 dev_err(dev, "cannot get io regulator\n");
1156 return PTR_ERR(ov5645->io_regulator);
1157 }
1158
1159 ret = regulator_set_voltage(ov5645->io_regulator,
1160 OV5645_VOLTAGE_DIGITAL_IO,
1161 OV5645_VOLTAGE_DIGITAL_IO);
1162 if (ret < 0) {
1163 dev_err(dev, "cannot set io voltage\n");
1164 return ret;
1165 }
1166
1167 ov5645->core_regulator = devm_regulator_get(dev, "vddd");
1168 if (IS_ERR(ov5645->core_regulator)) {
1169 dev_err(dev, "cannot get core regulator\n");
1170 return PTR_ERR(ov5645->core_regulator);
1171 }
1172
1173 ret = regulator_set_voltage(ov5645->core_regulator,
1174 OV5645_VOLTAGE_DIGITAL_CORE,
1175 OV5645_VOLTAGE_DIGITAL_CORE);
1176 if (ret < 0) {
1177 dev_err(dev, "cannot set core voltage\n");
1178 return ret;
1179 }
1180
1181 ov5645->analog_regulator = devm_regulator_get(dev, "vdda");
1182 if (IS_ERR(ov5645->analog_regulator)) {
1183 dev_err(dev, "cannot get analog regulator\n");
1184 return PTR_ERR(ov5645->analog_regulator);
1185 }
1186
1187 ret = regulator_set_voltage(ov5645->analog_regulator,
1188 OV5645_VOLTAGE_ANALOG,
1189 OV5645_VOLTAGE_ANALOG);
1190 if (ret < 0) {
1191 dev_err(dev, "cannot set analog voltage\n");
1192 return ret;
1193 }
1194
1195 ov5645->enable_gpio = devm_gpiod_get(dev, "enable", GPIOD_OUT_HIGH);
1196 if (IS_ERR(ov5645->enable_gpio)) {
1197 dev_err(dev, "cannot get enable gpio\n");
1198 return PTR_ERR(ov5645->enable_gpio);
1199 }
1200
1201 ov5645->rst_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
1202 if (IS_ERR(ov5645->rst_gpio)) {
1203 dev_err(dev, "cannot get reset gpio\n");
1204 return PTR_ERR(ov5645->rst_gpio);
1205 }
1206
1207 mutex_init(&ov5645->power_lock);
1208
1209 v4l2_ctrl_handler_init(&ov5645->ctrls, 9);
1210 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1211 V4L2_CID_SATURATION, -4, 4, 1, 0);
1212 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1213 V4L2_CID_HFLIP, 0, 1, 1, 0);
1214 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1215 V4L2_CID_VFLIP, 0, 1, 1, 0);
1216 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1217 V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
1218 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1219 V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1);
1220 v4l2_ctrl_new_std_menu(&ov5645->ctrls, &ov5645_ctrl_ops,
1221 V4L2_CID_EXPOSURE_AUTO, V4L2_EXPOSURE_MANUAL,
1222 0, V4L2_EXPOSURE_AUTO);
1223 v4l2_ctrl_new_std_menu_items(&ov5645->ctrls, &ov5645_ctrl_ops,
1224 V4L2_CID_TEST_PATTERN,
1225 ARRAY_SIZE(ov5645_test_pattern_menu) - 1,
1226 0, 0, ov5645_test_pattern_menu);
1227 ov5645->pixel_clock = v4l2_ctrl_new_std(&ov5645->ctrls,
1228 &ov5645_ctrl_ops,
1229 V4L2_CID_PIXEL_RATE,
1230 1, INT_MAX, 1, 1);
1231 ov5645->link_freq = v4l2_ctrl_new_int_menu(&ov5645->ctrls,
1232 &ov5645_ctrl_ops,
1233 V4L2_CID_LINK_FREQ,
1234 ARRAY_SIZE(link_freq) - 1,
1235 0, link_freq);
1236 if (ov5645->link_freq)
1237 ov5645->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1238
1239 ov5645->sd.ctrl_handler = &ov5645->ctrls;
1240
1241 if (ov5645->ctrls.error) {
1242 dev_err(dev, "%s: control initialization error %d\n",
1243 __func__, ov5645->ctrls.error);
1244 ret = ov5645->ctrls.error;
1245 goto free_ctrl;
1246 }
1247
1248 v4l2_i2c_subdev_init(&ov5645->sd, client, &ov5645_subdev_ops);
1249 ov5645->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1250 ov5645->pad.flags = MEDIA_PAD_FL_SOURCE;
1251 ov5645->sd.dev = &client->dev;
1252 ov5645->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1253
1254 ret = media_entity_pads_init(&ov5645->sd.entity, 1, &ov5645->pad);
1255 if (ret < 0) {
1256 dev_err(dev, "could not register media entity\n");
1257 goto free_ctrl;
1258 }
1259
1260 ret = ov5645_s_power(&ov5645->sd, true);
1261 if (ret < 0) {
1262 dev_err(dev, "could not power up OV5645\n");
1263 goto free_entity;
1264 }
1265
1266 ret = ov5645_read_reg(ov5645, OV5645_CHIP_ID_HIGH, &chip_id_high);
1267 if (ret < 0 || chip_id_high != OV5645_CHIP_ID_HIGH_BYTE) {
1268 dev_err(dev, "could not read ID high\n");
1269 ret = -ENODEV;
1270 goto power_down;
1271 }
1272 ret = ov5645_read_reg(ov5645, OV5645_CHIP_ID_LOW, &chip_id_low);
1273 if (ret < 0 || chip_id_low != OV5645_CHIP_ID_LOW_BYTE) {
1274 dev_err(dev, "could not read ID low\n");
1275 ret = -ENODEV;
1276 goto power_down;
1277 }
1278
1279 dev_info(dev, "OV5645 detected at address 0x%02x\n", client->addr);
1280
1281 ret = ov5645_read_reg(ov5645, OV5645_AEC_PK_MANUAL,
1282 &ov5645->aec_pk_manual);
1283 if (ret < 0) {
1284 dev_err(dev, "could not read AEC/AGC mode\n");
1285 ret = -ENODEV;
1286 goto power_down;
1287 }
1288
1289 ret = ov5645_read_reg(ov5645, OV5645_TIMING_TC_REG20,
1290 &ov5645->timing_tc_reg20);
1291 if (ret < 0) {
1292 dev_err(dev, "could not read vflip value\n");
1293 ret = -ENODEV;
1294 goto power_down;
1295 }
1296
1297 ret = ov5645_read_reg(ov5645, OV5645_TIMING_TC_REG21,
1298 &ov5645->timing_tc_reg21);
1299 if (ret < 0) {
1300 dev_err(dev, "could not read hflip value\n");
1301 ret = -ENODEV;
1302 goto power_down;
1303 }
1304
1305 ov5645_s_power(&ov5645->sd, false);
1306
1307 ret = v4l2_async_register_subdev(&ov5645->sd);
1308 if (ret < 0) {
1309 dev_err(dev, "could not register v4l2 device\n");
1310 goto free_entity;
1311 }
1312
1313 ov5645_entity_init_cfg(&ov5645->sd, NULL);
1314
1315 return 0;
1316
1317power_down:
1318 ov5645_s_power(&ov5645->sd, false);
1319free_entity:
1320 media_entity_cleanup(&ov5645->sd.entity);
1321free_ctrl:
1322 v4l2_ctrl_handler_free(&ov5645->ctrls);
1323 mutex_destroy(&ov5645->power_lock);
1324
1325 return ret;
1326}
1327
1328static int ov5645_remove(struct i2c_client *client)
1329{
1330 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1331 struct ov5645 *ov5645 = to_ov5645(sd);
1332
1333 v4l2_async_unregister_subdev(&ov5645->sd);
1334 media_entity_cleanup(&ov5645->sd.entity);
1335 v4l2_ctrl_handler_free(&ov5645->ctrls);
1336 mutex_destroy(&ov5645->power_lock);
1337
1338 return 0;
1339}
1340
1341static const struct i2c_device_id ov5645_id[] = {
1342 { "ov5645", 0 },
1343 {}
1344};
1345MODULE_DEVICE_TABLE(i2c, ov5645_id);
1346
1347static const struct of_device_id ov5645_of_match[] = {
1348 { .compatible = "ovti,ov5645" },
1349 { }
1350};
1351MODULE_DEVICE_TABLE(of, ov5645_of_match);
1352
1353static struct i2c_driver ov5645_i2c_driver = {
1354 .driver = {
1355 .of_match_table = of_match_ptr(ov5645_of_match),
1356 .name = "ov5645",
1357 },
1358 .probe = ov5645_probe,
1359 .remove = ov5645_remove,
1360 .id_table = ov5645_id,
1361};
1362
1363module_i2c_driver(ov5645_i2c_driver);
1364
1365MODULE_DESCRIPTION("Omnivision OV5645 Camera Driver");
1366MODULE_AUTHOR("Todor Tomov <todor.tomov@linaro.org>");
1367MODULE_LICENSE("GPL v2");
1368
