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7#include <dt-bindings/media/tvp5150.h>
8#include <linux/i2c.h>
9#include <linux/slab.h>
10#include <linux/videodev2.h>
11#include <linux/delay.h>
12#include <linux/gpio/consumer.h>
13#include <linux/interrupt.h>
14#include <linux/module.h>
15#include <linux/of_graph.h>
16#include <linux/regmap.h>
17#include <media/v4l2-async.h>
18#include <media/v4l2-device.h>
19#include <media/v4l2-ctrls.h>
20#include <media/v4l2-fwnode.h>
21#include <media/v4l2-mc.h>
22
23#include "tvp5150_reg.h"
24
25#define TVP5150_H_MAX 720U
26#define TVP5150_V_MAX_525_60 480U
27#define TVP5150_V_MAX_OTHERS 576U
28#define TVP5150_MAX_CROP_LEFT 511
29#define TVP5150_MAX_CROP_TOP 127
30#define TVP5150_CROP_SHIFT 2
31#define TVP5150_MBUS_FMT MEDIA_BUS_FMT_UYVY8_2X8
32#define TVP5150_FIELD V4L2_FIELD_ALTERNATE
33#define TVP5150_COLORSPACE V4L2_COLORSPACE_SMPTE170M
34
35MODULE_DESCRIPTION("Texas Instruments TVP5150A/TVP5150AM1/TVP5151 video decoder driver");
36MODULE_AUTHOR("Mauro Carvalho Chehab");
37MODULE_LICENSE("GPL v2");
38
39
40static int debug;
41module_param(debug, int, 0644);
42MODULE_PARM_DESC(debug, "Debug level (0-2)");
43
44#define dprintk0(__dev, __arg...) dev_dbg_lvl(__dev, 0, 0, __arg)
45
46enum tvp5150_pads {
47 TVP5150_PAD_IF_INPUT,
48 TVP5150_PAD_VID_OUT,
49 TVP5150_NUM_PADS
50};
51
52struct tvp5150 {
53 struct v4l2_subdev sd;
54#ifdef CONFIG_MEDIA_CONTROLLER
55 struct media_pad pads[TVP5150_NUM_PADS];
56 struct media_entity input_ent[TVP5150_INPUT_NUM];
57 struct media_pad input_pad[TVP5150_INPUT_NUM];
58#endif
59 struct v4l2_ctrl_handler hdl;
60 struct v4l2_rect rect;
61 struct regmap *regmap;
62 int irq;
63
64 v4l2_std_id norm;
65 v4l2_std_id detected_norm;
66 u32 input;
67 u32 output;
68 u32 oe;
69 int enable;
70 bool lock;
71
72 u16 dev_id;
73 u16 rom_ver;
74
75 enum v4l2_mbus_type mbus_type;
76};
77
78static inline struct tvp5150 *to_tvp5150(struct v4l2_subdev *sd)
79{
80 return container_of(sd, struct tvp5150, sd);
81}
82
83static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
84{
85 return &container_of(ctrl->handler, struct tvp5150, hdl)->sd;
86}
87
88static int tvp5150_read(struct v4l2_subdev *sd, unsigned char addr)
89{
90 struct tvp5150 *decoder = to_tvp5150(sd);
91 int ret, val;
92
93 ret = regmap_read(decoder->regmap, addr, &val);
94 if (ret < 0)
95 return ret;
96
97 return val;
98}
99
100static void dump_reg_range(struct v4l2_subdev *sd, char *s, u8 init,
101 const u8 end, int max_line)
102{
103 u8 buf[16];
104 int i = 0, j, len;
105
106 if (max_line > 16) {
107 dprintk0(sd->dev, "too much data to dump\n");
108 return;
109 }
110
111 for (i = init; i < end; i += max_line) {
112 len = (end - i > max_line) ? max_line : end - i;
113
114 for (j = 0; j < len; j++)
115 buf[j] = tvp5150_read(sd, i + j);
116
117 dprintk0(sd->dev, "%s reg %02x = %*ph\n", s, i, len, buf);
118 }
119}
120
121static int tvp5150_log_status(struct v4l2_subdev *sd)
122{
123 dprintk0(sd->dev, "tvp5150: Video input source selection #1 = 0x%02x\n",
124 tvp5150_read(sd, TVP5150_VD_IN_SRC_SEL_1));
125 dprintk0(sd->dev, "tvp5150: Analog channel controls = 0x%02x\n",
126 tvp5150_read(sd, TVP5150_ANAL_CHL_CTL));
127 dprintk0(sd->dev, "tvp5150: Operation mode controls = 0x%02x\n",
128 tvp5150_read(sd, TVP5150_OP_MODE_CTL));
129 dprintk0(sd->dev, "tvp5150: Miscellaneous controls = 0x%02x\n",
130 tvp5150_read(sd, TVP5150_MISC_CTL));
131 dprintk0(sd->dev, "tvp5150: Autoswitch mask= 0x%02x\n",
132 tvp5150_read(sd, TVP5150_AUTOSW_MSK));
133 dprintk0(sd->dev, "tvp5150: Color killer threshold control = 0x%02x\n",
134 tvp5150_read(sd, TVP5150_COLOR_KIL_THSH_CTL));
135 dprintk0(sd->dev, "tvp5150: Luminance processing controls #1 #2 and #3 = %02x %02x %02x\n",
136 tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_1),
137 tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_2),
138 tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_3));
139 dprintk0(sd->dev, "tvp5150: Brightness control = 0x%02x\n",
140 tvp5150_read(sd, TVP5150_BRIGHT_CTL));
141 dprintk0(sd->dev, "tvp5150: Color saturation control = 0x%02x\n",
142 tvp5150_read(sd, TVP5150_SATURATION_CTL));
143 dprintk0(sd->dev, "tvp5150: Hue control = 0x%02x\n",
144 tvp5150_read(sd, TVP5150_HUE_CTL));
145 dprintk0(sd->dev, "tvp5150: Contrast control = 0x%02x\n",
146 tvp5150_read(sd, TVP5150_CONTRAST_CTL));
147 dprintk0(sd->dev, "tvp5150: Outputs and data rates select = 0x%02x\n",
148 tvp5150_read(sd, TVP5150_DATA_RATE_SEL));
149 dprintk0(sd->dev, "tvp5150: Configuration shared pins = 0x%02x\n",
150 tvp5150_read(sd, TVP5150_CONF_SHARED_PIN));
151 dprintk0(sd->dev, "tvp5150: Active video cropping start = 0x%02x%02x\n",
152 tvp5150_read(sd, TVP5150_ACT_VD_CROP_ST_MSB),
153 tvp5150_read(sd, TVP5150_ACT_VD_CROP_ST_LSB));
154 dprintk0(sd->dev, "tvp5150: Active video cropping stop = 0x%02x%02x\n",
155 tvp5150_read(sd, TVP5150_ACT_VD_CROP_STP_MSB),
156 tvp5150_read(sd, TVP5150_ACT_VD_CROP_STP_LSB));
157 dprintk0(sd->dev, "tvp5150: Genlock/RTC = 0x%02x\n",
158 tvp5150_read(sd, TVP5150_GENLOCK));
159 dprintk0(sd->dev, "tvp5150: Horizontal sync start = 0x%02x\n",
160 tvp5150_read(sd, TVP5150_HORIZ_SYNC_START));
161 dprintk0(sd->dev, "tvp5150: Vertical blanking start = 0x%02x\n",
162 tvp5150_read(sd, TVP5150_VERT_BLANKING_START));
163 dprintk0(sd->dev, "tvp5150: Vertical blanking stop = 0x%02x\n",
164 tvp5150_read(sd, TVP5150_VERT_BLANKING_STOP));
165 dprintk0(sd->dev, "tvp5150: Chrominance processing control #1 and #2 = %02x %02x\n",
166 tvp5150_read(sd, TVP5150_CHROMA_PROC_CTL_1),
167 tvp5150_read(sd, TVP5150_CHROMA_PROC_CTL_2));
168 dprintk0(sd->dev, "tvp5150: Interrupt reset register B = 0x%02x\n",
169 tvp5150_read(sd, TVP5150_INT_RESET_REG_B));
170 dprintk0(sd->dev, "tvp5150: Interrupt enable register B = 0x%02x\n",
171 tvp5150_read(sd, TVP5150_INT_ENABLE_REG_B));
172 dprintk0(sd->dev, "tvp5150: Interrupt configuration register B = 0x%02x\n",
173 tvp5150_read(sd, TVP5150_INTT_CONFIG_REG_B));
174 dprintk0(sd->dev, "tvp5150: Video standard = 0x%02x\n",
175 tvp5150_read(sd, TVP5150_VIDEO_STD));
176 dprintk0(sd->dev, "tvp5150: Chroma gain factor: Cb=0x%02x Cr=0x%02x\n",
177 tvp5150_read(sd, TVP5150_CB_GAIN_FACT),
178 tvp5150_read(sd, TVP5150_CR_GAIN_FACTOR));
179 dprintk0(sd->dev, "tvp5150: Macrovision on counter = 0x%02x\n",
180 tvp5150_read(sd, TVP5150_MACROVISION_ON_CTR));
181 dprintk0(sd->dev, "tvp5150: Macrovision off counter = 0x%02x\n",
182 tvp5150_read(sd, TVP5150_MACROVISION_OFF_CTR));
183 dprintk0(sd->dev, "tvp5150: ITU-R BT.656.%d timing(TVP5150AM1 only)\n",
184 (tvp5150_read(sd, TVP5150_REV_SELECT) & 1) ? 3 : 4);
185 dprintk0(sd->dev, "tvp5150: Device ID = %02x%02x\n",
186 tvp5150_read(sd, TVP5150_MSB_DEV_ID),
187 tvp5150_read(sd, TVP5150_LSB_DEV_ID));
188 dprintk0(sd->dev, "tvp5150: ROM version = (hex) %02x.%02x\n",
189 tvp5150_read(sd, TVP5150_ROM_MAJOR_VER),
190 tvp5150_read(sd, TVP5150_ROM_MINOR_VER));
191 dprintk0(sd->dev, "tvp5150: Vertical line count = 0x%02x%02x\n",
192 tvp5150_read(sd, TVP5150_VERT_LN_COUNT_MSB),
193 tvp5150_read(sd, TVP5150_VERT_LN_COUNT_LSB));
194 dprintk0(sd->dev, "tvp5150: Interrupt status register B = 0x%02x\n",
195 tvp5150_read(sd, TVP5150_INT_STATUS_REG_B));
196 dprintk0(sd->dev, "tvp5150: Interrupt active register B = 0x%02x\n",
197 tvp5150_read(sd, TVP5150_INT_ACTIVE_REG_B));
198 dprintk0(sd->dev, "tvp5150: Status regs #1 to #5 = %02x %02x %02x %02x %02x\n",
199 tvp5150_read(sd, TVP5150_STATUS_REG_1),
200 tvp5150_read(sd, TVP5150_STATUS_REG_2),
201 tvp5150_read(sd, TVP5150_STATUS_REG_3),
202 tvp5150_read(sd, TVP5150_STATUS_REG_4),
203 tvp5150_read(sd, TVP5150_STATUS_REG_5));
204
205 dump_reg_range(sd, "Teletext filter 1", TVP5150_TELETEXT_FIL1_INI,
206 TVP5150_TELETEXT_FIL1_END, 8);
207 dump_reg_range(sd, "Teletext filter 2", TVP5150_TELETEXT_FIL2_INI,
208 TVP5150_TELETEXT_FIL2_END, 8);
209
210 dprintk0(sd->dev, "tvp5150: Teletext filter enable = 0x%02x\n",
211 tvp5150_read(sd, TVP5150_TELETEXT_FIL_ENA));
212 dprintk0(sd->dev, "tvp5150: Interrupt status register A = 0x%02x\n",
213 tvp5150_read(sd, TVP5150_INT_STATUS_REG_A));
214 dprintk0(sd->dev, "tvp5150: Interrupt enable register A = 0x%02x\n",
215 tvp5150_read(sd, TVP5150_INT_ENABLE_REG_A));
216 dprintk0(sd->dev, "tvp5150: Interrupt configuration = 0x%02x\n",
217 tvp5150_read(sd, TVP5150_INT_CONF));
218 dprintk0(sd->dev, "tvp5150: VDP status register = 0x%02x\n",
219 tvp5150_read(sd, TVP5150_VDP_STATUS_REG));
220 dprintk0(sd->dev, "tvp5150: FIFO word count = 0x%02x\n",
221 tvp5150_read(sd, TVP5150_FIFO_WORD_COUNT));
222 dprintk0(sd->dev, "tvp5150: FIFO interrupt threshold = 0x%02x\n",
223 tvp5150_read(sd, TVP5150_FIFO_INT_THRESHOLD));
224 dprintk0(sd->dev, "tvp5150: FIFO reset = 0x%02x\n",
225 tvp5150_read(sd, TVP5150_FIFO_RESET));
226 dprintk0(sd->dev, "tvp5150: Line number interrupt = 0x%02x\n",
227 tvp5150_read(sd, TVP5150_LINE_NUMBER_INT));
228 dprintk0(sd->dev, "tvp5150: Pixel alignment register = 0x%02x%02x\n",
229 tvp5150_read(sd, TVP5150_PIX_ALIGN_REG_HIGH),
230 tvp5150_read(sd, TVP5150_PIX_ALIGN_REG_LOW));
231 dprintk0(sd->dev, "tvp5150: FIFO output control = 0x%02x\n",
232 tvp5150_read(sd, TVP5150_FIFO_OUT_CTRL));
233 dprintk0(sd->dev, "tvp5150: Full field enable = 0x%02x\n",
234 tvp5150_read(sd, TVP5150_FULL_FIELD_ENA));
235 dprintk0(sd->dev, "tvp5150: Full field mode register = 0x%02x\n",
236 tvp5150_read(sd, TVP5150_FULL_FIELD_MODE_REG));
237
238 dump_reg_range(sd, "CC data", TVP5150_CC_DATA_INI,
239 TVP5150_CC_DATA_END, 8);
240
241 dump_reg_range(sd, "WSS data", TVP5150_WSS_DATA_INI,
242 TVP5150_WSS_DATA_END, 8);
243
244 dump_reg_range(sd, "VPS data", TVP5150_VPS_DATA_INI,
245 TVP5150_VPS_DATA_END, 8);
246
247 dump_reg_range(sd, "VITC data", TVP5150_VITC_DATA_INI,
248 TVP5150_VITC_DATA_END, 10);
249
250 dump_reg_range(sd, "Line mode", TVP5150_LINE_MODE_INI,
251 TVP5150_LINE_MODE_END, 8);
252 return 0;
253}
254
255
256
257
258
259static void tvp5150_selmux(struct v4l2_subdev *sd)
260{
261 int opmode = 0;
262 struct tvp5150 *decoder = to_tvp5150(sd);
263 unsigned int mask, val;
264 int input = 0;
265
266
267 if ((decoder->dev_id == 0x5150 && decoder->rom_ver == 0x0400) ||
268 (decoder->dev_id == 0x5151 && decoder->rom_ver == 0x0100)) {
269 if (!decoder->enable)
270 input = 8;
271 }
272
273 switch (decoder->input) {
274 case TVP5150_COMPOSITE1:
275 input |= 2;
276
277 case TVP5150_COMPOSITE0:
278 break;
279 case TVP5150_SVIDEO:
280 default:
281 input |= 1;
282 break;
283 }
284
285 dev_dbg_lvl(sd->dev, 1, debug, "Selecting video route: route input=%i, output=%i => tvp5150 input=%i, opmode=%i\n",
286 decoder->input, decoder->output,
287 input, opmode);
288
289 regmap_write(decoder->regmap, TVP5150_OP_MODE_CTL, opmode);
290 regmap_write(decoder->regmap, TVP5150_VD_IN_SRC_SEL_1, input);
291
292
293
294
295
296
297
298
299 mask = TVP5150_MISC_CTL_GPCL | TVP5150_MISC_CTL_HVLK;
300 if (decoder->input == TVP5150_SVIDEO)
301 val = TVP5150_MISC_CTL_HVLK;
302 else
303 val = TVP5150_MISC_CTL_GPCL;
304 regmap_update_bits(decoder->regmap, TVP5150_MISC_CTL, mask, val);
305};
306
307struct i2c_reg_value {
308 unsigned char reg;
309 unsigned char value;
310};
311
312
313static const struct i2c_reg_value tvp5150_init_default[] = {
314 {
315 TVP5150_VD_IN_SRC_SEL_1, 0x00
316 },
317 {
318 TVP5150_ANAL_CHL_CTL, 0x15
319 },
320 {
321 TVP5150_OP_MODE_CTL, 0x00
322 },
323 {
324 TVP5150_MISC_CTL, 0x01
325 },
326 {
327 TVP5150_COLOR_KIL_THSH_CTL, 0x10
328 },
329 {
330 TVP5150_LUMA_PROC_CTL_1, 0x60
331 },
332 {
333 TVP5150_LUMA_PROC_CTL_2, 0x00
334 },
335 {
336 TVP5150_BRIGHT_CTL, 0x80
337 },
338 {
339 TVP5150_SATURATION_CTL, 0x80
340 },
341 {
342 TVP5150_HUE_CTL, 0x00
343 },
344 {
345 TVP5150_CONTRAST_CTL, 0x80
346 },
347 {
348 TVP5150_DATA_RATE_SEL, 0x47
349 },
350 {
351 TVP5150_LUMA_PROC_CTL_3, 0x00
352 },
353 {
354 TVP5150_CONF_SHARED_PIN, 0x08
355 },
356 {
357 TVP5150_ACT_VD_CROP_ST_MSB, 0x00
358 },
359 {
360 TVP5150_ACT_VD_CROP_ST_LSB, 0x00
361 },
362 {
363 TVP5150_ACT_VD_CROP_STP_MSB, 0x00
364 },
365 {
366 TVP5150_ACT_VD_CROP_STP_LSB, 0x00
367 },
368 {
369 TVP5150_GENLOCK, 0x01
370 },
371 {
372 TVP5150_HORIZ_SYNC_START, 0x80
373 },
374 {
375 TVP5150_VERT_BLANKING_START, 0x00
376 },
377 {
378 TVP5150_VERT_BLANKING_STOP, 0x00
379 },
380 {
381 TVP5150_CHROMA_PROC_CTL_1, 0x0c
382 },
383 {
384 TVP5150_CHROMA_PROC_CTL_2, 0x14
385 },
386 {
387 TVP5150_INT_RESET_REG_B, 0x00
388 },
389 {
390 TVP5150_INT_ENABLE_REG_B, 0x00
391 },
392 {
393 TVP5150_INTT_CONFIG_REG_B, 0x00
394 },
395 {
396 TVP5150_VIDEO_STD, 0x00
397 },
398 {
399 TVP5150_MACROVISION_ON_CTR, 0x0f
400 },
401 {
402 TVP5150_MACROVISION_OFF_CTR, 0x01
403 },
404 {
405 TVP5150_TELETEXT_FIL_ENA, 0x00
406 },
407 {
408 TVP5150_INT_STATUS_REG_A, 0x00
409 },
410 {
411 TVP5150_INT_ENABLE_REG_A, 0x00
412 },
413 {
414 TVP5150_INT_CONF, 0x04
415 },
416 {
417 TVP5150_FIFO_INT_THRESHOLD, 0x80
418 },
419 {
420 TVP5150_FIFO_RESET, 0x00
421 },
422 {
423 TVP5150_LINE_NUMBER_INT, 0x00
424 },
425 {
426 TVP5150_PIX_ALIGN_REG_LOW, 0x4e
427 },
428 {
429 TVP5150_PIX_ALIGN_REG_HIGH, 0x00
430 },
431 {
432 TVP5150_FIFO_OUT_CTRL, 0x01
433 },
434 {
435 TVP5150_FULL_FIELD_ENA, 0x00
436 },
437 {
438 TVP5150_LINE_MODE_INI, 0x00
439 },
440 {
441 TVP5150_FULL_FIELD_MODE_REG, 0x7f
442 },
443 {
444 0xff, 0xff
445 }
446};
447
448
449static const struct i2c_reg_value tvp5150_init_enable[] = {
450 {
451 TVP5150_ANAL_CHL_CTL, 0x15
452 }, {
453 TVP5150_MISC_CTL, TVP5150_MISC_CTL_GPCL |
454 TVP5150_MISC_CTL_INTREQ_OE |
455 TVP5150_MISC_CTL_YCBCR_OE |
456 TVP5150_MISC_CTL_SYNC_OE |
457 TVP5150_MISC_CTL_VBLANK |
458 TVP5150_MISC_CTL_CLOCK_OE,
459 }, {
460 TVP5150_AUTOSW_MSK, 0x0
461 }, {
462 TVP5150_DATA_RATE_SEL, 0x47
463 }, {
464 TVP5150_CHROMA_PROC_CTL_1, 0x0c
465 }, {
466 TVP5150_CHROMA_PROC_CTL_2, 0x54
467 }, {
468 0x27, 0x20
469 }, {
470 0xff, 0xff
471 }
472};
473
474struct tvp5150_vbi_type {
475 unsigned int vbi_type;
476 unsigned int ini_line;
477 unsigned int end_line;
478 unsigned int by_field :1;
479};
480
481struct i2c_vbi_ram_value {
482 u16 reg;
483 struct tvp5150_vbi_type type;
484 unsigned char values[16];
485};
486
487
488
489
490
491
492
493
494static struct i2c_vbi_ram_value vbi_ram_default[] = {
495
496
497
498
499
500#if 0
501 [0] = {0x010,
502 {V4L2_SLICED_TELETEXT_SECAM, 6, 23, 1},
503 { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x26,
504 0xe6, 0xb4, 0x0e, 0x00, 0x00, 0x00, 0x10, 0x00 }
505 },
506#endif
507 [1] = {0x030,
508 {V4L2_SLICED_TELETEXT_B, 6, 22, 1},
509 { 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x2b,
510 0xa6, 0x72, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00 }
511 },
512#if 0
513 [2] = {0x050,
514 {V4L2_SLICED_TELETEXT_PAL_C, 6, 22, 1},
515 { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22,
516 0xa6, 0x98, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 }
517 },
518 [3] = {0x070,
519 {V4L2_SLICED_TELETEXT_NTSC_B, 10, 21, 1},
520 { 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x23,
521 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 }
522 },
523 [4] = {0x090,
524 {V4L2_SLICED_TELETEXT_NTSC_C, 10, 21, 1},
525 { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22,
526 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x15, 0x00 }
527 },
528 [5] = {0x0b0,
529 {V4L2_SLICED_TELETEXT_NTSC_D, 10, 21, 1},
530 { 0xaa, 0xaa, 0xff, 0xff, 0xa7, 0x2e, 0x20, 0x23,
531 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 }
532 },
533 [6] = {0x0d0,
534 {V4L2_SLICED_CAPTION_625, 22, 22, 1},
535 { 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02,
536 0xa6, 0x7b, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 }
537 },
538#endif
539 [7] = {0x0f0,
540 {V4L2_SLICED_CAPTION_525, 21, 21, 1},
541 { 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02,
542 0x69, 0x8c, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 }
543 },
544 [8] = {0x110,
545 {V4L2_SLICED_WSS_625, 23, 23, 1},
546 { 0x5b, 0x55, 0xc5, 0xff, 0x00, 0x71, 0x6e, 0x42,
547 0xa6, 0xcd, 0x0f, 0x00, 0x00, 0x00, 0x3a, 0x00 }
548 },
549#if 0
550 [9] = {0x130,
551 {V4L2_SLICED_WSS_525, 20, 20, 1},
552 { 0x38, 0x00, 0x3f, 0x00, 0x00, 0x71, 0x6e, 0x43,
553 0x69, 0x7c, 0x08, 0x00, 0x00, 0x00, 0x39, 0x00 }
554 },
555 [10] = {0x150,
556 {V4l2_SLICED_VITC_625, 6, 22, 0},
557 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49,
558 0xa6, 0x85, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 }
559 },
560 [11] = {0x170,
561 {V4l2_SLICED_VITC_525, 10, 20, 0},
562 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49,
563 0x69, 0x94, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 }
564 },
565#endif
566 [12] = {0x190,
567 {V4L2_SLICED_VPS, 16, 16, 0},
568 { 0xaa, 0xaa, 0xff, 0xff, 0xba, 0xce, 0x2b, 0x0d,
569 0xa6, 0xda, 0x0b, 0x00, 0x00, 0x00, 0x60, 0x00 }
570 },
571
572};
573
574static int tvp5150_write_inittab(struct v4l2_subdev *sd,
575 const struct i2c_reg_value *regs)
576{
577 struct tvp5150 *decoder = to_tvp5150(sd);
578
579 while (regs->reg != 0xff) {
580 regmap_write(decoder->regmap, regs->reg, regs->value);
581 regs++;
582 }
583 return 0;
584}
585
586static int tvp5150_vdp_init(struct v4l2_subdev *sd)
587{
588 struct tvp5150 *decoder = to_tvp5150(sd);
589 struct regmap *map = decoder->regmap;
590 unsigned int i;
591 int j;
592
593
594 regmap_write(map, TVP5150_FULL_FIELD_ENA, 0);
595
596
597 for (i = TVP5150_LINE_MODE_INI; i <= TVP5150_LINE_MODE_END; i++)
598 regmap_write(map, i, 0xff);
599
600
601 for (j = 0; j < ARRAY_SIZE(vbi_ram_default); j++) {
602 const struct i2c_vbi_ram_value *regs = &vbi_ram_default[j];
603
604 if (!regs->type.vbi_type)
605 continue;
606
607 regmap_write(map, TVP5150_CONF_RAM_ADDR_HIGH, regs->reg >> 8);
608 regmap_write(map, TVP5150_CONF_RAM_ADDR_LOW, regs->reg);
609
610 for (i = 0; i < 16; i++)
611 regmap_write(map, TVP5150_VDP_CONF_RAM_DATA,
612 regs->values[i]);
613 }
614 return 0;
615}
616
617
618static int tvp5150_g_sliced_vbi_cap(struct v4l2_subdev *sd,
619 struct v4l2_sliced_vbi_cap *cap)
620{
621 int line, i;
622
623 dev_dbg_lvl(sd->dev, 1, debug, "g_sliced_vbi_cap\n");
624 memset(cap, 0, sizeof(*cap));
625
626 for (i = 0; i < ARRAY_SIZE(vbi_ram_default); i++) {
627 const struct i2c_vbi_ram_value *regs = &vbi_ram_default[i];
628
629 if (!regs->type.vbi_type)
630 continue;
631
632 for (line = regs->type.ini_line;
633 line <= regs->type.end_line;
634 line++) {
635 cap->service_lines[0][line] |= regs->type.vbi_type;
636 }
637 cap->service_set |= regs->type.vbi_type;
638 }
639 return 0;
640}
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655static int tvp5150_set_vbi(struct v4l2_subdev *sd,
656 unsigned int type, u8 flags, int line,
657 const int fields)
658{
659 struct tvp5150 *decoder = to_tvp5150(sd);
660 v4l2_std_id std = decoder->norm;
661 u8 reg;
662 int i, pos = 0;
663
664 if (std == V4L2_STD_ALL) {
665 dev_err(sd->dev, "VBI can't be configured without knowing number of lines\n");
666 return 0;
667 } else if (std & V4L2_STD_625_50) {
668
669 line += 3;
670 }
671
672 if (line < 6 || line > 27)
673 return 0;
674
675 for (i = 0; i < ARRAY_SIZE(vbi_ram_default); i++) {
676 const struct i2c_vbi_ram_value *regs = &vbi_ram_default[i];
677
678 if (!regs->type.vbi_type)
679 continue;
680
681 if ((type & regs->type.vbi_type) &&
682 (line >= regs->type.ini_line) &&
683 (line <= regs->type.end_line))
684 break;
685 pos++;
686 }
687
688 type = pos | (flags & 0xf0);
689 reg = ((line - 6) << 1) + TVP5150_LINE_MODE_INI;
690
691 if (fields & 1)
692 regmap_write(decoder->regmap, reg, type);
693
694 if (fields & 2)
695 regmap_write(decoder->regmap, reg + 1, type);
696
697 return type;
698}
699
700static int tvp5150_get_vbi(struct v4l2_subdev *sd, int line)
701{
702 struct tvp5150 *decoder = to_tvp5150(sd);
703 v4l2_std_id std = decoder->norm;
704 u8 reg;
705 int pos, type = 0;
706 int i, ret = 0;
707
708 if (std == V4L2_STD_ALL) {
709 dev_err(sd->dev, "VBI can't be configured without knowing number of lines\n");
710 return 0;
711 } else if (std & V4L2_STD_625_50) {
712
713 line += 3;
714 }
715
716 if (line < 6 || line > 27)
717 return 0;
718
719 reg = ((line - 6) << 1) + TVP5150_LINE_MODE_INI;
720
721 for (i = 0; i <= 1; i++) {
722 ret = tvp5150_read(sd, reg + i);
723 if (ret < 0) {
724 dev_err(sd->dev, "%s: failed with error = %d\n",
725 __func__, ret);
726 return 0;
727 }
728 pos = ret & 0x0f;
729 if (pos < ARRAY_SIZE(vbi_ram_default))
730 type |= vbi_ram_default[pos].type.vbi_type;
731 }
732
733 return type;
734}
735
736static int tvp5150_set_std(struct v4l2_subdev *sd, v4l2_std_id std)
737{
738 struct tvp5150 *decoder = to_tvp5150(sd);
739 int fmt = 0;
740
741
742
743 if (std == V4L2_STD_NTSC_443) {
744 fmt = VIDEO_STD_NTSC_4_43_BIT;
745 } else if (std == V4L2_STD_PAL_M) {
746 fmt = VIDEO_STD_PAL_M_BIT;
747 } else if (std == V4L2_STD_PAL_N || std == V4L2_STD_PAL_Nc) {
748 fmt = VIDEO_STD_PAL_COMBINATION_N_BIT;
749 } else {
750
751 if (std & V4L2_STD_NTSC)
752 fmt = VIDEO_STD_NTSC_MJ_BIT;
753 else if (std & V4L2_STD_PAL)
754 fmt = VIDEO_STD_PAL_BDGHIN_BIT;
755 else if (std & V4L2_STD_SECAM)
756 fmt = VIDEO_STD_SECAM_BIT;
757 }
758
759 dev_dbg_lvl(sd->dev, 1, debug, "Set video std register to %d.\n", fmt);
760 regmap_write(decoder->regmap, TVP5150_VIDEO_STD, fmt);
761 return 0;
762}
763
764static int tvp5150_g_std(struct v4l2_subdev *sd, v4l2_std_id *std)
765{
766 struct tvp5150 *decoder = to_tvp5150(sd);
767
768 *std = decoder->norm;
769
770 return 0;
771}
772
773static int tvp5150_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
774{
775 struct tvp5150 *decoder = to_tvp5150(sd);
776
777 if (decoder->norm == std)
778 return 0;
779
780
781 if (std & V4L2_STD_525_60)
782 decoder->rect.height = TVP5150_V_MAX_525_60;
783 else
784 decoder->rect.height = TVP5150_V_MAX_OTHERS;
785
786 decoder->norm = std;
787
788 return tvp5150_set_std(sd, std);
789}
790
791static v4l2_std_id tvp5150_read_std(struct v4l2_subdev *sd)
792{
793 int val = tvp5150_read(sd, TVP5150_STATUS_REG_5);
794
795 switch (val & 0x0F) {
796 case 0x01:
797 return V4L2_STD_NTSC;
798 case 0x03:
799 return V4L2_STD_PAL;
800 case 0x05:
801 return V4L2_STD_PAL_M;
802 case 0x07:
803 return V4L2_STD_PAL_N | V4L2_STD_PAL_Nc;
804 case 0x09:
805 return V4L2_STD_NTSC_443;
806 case 0xb:
807 return V4L2_STD_SECAM;
808 default:
809 return V4L2_STD_UNKNOWN;
810 }
811}
812
813static int query_lock(struct v4l2_subdev *sd)
814{
815 struct tvp5150 *decoder = to_tvp5150(sd);
816 int status;
817
818 if (decoder->irq)
819 return decoder->lock;
820
821 regmap_read(decoder->regmap, TVP5150_STATUS_REG_1, &status);
822
823
824 return (status & 0x0e) == 0x0e;
825}
826
827static int tvp5150_querystd(struct v4l2_subdev *sd, v4l2_std_id *std_id)
828{
829 *std_id = query_lock(sd) ? tvp5150_read_std(sd) : V4L2_STD_UNKNOWN;
830
831 return 0;
832}
833
834static const struct v4l2_event tvp5150_ev_fmt = {
835 .type = V4L2_EVENT_SOURCE_CHANGE,
836 .u.src_change.changes = V4L2_EVENT_SRC_CH_RESOLUTION,
837};
838
839static irqreturn_t tvp5150_isr(int irq, void *dev_id)
840{
841 struct tvp5150 *decoder = dev_id;
842 struct regmap *map = decoder->regmap;
843 unsigned int mask, active = 0, status = 0;
844
845 mask = TVP5150_MISC_CTL_YCBCR_OE | TVP5150_MISC_CTL_SYNC_OE |
846 TVP5150_MISC_CTL_CLOCK_OE;
847
848 regmap_read(map, TVP5150_INT_STATUS_REG_A, &status);
849 if (status) {
850 regmap_write(map, TVP5150_INT_STATUS_REG_A, status);
851
852 if (status & TVP5150_INT_A_LOCK) {
853 decoder->lock = !!(status & TVP5150_INT_A_LOCK_STATUS);
854 dev_dbg_lvl(decoder->sd.dev, 1, debug,
855 "sync lo%s signal\n",
856 decoder->lock ? "ck" : "ss");
857 v4l2_subdev_notify_event(&decoder->sd, &tvp5150_ev_fmt);
858 regmap_update_bits(map, TVP5150_MISC_CTL, mask,
859 decoder->lock ? decoder->oe : 0);
860 }
861
862 return IRQ_HANDLED;
863 }
864
865 regmap_read(map, TVP5150_INT_ACTIVE_REG_B, &active);
866 if (active) {
867 status = 0;
868 regmap_read(map, TVP5150_INT_STATUS_REG_B, &status);
869 if (status)
870 regmap_write(map, TVP5150_INT_RESET_REG_B, status);
871 }
872
873 return IRQ_HANDLED;
874}
875
876static int tvp5150_reset(struct v4l2_subdev *sd, u32 val)
877{
878 struct tvp5150 *decoder = to_tvp5150(sd);
879 struct regmap *map = decoder->regmap;
880
881
882 tvp5150_write_inittab(sd, tvp5150_init_default);
883
884 if (decoder->irq) {
885
886 regmap_write(map, TVP5150_CONF_SHARED_PIN, 0x0);
887
888 regmap_write(map, TVP5150_INT_CONF, TVP5150_VDPOE | 0x1);
889 regmap_write(map, TVP5150_INTT_CONFIG_REG_B, 0x1);
890 } else {
891
892 regmap_write(map, TVP5150_CONF_SHARED_PIN, 0x2);
893
894 regmap_write(map, TVP5150_INT_CONF, TVP5150_VDPOE);
895 regmap_write(map, TVP5150_INTT_CONFIG_REG_B, 0x0);
896 }
897
898
899 tvp5150_vdp_init(sd);
900
901
902 tvp5150_selmux(sd);
903
904
905 v4l2_ctrl_handler_setup(&decoder->hdl);
906
907 return 0;
908}
909
910static int tvp5150_enable(struct v4l2_subdev *sd)
911{
912 struct tvp5150 *decoder = to_tvp5150(sd);
913 v4l2_std_id std;
914
915
916 tvp5150_write_inittab(sd, tvp5150_init_enable);
917
918 if (decoder->norm == V4L2_STD_ALL)
919 std = tvp5150_read_std(sd);
920 else
921 std = decoder->norm;
922
923
924 tvp5150_set_std(sd, std);
925
926
927
928
929
930 switch (decoder->mbus_type) {
931 case V4L2_MBUS_PARALLEL:
932
933 regmap_update_bits(decoder->regmap, TVP5150_DATA_RATE_SEL,
934 0x7, 0x0);
935 decoder->oe = TVP5150_MISC_CTL_YCBCR_OE |
936 TVP5150_MISC_CTL_CLOCK_OE |
937 TVP5150_MISC_CTL_SYNC_OE;
938 break;
939 case V4L2_MBUS_BT656:
940 decoder->oe = TVP5150_MISC_CTL_YCBCR_OE |
941 TVP5150_MISC_CTL_CLOCK_OE;
942 break;
943 default:
944 return -EINVAL;
945 }
946
947 return 0;
948};
949
950static int tvp5150_s_ctrl(struct v4l2_ctrl *ctrl)
951{
952 struct v4l2_subdev *sd = to_sd(ctrl);
953 struct tvp5150 *decoder = to_tvp5150(sd);
954
955 switch (ctrl->id) {
956 case V4L2_CID_BRIGHTNESS:
957 regmap_write(decoder->regmap, TVP5150_BRIGHT_CTL, ctrl->val);
958 return 0;
959 case V4L2_CID_CONTRAST:
960 regmap_write(decoder->regmap, TVP5150_CONTRAST_CTL, ctrl->val);
961 return 0;
962 case V4L2_CID_SATURATION:
963 regmap_write(decoder->regmap, TVP5150_SATURATION_CTL,
964 ctrl->val);
965 return 0;
966 case V4L2_CID_HUE:
967 regmap_write(decoder->regmap, TVP5150_HUE_CTL, ctrl->val);
968 return 0;
969 case V4L2_CID_TEST_PATTERN:
970 decoder->enable = ctrl->val ? false : true;
971 tvp5150_selmux(sd);
972 return 0;
973 }
974 return -EINVAL;
975}
976
977static void tvp5150_set_default(v4l2_std_id std, struct v4l2_rect *crop)
978{
979
980 crop->top = 0;
981 crop->left = 0;
982 crop->width = TVP5150_H_MAX;
983 if (std & V4L2_STD_525_60)
984 crop->height = TVP5150_V_MAX_525_60;
985 else
986 crop->height = TVP5150_V_MAX_OTHERS;
987}
988
989static int tvp5150_fill_fmt(struct v4l2_subdev *sd,
990 struct v4l2_subdev_pad_config *cfg,
991 struct v4l2_subdev_format *format)
992{
993 struct v4l2_mbus_framefmt *f;
994 struct tvp5150 *decoder = to_tvp5150(sd);
995
996 if (!format || (format->pad != TVP5150_PAD_VID_OUT))
997 return -EINVAL;
998
999 f = &format->format;
1000
1001 f->width = decoder->rect.width;
1002 f->height = decoder->rect.height / 2;
1003
1004 f->code = TVP5150_MBUS_FMT;
1005 f->field = TVP5150_FIELD;
1006 f->colorspace = TVP5150_COLORSPACE;
1007
1008 dev_dbg_lvl(sd->dev, 1, debug, "width = %d, height = %d\n", f->width,
1009 f->height);
1010 return 0;
1011}
1012
1013static int tvp5150_set_selection(struct v4l2_subdev *sd,
1014 struct v4l2_subdev_pad_config *cfg,
1015 struct v4l2_subdev_selection *sel)
1016{
1017 struct tvp5150 *decoder = to_tvp5150(sd);
1018 struct v4l2_rect rect = sel->r;
1019 v4l2_std_id std;
1020 int hmax;
1021
1022 if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE ||
1023 sel->target != V4L2_SEL_TGT_CROP)
1024 return -EINVAL;
1025
1026 dev_dbg_lvl(sd->dev, 1, debug, "%s left=%d, top=%d, width=%d, height=%d\n",
1027 __func__, rect.left, rect.top, rect.width, rect.height);
1028
1029
1030 rect.left = clamp(rect.left, 0, TVP5150_MAX_CROP_LEFT);
1031 rect.top = clamp(rect.top, 0, TVP5150_MAX_CROP_TOP);
1032
1033
1034 if (decoder->norm == V4L2_STD_ALL)
1035 std = tvp5150_read_std(sd);
1036 else
1037 std = decoder->norm;
1038
1039 if (std & V4L2_STD_525_60)
1040 hmax = TVP5150_V_MAX_525_60;
1041 else
1042 hmax = TVP5150_V_MAX_OTHERS;
1043
1044
1045
1046
1047
1048
1049 v4l_bound_align_image(&rect.width,
1050 TVP5150_H_MAX - TVP5150_MAX_CROP_LEFT - rect.left,
1051 TVP5150_H_MAX - rect.left, 1, &rect.height,
1052 hmax - TVP5150_MAX_CROP_TOP - rect.top,
1053 hmax - rect.top, 0, 0);
1054
1055 regmap_write(decoder->regmap, TVP5150_VERT_BLANKING_START, rect.top);
1056 regmap_write(decoder->regmap, TVP5150_VERT_BLANKING_STOP,
1057 rect.top + rect.height - hmax);
1058 regmap_write(decoder->regmap, TVP5150_ACT_VD_CROP_ST_MSB,
1059 rect.left >> TVP5150_CROP_SHIFT);
1060 regmap_write(decoder->regmap, TVP5150_ACT_VD_CROP_ST_LSB,
1061 rect.left | (1 << TVP5150_CROP_SHIFT));
1062 regmap_write(decoder->regmap, TVP5150_ACT_VD_CROP_STP_MSB,
1063 (rect.left + rect.width - TVP5150_MAX_CROP_LEFT) >>
1064 TVP5150_CROP_SHIFT);
1065 regmap_write(decoder->regmap, TVP5150_ACT_VD_CROP_STP_LSB,
1066 rect.left + rect.width - TVP5150_MAX_CROP_LEFT);
1067
1068 decoder->rect = rect;
1069
1070 return 0;
1071}
1072
1073static int tvp5150_get_selection(struct v4l2_subdev *sd,
1074 struct v4l2_subdev_pad_config *cfg,
1075 struct v4l2_subdev_selection *sel)
1076{
1077 struct tvp5150 *decoder = container_of(sd, struct tvp5150, sd);
1078 v4l2_std_id std;
1079
1080 if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE)
1081 return -EINVAL;
1082
1083 switch (sel->target) {
1084 case V4L2_SEL_TGT_CROP_BOUNDS:
1085 sel->r.left = 0;
1086 sel->r.top = 0;
1087 sel->r.width = TVP5150_H_MAX;
1088
1089
1090 if (decoder->norm == V4L2_STD_ALL)
1091 std = tvp5150_read_std(sd);
1092 else
1093 std = decoder->norm;
1094 if (std & V4L2_STD_525_60)
1095 sel->r.height = TVP5150_V_MAX_525_60;
1096 else
1097 sel->r.height = TVP5150_V_MAX_OTHERS;
1098 return 0;
1099 case V4L2_SEL_TGT_CROP:
1100 sel->r = decoder->rect;
1101 return 0;
1102 default:
1103 return -EINVAL;
1104 }
1105}
1106
1107static int tvp5150_g_mbus_config(struct v4l2_subdev *sd,
1108 struct v4l2_mbus_config *cfg)
1109{
1110 struct tvp5150 *decoder = to_tvp5150(sd);
1111
1112 cfg->type = decoder->mbus_type;
1113 cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING
1114 | V4L2_MBUS_FIELD_EVEN_LOW | V4L2_MBUS_DATA_ACTIVE_HIGH;
1115
1116 return 0;
1117}
1118
1119
1120
1121
1122static int tvp5150_init_cfg(struct v4l2_subdev *sd,
1123 struct v4l2_subdev_pad_config *cfg)
1124{
1125 struct tvp5150 *decoder = to_tvp5150(sd);
1126 v4l2_std_id std;
1127
1128
1129
1130
1131
1132 if (decoder->norm == V4L2_STD_ALL) {
1133 std = tvp5150_read_std(sd);
1134 if (std != decoder->detected_norm) {
1135 decoder->detected_norm = std;
1136 tvp5150_set_default(std, &decoder->rect);
1137 }
1138 }
1139
1140 return 0;
1141}
1142
1143static int tvp5150_enum_mbus_code(struct v4l2_subdev *sd,
1144 struct v4l2_subdev_pad_config *cfg,
1145 struct v4l2_subdev_mbus_code_enum *code)
1146{
1147 if (code->pad || code->index)
1148 return -EINVAL;
1149
1150 code->code = TVP5150_MBUS_FMT;
1151 return 0;
1152}
1153
1154static int tvp5150_enum_frame_size(struct v4l2_subdev *sd,
1155 struct v4l2_subdev_pad_config *cfg,
1156 struct v4l2_subdev_frame_size_enum *fse)
1157{
1158 struct tvp5150 *decoder = to_tvp5150(sd);
1159
1160 if (fse->index >= 8 || fse->code != TVP5150_MBUS_FMT)
1161 return -EINVAL;
1162
1163 fse->code = TVP5150_MBUS_FMT;
1164 fse->min_width = decoder->rect.width;
1165 fse->max_width = decoder->rect.width;
1166 fse->min_height = decoder->rect.height / 2;
1167 fse->max_height = decoder->rect.height / 2;
1168
1169 return 0;
1170}
1171
1172
1173
1174
1175
1176#ifdef CONFIG_MEDIA_CONTROLLER
1177static int tvp5150_link_setup(struct media_entity *entity,
1178 const struct media_pad *local,
1179 const struct media_pad *remote, u32 flags)
1180{
1181 struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
1182 struct tvp5150 *decoder = to_tvp5150(sd);
1183 int i;
1184
1185 for (i = 0; i < TVP5150_INPUT_NUM; i++) {
1186 if (remote->entity == &decoder->input_ent[i])
1187 break;
1188 }
1189
1190
1191 if (i == TVP5150_INPUT_NUM)
1192 return 0;
1193
1194 decoder->input = i;
1195
1196 tvp5150_selmux(sd);
1197
1198 return 0;
1199}
1200
1201static const struct media_entity_operations tvp5150_sd_media_ops = {
1202 .link_setup = tvp5150_link_setup,
1203};
1204#endif
1205
1206
1207
1208
1209
1210static int tvp5150_s_stream(struct v4l2_subdev *sd, int enable)
1211{
1212 struct tvp5150 *decoder = to_tvp5150(sd);
1213 unsigned int mask, val = 0, int_val = 0;
1214
1215 mask = TVP5150_MISC_CTL_YCBCR_OE | TVP5150_MISC_CTL_SYNC_OE |
1216 TVP5150_MISC_CTL_CLOCK_OE;
1217
1218 if (enable) {
1219 tvp5150_enable(sd);
1220
1221
1222 if (decoder->irq)
1223 val = decoder->lock ? decoder->oe : 0;
1224 else
1225 val = decoder->oe;
1226 int_val = TVP5150_INT_A_LOCK;
1227 v4l2_subdev_notify_event(&decoder->sd, &tvp5150_ev_fmt);
1228 }
1229
1230 regmap_update_bits(decoder->regmap, TVP5150_MISC_CTL, mask, val);
1231 if (decoder->irq)
1232
1233 regmap_update_bits(decoder->regmap, TVP5150_INT_ENABLE_REG_A,
1234 TVP5150_INT_A_LOCK, int_val);
1235
1236 return 0;
1237}
1238
1239static int tvp5150_s_routing(struct v4l2_subdev *sd,
1240 u32 input, u32 output, u32 config)
1241{
1242 struct tvp5150 *decoder = to_tvp5150(sd);
1243
1244 decoder->input = input;
1245 decoder->output = output;
1246
1247 if (output == TVP5150_BLACK_SCREEN)
1248 decoder->enable = false;
1249 else
1250 decoder->enable = true;
1251
1252 tvp5150_selmux(sd);
1253 return 0;
1254}
1255
1256static int tvp5150_s_raw_fmt(struct v4l2_subdev *sd, struct v4l2_vbi_format *fmt)
1257{
1258 struct tvp5150 *decoder = to_tvp5150(sd);
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268 if (fmt->sample_format == V4L2_PIX_FMT_GREY)
1269 regmap_write(decoder->regmap, TVP5150_LUMA_PROC_CTL_1, 0x70);
1270 if (fmt->count[0] == 18 && fmt->count[1] == 18) {
1271 regmap_write(decoder->regmap, TVP5150_VERT_BLANKING_START,
1272 0x00);
1273 regmap_write(decoder->regmap, TVP5150_VERT_BLANKING_STOP, 0x01);
1274 }
1275 return 0;
1276}
1277
1278static int tvp5150_s_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *svbi)
1279{
1280 struct tvp5150 *decoder = to_tvp5150(sd);
1281 int i;
1282
1283 if (svbi->service_set != 0) {
1284 for (i = 0; i <= 23; i++) {
1285 svbi->service_lines[1][i] = 0;
1286 svbi->service_lines[0][i] =
1287 tvp5150_set_vbi(sd, svbi->service_lines[0][i],
1288 0xf0, i, 3);
1289 }
1290
1291 regmap_write(decoder->regmap, TVP5150_FIFO_OUT_CTRL, 1);
1292 } else {
1293
1294 regmap_write(decoder->regmap, TVP5150_FIFO_OUT_CTRL, 0);
1295
1296
1297 regmap_write(decoder->regmap, TVP5150_FULL_FIELD_ENA, 0);
1298
1299
1300 for (i = TVP5150_LINE_MODE_INI; i <= TVP5150_LINE_MODE_END; i++)
1301 regmap_write(decoder->regmap, i, 0xff);
1302 }
1303 return 0;
1304}
1305
1306static int tvp5150_g_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *svbi)
1307{
1308 int i, mask = 0;
1309
1310 memset(svbi->service_lines, 0, sizeof(svbi->service_lines));
1311
1312 for (i = 0; i <= 23; i++) {
1313 svbi->service_lines[0][i] =
1314 tvp5150_get_vbi(sd, i);
1315 mask |= svbi->service_lines[0][i];
1316 }
1317 svbi->service_set = mask;
1318 return 0;
1319}
1320
1321#ifdef CONFIG_VIDEO_ADV_DEBUG
1322static int tvp5150_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
1323{
1324 int res;
1325
1326 res = tvp5150_read(sd, reg->reg & 0xff);
1327 if (res < 0) {
1328 dev_err(sd->dev, "%s: failed with error = %d\n", __func__, res);
1329 return res;
1330 }
1331
1332 reg->val = res;
1333 reg->size = 1;
1334 return 0;
1335}
1336
1337static int tvp5150_s_register(struct v4l2_subdev *sd, const struct v4l2_dbg_register *reg)
1338{
1339 struct tvp5150 *decoder = to_tvp5150(sd);
1340
1341 return regmap_write(decoder->regmap, reg->reg & 0xff, reg->val & 0xff);
1342}
1343#endif
1344
1345static int tvp5150_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1346{
1347 int status = tvp5150_read(sd, 0x88);
1348
1349 vt->signal = ((status & 0x04) && (status & 0x02)) ? 0xffff : 0x0;
1350 return 0;
1351}
1352
1353static int tvp5150_registered(struct v4l2_subdev *sd)
1354{
1355#ifdef CONFIG_MEDIA_CONTROLLER
1356 struct tvp5150 *decoder = to_tvp5150(sd);
1357 int ret = 0;
1358 int i;
1359
1360 for (i = 0; i < TVP5150_INPUT_NUM; i++) {
1361 struct media_entity *input = &decoder->input_ent[i];
1362 struct media_pad *pad = &decoder->input_pad[i];
1363
1364 if (!input->name)
1365 continue;
1366
1367 decoder->input_pad[i].flags = MEDIA_PAD_FL_SOURCE;
1368
1369 ret = media_entity_pads_init(input, 1, pad);
1370 if (ret < 0)
1371 return ret;
1372
1373 ret = media_device_register_entity(sd->v4l2_dev->mdev, input);
1374 if (ret < 0)
1375 return ret;
1376
1377 ret = media_create_pad_link(input, 0, &sd->entity,
1378 TVP5150_PAD_IF_INPUT, 0);
1379 if (ret < 0) {
1380 media_device_unregister_entity(input);
1381 return ret;
1382 }
1383 }
1384#endif
1385
1386 return 0;
1387}
1388
1389
1390
1391static const struct v4l2_ctrl_ops tvp5150_ctrl_ops = {
1392 .s_ctrl = tvp5150_s_ctrl,
1393};
1394
1395static const struct v4l2_subdev_core_ops tvp5150_core_ops = {
1396 .log_status = tvp5150_log_status,
1397 .reset = tvp5150_reset,
1398#ifdef CONFIG_VIDEO_ADV_DEBUG
1399 .g_register = tvp5150_g_register,
1400 .s_register = tvp5150_s_register,
1401#endif
1402};
1403
1404static const struct v4l2_subdev_tuner_ops tvp5150_tuner_ops = {
1405 .g_tuner = tvp5150_g_tuner,
1406};
1407
1408static const struct v4l2_subdev_video_ops tvp5150_video_ops = {
1409 .s_std = tvp5150_s_std,
1410 .g_std = tvp5150_g_std,
1411 .querystd = tvp5150_querystd,
1412 .s_stream = tvp5150_s_stream,
1413 .s_routing = tvp5150_s_routing,
1414 .g_mbus_config = tvp5150_g_mbus_config,
1415};
1416
1417static const struct v4l2_subdev_vbi_ops tvp5150_vbi_ops = {
1418 .g_sliced_vbi_cap = tvp5150_g_sliced_vbi_cap,
1419 .g_sliced_fmt = tvp5150_g_sliced_fmt,
1420 .s_sliced_fmt = tvp5150_s_sliced_fmt,
1421 .s_raw_fmt = tvp5150_s_raw_fmt,
1422};
1423
1424static const struct v4l2_subdev_pad_ops tvp5150_pad_ops = {
1425 .init_cfg = tvp5150_init_cfg,
1426 .enum_mbus_code = tvp5150_enum_mbus_code,
1427 .enum_frame_size = tvp5150_enum_frame_size,
1428 .set_fmt = tvp5150_fill_fmt,
1429 .get_fmt = tvp5150_fill_fmt,
1430 .get_selection = tvp5150_get_selection,
1431 .set_selection = tvp5150_set_selection,
1432};
1433
1434static const struct v4l2_subdev_ops tvp5150_ops = {
1435 .core = &tvp5150_core_ops,
1436 .tuner = &tvp5150_tuner_ops,
1437 .video = &tvp5150_video_ops,
1438 .vbi = &tvp5150_vbi_ops,
1439 .pad = &tvp5150_pad_ops,
1440};
1441
1442static const struct v4l2_subdev_internal_ops tvp5150_internal_ops = {
1443 .registered = tvp5150_registered,
1444};
1445
1446
1447
1448
1449
1450static const struct regmap_range tvp5150_readable_ranges[] = {
1451 {
1452 .range_min = TVP5150_VD_IN_SRC_SEL_1,
1453 .range_max = TVP5150_AUTOSW_MSK,
1454 }, {
1455 .range_min = TVP5150_COLOR_KIL_THSH_CTL,
1456 .range_max = TVP5150_CONF_SHARED_PIN,
1457 }, {
1458 .range_min = TVP5150_ACT_VD_CROP_ST_MSB,
1459 .range_max = TVP5150_HORIZ_SYNC_START,
1460 }, {
1461 .range_min = TVP5150_VERT_BLANKING_START,
1462 .range_max = TVP5150_INTT_CONFIG_REG_B,
1463 }, {
1464 .range_min = TVP5150_VIDEO_STD,
1465 .range_max = TVP5150_VIDEO_STD,
1466 }, {
1467 .range_min = TVP5150_CB_GAIN_FACT,
1468 .range_max = TVP5150_REV_SELECT,
1469 }, {
1470 .range_min = TVP5150_MSB_DEV_ID,
1471 .range_max = TVP5150_STATUS_REG_5,
1472 }, {
1473 .range_min = TVP5150_CC_DATA_INI,
1474 .range_max = TVP5150_TELETEXT_FIL_ENA,
1475 }, {
1476 .range_min = TVP5150_INT_STATUS_REG_A,
1477 .range_max = TVP5150_FIFO_OUT_CTRL,
1478 }, {
1479 .range_min = TVP5150_FULL_FIELD_ENA,
1480 .range_max = TVP5150_FULL_FIELD_MODE_REG,
1481 },
1482};
1483
1484static bool tvp5150_volatile_reg(struct device *dev, unsigned int reg)
1485{
1486 switch (reg) {
1487 case TVP5150_VERT_LN_COUNT_MSB:
1488 case TVP5150_VERT_LN_COUNT_LSB:
1489 case TVP5150_INT_STATUS_REG_A:
1490 case TVP5150_INT_STATUS_REG_B:
1491 case TVP5150_INT_ACTIVE_REG_B:
1492 case TVP5150_STATUS_REG_1:
1493 case TVP5150_STATUS_REG_2:
1494 case TVP5150_STATUS_REG_3:
1495 case TVP5150_STATUS_REG_4:
1496 case TVP5150_STATUS_REG_5:
1497
1498 case TVP5150_VBI_FIFO_READ_DATA:
1499 case TVP5150_VDP_STATUS_REG:
1500 case TVP5150_FIFO_WORD_COUNT:
1501 return true;
1502 default:
1503 return false;
1504 }
1505}
1506
1507static const struct regmap_access_table tvp5150_readable_table = {
1508 .yes_ranges = tvp5150_readable_ranges,
1509 .n_yes_ranges = ARRAY_SIZE(tvp5150_readable_ranges),
1510};
1511
1512static struct regmap_config tvp5150_config = {
1513 .reg_bits = 8,
1514 .val_bits = 8,
1515 .max_register = 0xff,
1516
1517 .cache_type = REGCACHE_RBTREE,
1518
1519 .rd_table = &tvp5150_readable_table,
1520 .volatile_reg = tvp5150_volatile_reg,
1521};
1522
1523static int tvp5150_detect_version(struct tvp5150 *core)
1524{
1525 struct v4l2_subdev *sd = &core->sd;
1526 struct i2c_client *c = v4l2_get_subdevdata(sd);
1527 u8 regs[4];
1528 int res;
1529
1530
1531
1532
1533
1534 res = regmap_bulk_read(core->regmap, TVP5150_MSB_DEV_ID, regs, 4);
1535 if (res < 0) {
1536 dev_err(&c->dev, "reading ID registers failed: %d\n", res);
1537 return res;
1538 }
1539
1540 core->dev_id = (regs[0] << 8) | regs[1];
1541 core->rom_ver = (regs[2] << 8) | regs[3];
1542
1543 dev_info(sd->dev, "tvp%04x (%u.%u) chip found @ 0x%02x (%s)\n",
1544 core->dev_id, regs[2], regs[3], c->addr << 1,
1545 c->adapter->name);
1546
1547 if (core->dev_id == 0x5150 && core->rom_ver == 0x0321) {
1548 dev_info(sd->dev, "tvp5150a detected.\n");
1549 } else if (core->dev_id == 0x5150 && core->rom_ver == 0x0400) {
1550 dev_info(sd->dev, "tvp5150am1 detected.\n");
1551
1552
1553 regmap_write(core->regmap, TVP5150_REV_SELECT, 0);
1554 } else if (core->dev_id == 0x5151 && core->rom_ver == 0x0100) {
1555 dev_info(sd->dev, "tvp5151 detected.\n");
1556 } else {
1557 dev_info(sd->dev, "*** unknown tvp%04x chip detected.\n",
1558 core->dev_id);
1559 }
1560
1561 return 0;
1562}
1563
1564static int tvp5150_init(struct i2c_client *c)
1565{
1566 struct gpio_desc *pdn_gpio;
1567 struct gpio_desc *reset_gpio;
1568
1569 pdn_gpio = devm_gpiod_get_optional(&c->dev, "pdn", GPIOD_OUT_HIGH);
1570 if (IS_ERR(pdn_gpio))
1571 return PTR_ERR(pdn_gpio);
1572
1573 if (pdn_gpio) {
1574 gpiod_set_value_cansleep(pdn_gpio, 0);
1575
1576 msleep(20);
1577 }
1578
1579 reset_gpio = devm_gpiod_get_optional(&c->dev, "reset", GPIOD_OUT_HIGH);
1580 if (IS_ERR(reset_gpio))
1581 return PTR_ERR(reset_gpio);
1582
1583 if (reset_gpio) {
1584
1585 ndelay(500);
1586 gpiod_set_value_cansleep(reset_gpio, 0);
1587
1588 usleep_range(200, 250);
1589 }
1590
1591 return 0;
1592}
1593
1594static int tvp5150_parse_dt(struct tvp5150 *decoder, struct device_node *np)
1595{
1596 struct v4l2_fwnode_endpoint bus_cfg = { .bus_type = 0 };
1597 struct device_node *ep;
1598#ifdef CONFIG_MEDIA_CONTROLLER
1599 struct device_node *connectors, *child;
1600 struct media_entity *input;
1601 const char *name;
1602 u32 input_type;
1603#endif
1604 unsigned int flags;
1605 int ret = 0;
1606
1607 ep = of_graph_get_next_endpoint(np, NULL);
1608 if (!ep)
1609 return -EINVAL;
1610
1611 ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(ep), &bus_cfg);
1612 if (ret)
1613 goto err;
1614
1615 flags = bus_cfg.bus.parallel.flags;
1616
1617 if (bus_cfg.bus_type == V4L2_MBUS_PARALLEL &&
1618 !(flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH &&
1619 flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH &&
1620 flags & V4L2_MBUS_FIELD_EVEN_LOW)) {
1621 ret = -EINVAL;
1622 goto err;
1623 }
1624
1625 decoder->mbus_type = bus_cfg.bus_type;
1626
1627#ifdef CONFIG_MEDIA_CONTROLLER
1628 connectors = of_get_child_by_name(np, "connectors");
1629
1630 if (!connectors)
1631 goto err;
1632
1633 for_each_available_child_of_node(connectors, child) {
1634 ret = of_property_read_u32(child, "input", &input_type);
1635 if (ret) {
1636 dev_err(decoder->sd.dev,
1637 "missing type property in node %pOFn\n",
1638 child);
1639 goto err_connector;
1640 }
1641
1642 if (input_type >= TVP5150_INPUT_NUM) {
1643 ret = -EINVAL;
1644 goto err_connector;
1645 }
1646
1647 input = &decoder->input_ent[input_type];
1648
1649
1650 if (input->name) {
1651 dev_err(decoder->sd.dev,
1652 "input %s with same type already exists\n",
1653 input->name);
1654 ret = -EINVAL;
1655 goto err_connector;
1656 }
1657
1658 switch (input_type) {
1659 case TVP5150_COMPOSITE0:
1660 case TVP5150_COMPOSITE1:
1661 input->function = MEDIA_ENT_F_CONN_COMPOSITE;
1662 break;
1663 case TVP5150_SVIDEO:
1664 input->function = MEDIA_ENT_F_CONN_SVIDEO;
1665 break;
1666 }
1667
1668 input->flags = MEDIA_ENT_FL_CONNECTOR;
1669
1670 ret = of_property_read_string(child, "label", &name);
1671 if (ret < 0) {
1672 dev_err(decoder->sd.dev,
1673 "missing label property in node %pOFn\n",
1674 child);
1675 goto err_connector;
1676 }
1677
1678 input->name = name;
1679 }
1680
1681err_connector:
1682 of_node_put(connectors);
1683#endif
1684err:
1685 of_node_put(ep);
1686 return ret;
1687}
1688
1689static const char * const tvp5150_test_patterns[2] = {
1690 "Disabled",
1691 "Black screen"
1692};
1693
1694static int tvp5150_probe(struct i2c_client *c,
1695 const struct i2c_device_id *id)
1696{
1697 struct tvp5150 *core;
1698 struct v4l2_subdev *sd;
1699 struct device_node *np = c->dev.of_node;
1700 struct regmap *map;
1701 int res;
1702
1703
1704 if (!i2c_check_functionality(c->adapter,
1705 I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
1706 return -EIO;
1707
1708 res = tvp5150_init(c);
1709 if (res)
1710 return res;
1711
1712 core = devm_kzalloc(&c->dev, sizeof(*core), GFP_KERNEL);
1713 if (!core)
1714 return -ENOMEM;
1715
1716 map = devm_regmap_init_i2c(c, &tvp5150_config);
1717 if (IS_ERR(map))
1718 return PTR_ERR(map);
1719
1720 core->regmap = map;
1721 sd = &core->sd;
1722
1723 if (IS_ENABLED(CONFIG_OF) && np) {
1724 res = tvp5150_parse_dt(core, np);
1725 if (res) {
1726 dev_err(sd->dev, "DT parsing error: %d\n", res);
1727 return res;
1728 }
1729 } else {
1730
1731 core->mbus_type = V4L2_MBUS_BT656;
1732 }
1733
1734 v4l2_i2c_subdev_init(sd, c, &tvp5150_ops);
1735 sd->internal_ops = &tvp5150_internal_ops;
1736 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1737
1738#if defined(CONFIG_MEDIA_CONTROLLER)
1739 core->pads[TVP5150_PAD_IF_INPUT].flags = MEDIA_PAD_FL_SINK;
1740 core->pads[TVP5150_PAD_IF_INPUT].sig_type = PAD_SIGNAL_ANALOG;
1741 core->pads[TVP5150_PAD_VID_OUT].flags = MEDIA_PAD_FL_SOURCE;
1742 core->pads[TVP5150_PAD_VID_OUT].sig_type = PAD_SIGNAL_DV;
1743
1744 sd->entity.function = MEDIA_ENT_F_ATV_DECODER;
1745
1746 res = media_entity_pads_init(&sd->entity, TVP5150_NUM_PADS, core->pads);
1747 if (res < 0)
1748 return res;
1749
1750 sd->entity.ops = &tvp5150_sd_media_ops;
1751#endif
1752
1753 res = tvp5150_detect_version(core);
1754 if (res < 0)
1755 return res;
1756
1757 core->norm = V4L2_STD_ALL;
1758 core->detected_norm = V4L2_STD_UNKNOWN;
1759 core->input = TVP5150_COMPOSITE1;
1760 core->enable = true;
1761
1762 v4l2_ctrl_handler_init(&core->hdl, 5);
1763 v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops,
1764 V4L2_CID_BRIGHTNESS, 0, 255, 1, 128);
1765 v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops,
1766 V4L2_CID_CONTRAST, 0, 255, 1, 128);
1767 v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops,
1768 V4L2_CID_SATURATION, 0, 255, 1, 128);
1769 v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops,
1770 V4L2_CID_HUE, -128, 127, 1, 0);
1771 v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops,
1772 V4L2_CID_PIXEL_RATE, 27000000,
1773 27000000, 1, 27000000);
1774 v4l2_ctrl_new_std_menu_items(&core->hdl, &tvp5150_ctrl_ops,
1775 V4L2_CID_TEST_PATTERN,
1776 ARRAY_SIZE(tvp5150_test_patterns) - 1,
1777 0, 0, tvp5150_test_patterns);
1778 sd->ctrl_handler = &core->hdl;
1779 if (core->hdl.error) {
1780 res = core->hdl.error;
1781 goto err;
1782 }
1783
1784 tvp5150_set_default(tvp5150_read_std(sd), &core->rect);
1785
1786 core->irq = c->irq;
1787 tvp5150_reset(sd, 0);
1788 if (c->irq) {
1789 res = devm_request_threaded_irq(&c->dev, c->irq, NULL,
1790 tvp5150_isr, IRQF_TRIGGER_HIGH |
1791 IRQF_ONESHOT, "tvp5150", core);
1792 if (res)
1793 goto err;
1794 }
1795
1796 res = v4l2_async_register_subdev(sd);
1797 if (res < 0)
1798 goto err;
1799
1800 if (debug > 1)
1801 tvp5150_log_status(sd);
1802 return 0;
1803
1804err:
1805 v4l2_ctrl_handler_free(&core->hdl);
1806 return res;
1807}
1808
1809static int tvp5150_remove(struct i2c_client *c)
1810{
1811 struct v4l2_subdev *sd = i2c_get_clientdata(c);
1812 struct tvp5150 *decoder = to_tvp5150(sd);
1813
1814 dev_dbg_lvl(sd->dev, 1, debug,
1815 "tvp5150.c: removing tvp5150 adapter on address 0x%x\n",
1816 c->addr << 1);
1817
1818 v4l2_async_unregister_subdev(sd);
1819 v4l2_ctrl_handler_free(&decoder->hdl);
1820 return 0;
1821}
1822
1823
1824
1825static const struct i2c_device_id tvp5150_id[] = {
1826 { "tvp5150", 0 },
1827 { }
1828};
1829MODULE_DEVICE_TABLE(i2c, tvp5150_id);
1830
1831#if IS_ENABLED(CONFIG_OF)
1832static const struct of_device_id tvp5150_of_match[] = {
1833 { .compatible = "ti,tvp5150", },
1834 { },
1835};
1836MODULE_DEVICE_TABLE(of, tvp5150_of_match);
1837#endif
1838
1839static struct i2c_driver tvp5150_driver = {
1840 .driver = {
1841 .of_match_table = of_match_ptr(tvp5150_of_match),
1842 .name = "tvp5150",
1843 },
1844 .probe = tvp5150_probe,
1845 .remove = tvp5150_remove,
1846 .id_table = tvp5150_id,
1847};
1848
1849module_i2c_driver(tvp5150_driver);
1850
