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10#ifndef CX25821_H_
11#define CX25821_H_
12
13#include <linux/pci.h>
14#include <linux/i2c.h>
15#include <linux/interrupt.h>
16#include <linux/delay.h>
17#include <linux/sched.h>
18#include <linux/kdev_t.h>
19
20#include <media/v4l2-common.h>
21#include <media/v4l2-device.h>
22#include <media/v4l2-ctrls.h>
23#include <media/videobuf2-v4l2.h>
24#include <media/videobuf2-dma-sg.h>
25
26#include "cx25821-reg.h"
27#include "cx25821-medusa-reg.h"
28#include "cx25821-sram.h"
29#include "cx25821-audio.h"
30
31#include <linux/version.h>
32#include <linux/mutex.h>
33
34#define UNSET (-1U)
35#define NO_SYNC_LINE (-1U)
36
37#define CX25821_MAXBOARDS 2
38
39#define LINE_SIZE_D1 1440
40
41
42#define MAX_DECODERS 8
43#define MAX_ENCODERS 2
44#define QUAD_DECODERS 4
45#define MAX_CAMERAS 16
46
47
48#define MAX_CX25821_INPUT 8
49#define RESOURCE_VIDEO0 1
50#define RESOURCE_VIDEO1 2
51#define RESOURCE_VIDEO2 4
52#define RESOURCE_VIDEO3 8
53#define RESOURCE_VIDEO4 16
54#define RESOURCE_VIDEO5 32
55#define RESOURCE_VIDEO6 64
56#define RESOURCE_VIDEO7 128
57#define RESOURCE_VIDEO8 256
58#define RESOURCE_VIDEO9 512
59#define RESOURCE_VIDEO10 1024
60#define RESOURCE_VIDEO11 2048
61
62#define BUFFER_TIMEOUT (HZ)
63
64#define UNKNOWN_BOARD 0
65#define CX25821_BOARD 1
66
67
68#define CX25821_NORMS (\
69 V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_M_KR | \
70 V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \
71 V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_H | \
72 V4L2_STD_PAL_Nc)
73
74#define CX25821_BOARD_CONEXANT_ATHENA10 1
75#define MAX_VID_CHANNEL_NUM 12
76
77
78
79
80
81#define MAX_VID_CAP_CHANNEL_NUM 10
82
83#define VID_CHANNEL_NUM 8
84
85struct cx25821_fmt {
86 char *name;
87 u32 fourcc;
88 int depth;
89 int flags;
90 u32 cxformat;
91};
92
93struct cx25821_tvnorm {
94 char *name;
95 v4l2_std_id id;
96 u32 cxiformat;
97 u32 cxoformat;
98};
99
100enum cx25821_src_sel_type {
101 CX25821_SRC_SEL_EXT_656_VIDEO = 0,
102 CX25821_SRC_SEL_PARALLEL_MPEG_VIDEO
103};
104
105struct cx25821_riscmem {
106 unsigned int size;
107 __le32 *cpu;
108 __le32 *jmp;
109 dma_addr_t dma;
110};
111
112
113struct cx25821_buffer {
114
115 struct vb2_v4l2_buffer vb;
116 struct list_head queue;
117
118
119 unsigned int bpl;
120 struct cx25821_riscmem risc;
121 const struct cx25821_fmt *fmt;
122};
123
124enum port {
125 CX25821_UNDEFINED = 0,
126 CX25821_RAW,
127 CX25821_264
128};
129
130struct cx25821_board {
131 const char *name;
132 enum port porta;
133 enum port portb;
134 enum port portc;
135
136 u32 clk_freq;
137};
138
139struct cx25821_i2c {
140 struct cx25821_dev *dev;
141
142 int nr;
143
144
145 struct i2c_adapter i2c_adap;
146 struct i2c_client i2c_client;
147 u32 i2c_rc;
148
149
150 u32 i2c_period;
151 u32 reg_ctrl;
152 u32 reg_stat;
153 u32 reg_addr;
154 u32 reg_rdata;
155 u32 reg_wdata;
156};
157
158struct cx25821_dmaqueue {
159 struct list_head active;
160 u32 count;
161};
162
163struct cx25821_dev;
164
165struct cx25821_channel;
166
167struct cx25821_video_out_data {
168 struct cx25821_channel *chan;
169 int _line_size;
170 int _prog_cnt;
171 int _pixel_format;
172 int _is_first_frame;
173 int _is_running;
174 int _file_status;
175 int _lines_count;
176 int _frame_count;
177 unsigned int _risc_size;
178
179 __le32 *_dma_virt_start_addr;
180 __le32 *_dma_virt_addr;
181 dma_addr_t _dma_phys_addr;
182 dma_addr_t _dma_phys_start_addr;
183
184 unsigned int _data_buf_size;
185 __le32 *_data_buf_virt_addr;
186 dma_addr_t _data_buf_phys_addr;
187
188 u32 upstream_riscbuf_size;
189 u32 upstream_databuf_size;
190 int is_60hz;
191 int _frame_index;
192 int cur_frame_index;
193 int curpos;
194 wait_queue_head_t waitq;
195};
196
197struct cx25821_channel {
198 unsigned id;
199 struct cx25821_dev *dev;
200
201 struct v4l2_ctrl_handler hdl;
202
203 struct video_device vdev;
204 struct cx25821_dmaqueue dma_vidq;
205 struct vb2_queue vidq;
206
207 const struct sram_channel *sram_channels;
208
209 const struct cx25821_fmt *fmt;
210 unsigned field;
211 unsigned int width, height;
212 int pixel_formats;
213 int use_cif_resolution;
214 int cif_width;
215
216
217 struct cx25821_video_out_data *out;
218};
219
220struct snd_card;
221
222struct cx25821_dev {
223 struct v4l2_device v4l2_dev;
224
225
226 struct pci_dev *pci;
227 unsigned char pci_rev, pci_lat;
228 int pci_bus, pci_slot;
229 u32 base_io_addr;
230 u32 __iomem *lmmio;
231 u8 __iomem *bmmio;
232 int pci_irqmask;
233 int hwrevision;
234
235 struct snd_card *card;
236
237 u32 clk_freq;
238
239
240 struct cx25821_i2c i2c_bus[3];
241
242 int nr;
243 struct mutex lock;
244
245 struct cx25821_channel channels[MAX_VID_CHANNEL_NUM];
246
247
248 unsigned int board;
249 char name[32];
250
251
252 unsigned int input;
253 v4l2_std_id tvnorm;
254 unsigned short _max_num_decoders;
255
256
257 int _audio_is_running;
258 int _audiopixel_format;
259 int _is_first_audio_frame;
260 int _audiofile_status;
261 int _audio_lines_count;
262 int _audioframe_count;
263 int _audio_upstream_channel;
264 int _last_index_irq;
265
266 __le32 *_risc_audio_jmp_addr;
267 __le32 *_risc_virt_start_addr;
268 __le32 *_risc_virt_addr;
269 dma_addr_t _risc_phys_addr;
270 dma_addr_t _risc_phys_start_addr;
271
272 unsigned int _audiorisc_size;
273 unsigned int _audiodata_buf_size;
274 __le32 *_audiodata_buf_virt_addr;
275 dma_addr_t _audiodata_buf_phys_addr;
276 char *_audiofilename;
277 u32 audio_upstream_riscbuf_size;
278 u32 audio_upstream_databuf_size;
279 int _audioframe_index;
280 struct work_struct _audio_work_entry;
281 char *input_audiofilename;
282
283
284 spinlock_t slock;
285
286
287 struct cx25821_video_out_data vid_out_data[2];
288};
289
290static inline struct cx25821_dev *get_cx25821(struct v4l2_device *v4l2_dev)
291{
292 return container_of(v4l2_dev, struct cx25821_dev, v4l2_dev);
293}
294
295extern struct cx25821_board cx25821_boards[];
296
297#define SRAM_CH00 0
298#define SRAM_CH01 1
299#define SRAM_CH02 2
300#define SRAM_CH03 3
301#define SRAM_CH04 4
302#define SRAM_CH05 5
303#define SRAM_CH06 6
304#define SRAM_CH07 7
305
306#define SRAM_CH08 8
307#define SRAM_CH09 9
308#define SRAM_CH10 10
309#define SRAM_CH11 11
310
311#define VID_UPSTREAM_SRAM_CHANNEL_I SRAM_CH09
312#define VID_UPSTREAM_SRAM_CHANNEL_J SRAM_CH10
313#define AUDIO_UPSTREAM_SRAM_CHANNEL_B SRAM_CH11
314
315struct sram_channel {
316 char *name;
317 u32 i;
318 u32 cmds_start;
319 u32 ctrl_start;
320 u32 cdt;
321 u32 fifo_start;
322 u32 fifo_size;
323 u32 ptr1_reg;
324 u32 ptr2_reg;
325 u32 cnt1_reg;
326 u32 cnt2_reg;
327 u32 int_msk;
328 u32 int_stat;
329 u32 int_mstat;
330 u32 dma_ctl;
331 u32 gpcnt_ctl;
332 u32 gpcnt;
333 u32 aud_length;
334 u32 aud_cfg;
335 u32 fld_aud_fifo_en;
336 u32 fld_aud_risc_en;
337
338
339 u32 vid_fmt_ctl;
340 u32 vid_active_ctl1;
341 u32 vid_active_ctl2;
342 u32 vid_cdt_size;
343
344 u32 vip_ctl;
345 u32 pix_frmt;
346 u32 jumponly;
347 u32 irq_bit;
348};
349
350extern const struct sram_channel cx25821_sram_channels[];
351
352#define cx_read(reg) readl(dev->lmmio + ((reg)>>2))
353#define cx_write(reg, value) writel((value), dev->lmmio + ((reg)>>2))
354
355#define cx_andor(reg, mask, value) \
356 writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
357 ((value) & (mask)), dev->lmmio+((reg)>>2))
358
359#define cx_set(reg, bit) cx_andor((reg), (bit), (bit))
360#define cx_clear(reg, bit) cx_andor((reg), (bit), 0)
361
362#define Set_GPIO_Bit(Bit) (1 << Bit)
363#define Clear_GPIO_Bit(Bit) (~(1 << Bit))
364
365#define CX25821_ERR(fmt, args...) \
366 pr_err("(%d): " fmt, dev->board, ##args)
367#define CX25821_WARN(fmt, args...) \
368 pr_warn("(%d): " fmt, dev->board, ##args)
369#define CX25821_INFO(fmt, args...) \
370 pr_info("(%d): " fmt, dev->board, ##args)
371
372extern int cx25821_i2c_register(struct cx25821_i2c *bus);
373extern int cx25821_i2c_read(struct cx25821_i2c *bus, u16 reg_addr, int *value);
374extern int cx25821_i2c_write(struct cx25821_i2c *bus, u16 reg_addr, int value);
375extern int cx25821_i2c_unregister(struct cx25821_i2c *bus);
376extern void cx25821_gpio_init(struct cx25821_dev *dev);
377extern void cx25821_set_gpiopin_direction(struct cx25821_dev *dev,
378 int pin_number, int pin_logic_value);
379
380extern int medusa_video_init(struct cx25821_dev *dev);
381extern int medusa_set_videostandard(struct cx25821_dev *dev);
382extern void medusa_set_resolution(struct cx25821_dev *dev, int width,
383 int decoder_select);
384extern int medusa_set_brightness(struct cx25821_dev *dev, int brightness,
385 int decoder);
386extern int medusa_set_contrast(struct cx25821_dev *dev, int contrast,
387 int decoder);
388extern int medusa_set_hue(struct cx25821_dev *dev, int hue, int decoder);
389extern int medusa_set_saturation(struct cx25821_dev *dev, int saturation,
390 int decoder);
391
392extern int cx25821_sram_channel_setup(struct cx25821_dev *dev,
393 const struct sram_channel *ch, unsigned int bpl,
394 u32 risc);
395
396extern int cx25821_riscmem_alloc(struct pci_dev *pci,
397 struct cx25821_riscmem *risc,
398 unsigned int size);
399extern int cx25821_risc_buffer(struct pci_dev *pci, struct cx25821_riscmem *risc,
400 struct scatterlist *sglist,
401 unsigned int top_offset,
402 unsigned int bottom_offset,
403 unsigned int bpl,
404 unsigned int padding, unsigned int lines);
405extern int cx25821_risc_databuffer_audio(struct pci_dev *pci,
406 struct cx25821_riscmem *risc,
407 struct scatterlist *sglist,
408 unsigned int bpl,
409 unsigned int lines, unsigned int lpi);
410extern void cx25821_free_buffer(struct cx25821_dev *dev,
411 struct cx25821_buffer *buf);
412extern void cx25821_sram_channel_dump(struct cx25821_dev *dev,
413 const struct sram_channel *ch);
414extern void cx25821_sram_channel_dump_audio(struct cx25821_dev *dev,
415 const struct sram_channel *ch);
416
417extern struct cx25821_dev *cx25821_dev_get(struct pci_dev *pci);
418extern void cx25821_print_irqbits(char *name, char *tag, char **strings,
419 int len, u32 bits, u32 mask);
420extern void cx25821_dev_unregister(struct cx25821_dev *dev);
421extern int cx25821_sram_channel_setup_audio(struct cx25821_dev *dev,
422 const struct sram_channel *ch,
423 unsigned int bpl, u32 risc);
424
425extern void cx25821_set_pixel_format(struct cx25821_dev *dev, int channel,
426 u32 format);
427
428#endif
429
