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10#include "cx88.h"
11#include "dvb-pll.h"
12
13#include <linux/module.h>
14#include <linux/init.h>
15#include <linux/device.h>
16#include <linux/fs.h>
17#include <linux/kthread.h>
18#include <linux/file.h>
19#include <linux/suspend.h>
20
21#include <media/v4l2-common.h>
22
23#include "mt352.h"
24#include "mt352_priv.h"
25#include "cx88-vp3054-i2c.h"
26#include "zl10353.h"
27#include "cx22702.h"
28#include "or51132.h"
29#include "lgdt330x.h"
30#include "s5h1409.h"
31#include "xc4000.h"
32#include "xc5000.h"
33#include "nxt200x.h"
34#include "cx24123.h"
35#include "isl6421.h"
36#include "tuner-simple.h"
37#include "tda9887.h"
38#include "s5h1411.h"
39#include "stv0299.h"
40#include "z0194a.h"
41#include "stv0288.h"
42#include "stb6000.h"
43#include "cx24116.h"
44#include "stv0900.h"
45#include "stb6100.h"
46#include "stb6100_proc.h"
47#include "mb86a16.h"
48#include "ts2020.h"
49#include "ds3000.h"
50
51MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
52MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
53MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
54MODULE_LICENSE("GPL");
55MODULE_VERSION(CX88_VERSION);
56
57static unsigned int debug;
58module_param(debug, int, 0644);
59MODULE_PARM_DESC(debug, "enable debug messages [dvb]");
60
61static unsigned int dvb_buf_tscnt = 32;
62module_param(dvb_buf_tscnt, int, 0644);
63MODULE_PARM_DESC(dvb_buf_tscnt, "DVB Buffer TS count [dvb]");
64
65DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
66
67#define dprintk(level, fmt, arg...) do { \
68 if (debug >= level) \
69 printk(KERN_DEBUG pr_fmt("%s: dvb:" fmt), \
70 __func__, ##arg); \
71} while (0)
72
73
74
75static int queue_setup(struct vb2_queue *q,
76 unsigned int *num_buffers, unsigned int *num_planes,
77 unsigned int sizes[], struct device *alloc_devs[])
78{
79 struct cx8802_dev *dev = q->drv_priv;
80
81 *num_planes = 1;
82 dev->ts_packet_size = 188 * 4;
83 dev->ts_packet_count = dvb_buf_tscnt;
84 sizes[0] = dev->ts_packet_size * dev->ts_packet_count;
85 *num_buffers = dvb_buf_tscnt;
86 return 0;
87}
88
89static int buffer_prepare(struct vb2_buffer *vb)
90{
91 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
92 struct cx8802_dev *dev = vb->vb2_queue->drv_priv;
93 struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
94
95 return cx8802_buf_prepare(vb->vb2_queue, dev, buf);
96}
97
98static void buffer_finish(struct vb2_buffer *vb)
99{
100 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
101 struct cx8802_dev *dev = vb->vb2_queue->drv_priv;
102 struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
103 struct cx88_riscmem *risc = &buf->risc;
104
105 if (risc->cpu)
106 pci_free_consistent(dev->pci, risc->size, risc->cpu, risc->dma);
107 memset(risc, 0, sizeof(*risc));
108}
109
110static void buffer_queue(struct vb2_buffer *vb)
111{
112 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
113 struct cx8802_dev *dev = vb->vb2_queue->drv_priv;
114 struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
115
116 cx8802_buf_queue(dev, buf);
117}
118
119static int start_streaming(struct vb2_queue *q, unsigned int count)
120{
121 struct cx8802_dev *dev = q->drv_priv;
122 struct cx88_dmaqueue *dmaq = &dev->mpegq;
123 struct cx88_buffer *buf;
124
125 buf = list_entry(dmaq->active.next, struct cx88_buffer, list);
126 cx8802_start_dma(dev, dmaq, buf);
127 return 0;
128}
129
130static void stop_streaming(struct vb2_queue *q)
131{
132 struct cx8802_dev *dev = q->drv_priv;
133 struct cx88_dmaqueue *dmaq = &dev->mpegq;
134 unsigned long flags;
135
136 cx8802_cancel_buffers(dev);
137
138 spin_lock_irqsave(&dev->slock, flags);
139 while (!list_empty(&dmaq->active)) {
140 struct cx88_buffer *buf = list_entry(dmaq->active.next,
141 struct cx88_buffer, list);
142
143 list_del(&buf->list);
144 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
145 }
146 spin_unlock_irqrestore(&dev->slock, flags);
147}
148
149static const struct vb2_ops dvb_qops = {
150 .queue_setup = queue_setup,
151 .buf_prepare = buffer_prepare,
152 .buf_finish = buffer_finish,
153 .buf_queue = buffer_queue,
154 .wait_prepare = vb2_ops_wait_prepare,
155 .wait_finish = vb2_ops_wait_finish,
156 .start_streaming = start_streaming,
157 .stop_streaming = stop_streaming,
158};
159
160
161
162static int cx88_dvb_bus_ctrl(struct dvb_frontend *fe, int acquire)
163{
164 struct cx8802_dev *dev = fe->dvb->priv;
165 struct cx8802_driver *drv = NULL;
166 int ret = 0;
167 int fe_id;
168
169 fe_id = vb2_dvb_find_frontend(&dev->frontends, fe);
170 if (!fe_id) {
171 pr_err("%s() No frontend found\n", __func__);
172 return -EINVAL;
173 }
174
175 mutex_lock(&dev->core->lock);
176 drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
177 if (drv) {
178 if (acquire) {
179 dev->frontends.active_fe_id = fe_id;
180 ret = drv->request_acquire(drv);
181 } else {
182 ret = drv->request_release(drv);
183 dev->frontends.active_fe_id = 0;
184 }
185 }
186 mutex_unlock(&dev->core->lock);
187
188 return ret;
189}
190
191static void cx88_dvb_gate_ctrl(struct cx88_core *core, int open)
192{
193 struct vb2_dvb_frontends *f;
194 struct vb2_dvb_frontend *fe;
195
196 if (!core->dvbdev)
197 return;
198
199 f = &core->dvbdev->frontends;
200
201 if (!f)
202 return;
203
204 if (f->gate <= 1)
205 fe = vb2_dvb_get_frontend(f, 1);
206 else
207 fe = vb2_dvb_get_frontend(f, f->gate);
208
209 if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
210 fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
211}
212
213
214
215static int dvico_fusionhdtv_demod_init(struct dvb_frontend *fe)
216{
217 static const u8 clock_config[] = { CLOCK_CTL, 0x38, 0x39 };
218 static const u8 reset[] = { RESET, 0x80 };
219 static const u8 adc_ctl_1_cfg[] = { ADC_CTL_1, 0x40 };
220 static const u8 agc_cfg[] = { AGC_TARGET, 0x24, 0x20 };
221 static const u8 gpp_ctl_cfg[] = { GPP_CTL, 0x33 };
222 static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
223
224 mt352_write(fe, clock_config, sizeof(clock_config));
225 udelay(200);
226 mt352_write(fe, reset, sizeof(reset));
227 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
228
229 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
230 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
231 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
232 return 0;
233}
234
235static int dvico_dual_demod_init(struct dvb_frontend *fe)
236{
237 static const u8 clock_config[] = { CLOCK_CTL, 0x38, 0x38 };
238 static const u8 reset[] = { RESET, 0x80 };
239 static const u8 adc_ctl_1_cfg[] = { ADC_CTL_1, 0x40 };
240 static const u8 agc_cfg[] = { AGC_TARGET, 0x28, 0x20 };
241 static const u8 gpp_ctl_cfg[] = { GPP_CTL, 0x33 };
242 static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
243
244 mt352_write(fe, clock_config, sizeof(clock_config));
245 udelay(200);
246 mt352_write(fe, reset, sizeof(reset));
247 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
248
249 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
250 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
251 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
252
253 return 0;
254}
255
256static int dntv_live_dvbt_demod_init(struct dvb_frontend *fe)
257{
258 static const u8 clock_config[] = { 0x89, 0x38, 0x39 };
259 static const u8 reset[] = { 0x50, 0x80 };
260 static const u8 adc_ctl_1_cfg[] = { 0x8E, 0x40 };
261 static const u8 agc_cfg[] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
262 0x00, 0xFF, 0x00, 0x40, 0x40 };
263 static const u8 dntv_extra[] = { 0xB5, 0x7A };
264 static const u8 capt_range_cfg[] = { 0x75, 0x32 };
265
266 mt352_write(fe, clock_config, sizeof(clock_config));
267 udelay(2000);
268 mt352_write(fe, reset, sizeof(reset));
269 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
270
271 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
272 udelay(2000);
273 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
274 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
275
276 return 0;
277}
278
279static const struct mt352_config dvico_fusionhdtv = {
280 .demod_address = 0x0f,
281 .demod_init = dvico_fusionhdtv_demod_init,
282};
283
284static const struct mt352_config dntv_live_dvbt_config = {
285 .demod_address = 0x0f,
286 .demod_init = dntv_live_dvbt_demod_init,
287};
288
289static const struct mt352_config dvico_fusionhdtv_dual = {
290 .demod_address = 0x0f,
291 .demod_init = dvico_dual_demod_init,
292};
293
294static const struct zl10353_config cx88_terratec_cinergy_ht_pci_mkii_config = {
295 .demod_address = (0x1e >> 1),
296 .no_tuner = 1,
297 .if2 = 45600,
298};
299
300static const struct mb86a16_config twinhan_vp1027 = {
301 .demod_address = 0x08,
302};
303
304#if IS_ENABLED(CONFIG_VIDEO_CX88_VP3054)
305static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend *fe)
306{
307 static const u8 clock_config[] = { 0x89, 0x38, 0x38 };
308 static const u8 reset[] = { 0x50, 0x80 };
309 static const u8 adc_ctl_1_cfg[] = { 0x8E, 0x40 };
310 static const u8 agc_cfg[] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
311 0x00, 0xFF, 0x00, 0x40, 0x40 };
312 static const u8 dntv_extra[] = { 0xB5, 0x7A };
313 static const u8 capt_range_cfg[] = { 0x75, 0x32 };
314
315 mt352_write(fe, clock_config, sizeof(clock_config));
316 udelay(2000);
317 mt352_write(fe, reset, sizeof(reset));
318 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
319
320 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
321 udelay(2000);
322 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
323 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
324
325 return 0;
326}
327
328static const struct mt352_config dntv_live_dvbt_pro_config = {
329 .demod_address = 0x0f,
330 .no_tuner = 1,
331 .demod_init = dntv_live_dvbt_pro_demod_init,
332};
333#endif
334
335static const struct zl10353_config dvico_fusionhdtv_hybrid = {
336 .demod_address = 0x0f,
337 .no_tuner = 1,
338};
339
340static const struct zl10353_config dvico_fusionhdtv_xc3028 = {
341 .demod_address = 0x0f,
342 .if2 = 45600,
343 .no_tuner = 1,
344};
345
346static const struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
347 .demod_address = 0x0f,
348 .if2 = 4560,
349 .no_tuner = 1,
350 .demod_init = dvico_fusionhdtv_demod_init,
351};
352
353static const struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
354 .demod_address = 0x0f,
355};
356
357static const struct cx22702_config connexant_refboard_config = {
358 .demod_address = 0x43,
359 .output_mode = CX22702_SERIAL_OUTPUT,
360};
361
362static const struct cx22702_config hauppauge_hvr_config = {
363 .demod_address = 0x63,
364 .output_mode = CX22702_SERIAL_OUTPUT,
365};
366
367static int or51132_set_ts_param(struct dvb_frontend *fe, int is_punctured)
368{
369 struct cx8802_dev *dev = fe->dvb->priv;
370
371 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
372 return 0;
373}
374
375static const struct or51132_config pchdtv_hd3000 = {
376 .demod_address = 0x15,
377 .set_ts_params = or51132_set_ts_param,
378};
379
380static int lgdt330x_pll_rf_set(struct dvb_frontend *fe, int index)
381{
382 struct cx8802_dev *dev = fe->dvb->priv;
383 struct cx88_core *core = dev->core;
384
385 dprintk(1, "%s: index = %d\n", __func__, index);
386 if (index == 0)
387 cx_clear(MO_GP0_IO, 8);
388 else
389 cx_set(MO_GP0_IO, 8);
390 return 0;
391}
392
393static int lgdt330x_set_ts_param(struct dvb_frontend *fe, int is_punctured)
394{
395 struct cx8802_dev *dev = fe->dvb->priv;
396
397 if (is_punctured)
398 dev->ts_gen_cntrl |= 0x04;
399 else
400 dev->ts_gen_cntrl &= ~0x04;
401 return 0;
402}
403
404static struct lgdt330x_config fusionhdtv_3_gold = {
405 .demod_chip = LGDT3302,
406 .serial_mpeg = 0x04,
407 .set_ts_params = lgdt330x_set_ts_param,
408};
409
410static const struct lgdt330x_config fusionhdtv_5_gold = {
411 .demod_chip = LGDT3303,
412 .serial_mpeg = 0x40,
413 .set_ts_params = lgdt330x_set_ts_param,
414};
415
416static const struct lgdt330x_config pchdtv_hd5500 = {
417 .demod_chip = LGDT3303,
418 .serial_mpeg = 0x40,
419 .set_ts_params = lgdt330x_set_ts_param,
420};
421
422static int nxt200x_set_ts_param(struct dvb_frontend *fe, int is_punctured)
423{
424 struct cx8802_dev *dev = fe->dvb->priv;
425
426 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
427 return 0;
428}
429
430static const struct nxt200x_config ati_hdtvwonder = {
431 .demod_address = 0x0a,
432 .set_ts_params = nxt200x_set_ts_param,
433};
434
435static int cx24123_set_ts_param(struct dvb_frontend *fe,
436 int is_punctured)
437{
438 struct cx8802_dev *dev = fe->dvb->priv;
439
440 dev->ts_gen_cntrl = 0x02;
441 return 0;
442}
443
444static int kworld_dvbs_100_set_voltage(struct dvb_frontend *fe,
445 enum fe_sec_voltage voltage)
446{
447 struct cx8802_dev *dev = fe->dvb->priv;
448 struct cx88_core *core = dev->core;
449
450 if (voltage == SEC_VOLTAGE_OFF)
451 cx_write(MO_GP0_IO, 0x000006fb);
452 else
453 cx_write(MO_GP0_IO, 0x000006f9);
454
455 if (core->prev_set_voltage)
456 return core->prev_set_voltage(fe, voltage);
457 return 0;
458}
459
460static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
461 enum fe_sec_voltage voltage)
462{
463 struct cx8802_dev *dev = fe->dvb->priv;
464 struct cx88_core *core = dev->core;
465
466 if (voltage == SEC_VOLTAGE_OFF) {
467 dprintk(1, "LNB Voltage OFF\n");
468 cx_write(MO_GP0_IO, 0x0000efff);
469 }
470
471 if (core->prev_set_voltage)
472 return core->prev_set_voltage(fe, voltage);
473 return 0;
474}
475
476static int tevii_dvbs_set_voltage(struct dvb_frontend *fe,
477 enum fe_sec_voltage voltage)
478{
479 struct cx8802_dev *dev = fe->dvb->priv;
480 struct cx88_core *core = dev->core;
481
482 cx_set(MO_GP0_IO, 0x6040);
483 switch (voltage) {
484 case SEC_VOLTAGE_13:
485 cx_clear(MO_GP0_IO, 0x20);
486 break;
487 case SEC_VOLTAGE_18:
488 cx_set(MO_GP0_IO, 0x20);
489 break;
490 case SEC_VOLTAGE_OFF:
491 cx_clear(MO_GP0_IO, 0x20);
492 break;
493 }
494
495 if (core->prev_set_voltage)
496 return core->prev_set_voltage(fe, voltage);
497 return 0;
498}
499
500static int vp1027_set_voltage(struct dvb_frontend *fe,
501 enum fe_sec_voltage voltage)
502{
503 struct cx8802_dev *dev = fe->dvb->priv;
504 struct cx88_core *core = dev->core;
505
506 switch (voltage) {
507 case SEC_VOLTAGE_13:
508 dprintk(1, "LNB SEC Voltage=13\n");
509 cx_write(MO_GP0_IO, 0x00001220);
510 break;
511 case SEC_VOLTAGE_18:
512 dprintk(1, "LNB SEC Voltage=18\n");
513 cx_write(MO_GP0_IO, 0x00001222);
514 break;
515 case SEC_VOLTAGE_OFF:
516 dprintk(1, "LNB Voltage OFF\n");
517 cx_write(MO_GP0_IO, 0x00001230);
518 break;
519 }
520
521 if (core->prev_set_voltage)
522 return core->prev_set_voltage(fe, voltage);
523 return 0;
524}
525
526static const struct cx24123_config geniatech_dvbs_config = {
527 .demod_address = 0x55,
528 .set_ts_params = cx24123_set_ts_param,
529};
530
531static const struct cx24123_config hauppauge_novas_config = {
532 .demod_address = 0x55,
533 .set_ts_params = cx24123_set_ts_param,
534};
535
536static const struct cx24123_config kworld_dvbs_100_config = {
537 .demod_address = 0x15,
538 .set_ts_params = cx24123_set_ts_param,
539 .lnb_polarity = 1,
540};
541
542static const struct s5h1409_config pinnacle_pctv_hd_800i_config = {
543 .demod_address = 0x32 >> 1,
544 .output_mode = S5H1409_PARALLEL_OUTPUT,
545 .gpio = S5H1409_GPIO_ON,
546 .qam_if = 44000,
547 .inversion = S5H1409_INVERSION_OFF,
548 .status_mode = S5H1409_DEMODLOCKING,
549 .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINUOUS_NONINVERTING_CLOCK,
550};
551
552static const struct s5h1409_config dvico_hdtv5_pci_nano_config = {
553 .demod_address = 0x32 >> 1,
554 .output_mode = S5H1409_SERIAL_OUTPUT,
555 .gpio = S5H1409_GPIO_OFF,
556 .inversion = S5H1409_INVERSION_OFF,
557 .status_mode = S5H1409_DEMODLOCKING,
558 .mpeg_timing = S5H1409_MPEGTIMING_CONTINUOUS_NONINVERTING_CLOCK,
559};
560
561static const struct s5h1409_config kworld_atsc_120_config = {
562 .demod_address = 0x32 >> 1,
563 .output_mode = S5H1409_SERIAL_OUTPUT,
564 .gpio = S5H1409_GPIO_OFF,
565 .inversion = S5H1409_INVERSION_OFF,
566 .status_mode = S5H1409_DEMODLOCKING,
567 .mpeg_timing = S5H1409_MPEGTIMING_CONTINUOUS_NONINVERTING_CLOCK,
568};
569
570static const struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
571 .i2c_address = 0x64,
572 .if_khz = 5380,
573};
574
575static const struct zl10353_config cx88_pinnacle_hybrid_pctv = {
576 .demod_address = (0x1e >> 1),
577 .no_tuner = 1,
578 .if2 = 45600,
579};
580
581static const struct zl10353_config cx88_geniatech_x8000_mt = {
582 .demod_address = (0x1e >> 1),
583 .no_tuner = 1,
584 .disable_i2c_gate_ctrl = 1,
585};
586
587static const struct s5h1411_config dvico_fusionhdtv7_config = {
588 .output_mode = S5H1411_SERIAL_OUTPUT,
589 .gpio = S5H1411_GPIO_ON,
590 .mpeg_timing = S5H1411_MPEGTIMING_CONTINUOUS_NONINVERTING_CLOCK,
591 .qam_if = S5H1411_IF_44000,
592 .vsb_if = S5H1411_IF_44000,
593 .inversion = S5H1411_INVERSION_OFF,
594 .status_mode = S5H1411_DEMODLOCKING
595};
596
597static const struct xc5000_config dvico_fusionhdtv7_tuner_config = {
598 .i2c_address = 0xc2 >> 1,
599 .if_khz = 5380,
600};
601
602static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
603{
604 struct dvb_frontend *fe;
605 struct vb2_dvb_frontend *fe0 = NULL;
606 struct xc2028_ctrl ctl;
607 struct xc2028_config cfg = {
608 .i2c_adap = &dev->core->i2c_adap,
609 .i2c_addr = addr,
610 .ctrl = &ctl,
611 };
612
613
614 fe0 = vb2_dvb_get_frontend(&dev->frontends, 1);
615 if (!fe0)
616 return -EINVAL;
617
618 if (!fe0->dvb.frontend) {
619 pr_err("dvb frontend not attached. Can't attach xc3028\n");
620 return -EINVAL;
621 }
622
623
624
625
626
627
628 cx88_setup_xc3028(dev->core, &ctl);
629
630 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg);
631 if (!fe) {
632 pr_err("xc3028 attach failed\n");
633 dvb_frontend_detach(fe0->dvb.frontend);
634 dvb_unregister_frontend(fe0->dvb.frontend);
635 fe0->dvb.frontend = NULL;
636 return -EINVAL;
637 }
638
639 pr_info("xc3028 attached\n");
640
641 return 0;
642}
643
644static int attach_xc4000(struct cx8802_dev *dev, struct xc4000_config *cfg)
645{
646 struct dvb_frontend *fe;
647 struct vb2_dvb_frontend *fe0 = NULL;
648
649
650 fe0 = vb2_dvb_get_frontend(&dev->frontends, 1);
651 if (!fe0)
652 return -EINVAL;
653
654 if (!fe0->dvb.frontend) {
655 pr_err("dvb frontend not attached. Can't attach xc4000\n");
656 return -EINVAL;
657 }
658
659 fe = dvb_attach(xc4000_attach, fe0->dvb.frontend, &dev->core->i2c_adap,
660 cfg);
661 if (!fe) {
662 pr_err("xc4000 attach failed\n");
663 dvb_frontend_detach(fe0->dvb.frontend);
664 dvb_unregister_frontend(fe0->dvb.frontend);
665 fe0->dvb.frontend = NULL;
666 return -EINVAL;
667 }
668
669 pr_info("xc4000 attached\n");
670
671 return 0;
672}
673
674static int cx24116_set_ts_param(struct dvb_frontend *fe,
675 int is_punctured)
676{
677 struct cx8802_dev *dev = fe->dvb->priv;
678
679 dev->ts_gen_cntrl = 0x2;
680
681 return 0;
682}
683
684static int stv0900_set_ts_param(struct dvb_frontend *fe,
685 int is_punctured)
686{
687 struct cx8802_dev *dev = fe->dvb->priv;
688
689 dev->ts_gen_cntrl = 0;
690
691 return 0;
692}
693
694static int cx24116_reset_device(struct dvb_frontend *fe)
695{
696 struct cx8802_dev *dev = fe->dvb->priv;
697 struct cx88_core *core = dev->core;
698
699
700
701 cx_write(MO_SRST_IO, 0);
702 usleep_range(10000, 20000);
703
704 cx_write(MO_SRST_IO, 1);
705 usleep_range(10000, 20000);
706
707 return 0;
708}
709
710static const struct cx24116_config hauppauge_hvr4000_config = {
711 .demod_address = 0x05,
712 .set_ts_params = cx24116_set_ts_param,
713 .reset_device = cx24116_reset_device,
714};
715
716static const struct cx24116_config tevii_s460_config = {
717 .demod_address = 0x55,
718 .set_ts_params = cx24116_set_ts_param,
719 .reset_device = cx24116_reset_device,
720};
721
722static int ds3000_set_ts_param(struct dvb_frontend *fe,
723 int is_punctured)
724{
725 struct cx8802_dev *dev = fe->dvb->priv;
726
727 dev->ts_gen_cntrl = 4;
728
729 return 0;
730}
731
732static struct ds3000_config tevii_ds3000_config = {
733 .demod_address = 0x68,
734 .set_ts_params = ds3000_set_ts_param,
735};
736
737static struct ts2020_config tevii_ts2020_config = {
738 .tuner_address = 0x60,
739 .clk_out_div = 1,
740};
741
742static const struct stv0900_config prof_7301_stv0900_config = {
743 .demod_address = 0x6a,
744
745 .xtal = 27000000,
746 .clkmode = 3,
747 .diseqc_mode = 2,
748 .tun1_maddress = 0,
749 .tun1_adc = 0,
750 .path1_mode = 3,
751 .set_ts_params = stv0900_set_ts_param,
752};
753
754static const struct stb6100_config prof_7301_stb6100_config = {
755 .tuner_address = 0x60,
756 .refclock = 27000000,
757};
758
759static const struct stv0299_config tevii_tuner_sharp_config = {
760 .demod_address = 0x68,
761 .inittab = sharp_z0194a_inittab,
762 .mclk = 88000000UL,
763 .invert = 1,
764 .skip_reinit = 0,
765 .lock_output = 1,
766 .volt13_op0_op1 = STV0299_VOLT13_OP1,
767 .min_delay_ms = 100,
768 .set_symbol_rate = sharp_z0194a_set_symbol_rate,
769 .set_ts_params = cx24116_set_ts_param,
770};
771
772static const struct stv0288_config tevii_tuner_earda_config = {
773 .demod_address = 0x68,
774 .min_delay_ms = 100,
775 .set_ts_params = cx24116_set_ts_param,
776};
777
778static int cx8802_alloc_frontends(struct cx8802_dev *dev)
779{
780 struct cx88_core *core = dev->core;
781 struct vb2_dvb_frontend *fe = NULL;
782 int i;
783
784 mutex_init(&dev->frontends.lock);
785 INIT_LIST_HEAD(&dev->frontends.felist);
786
787 if (!core->board.num_frontends)
788 return -ENODEV;
789
790 pr_info("%s: allocating %d frontend(s)\n", __func__,
791 core->board.num_frontends);
792 for (i = 1; i <= core->board.num_frontends; i++) {
793 fe = vb2_dvb_alloc_frontend(&dev->frontends, i);
794 if (!fe) {
795 pr_err("%s() failed to alloc\n", __func__);
796 vb2_dvb_dealloc_frontends(&dev->frontends);
797 return -ENOMEM;
798 }
799 }
800 return 0;
801}
802
803static const u8 samsung_smt_7020_inittab[] = {
804 0x01, 0x15,
805 0x02, 0x00,
806 0x03, 0x00,
807 0x04, 0x7D,
808 0x05, 0x0F,
809 0x06, 0x02,
810 0x07, 0x00,
811 0x08, 0x60,
812
813 0x0A, 0xC2,
814 0x0B, 0x00,
815 0x0C, 0x01,
816 0x0D, 0x81,
817 0x0E, 0x44,
818 0x0F, 0x09,
819 0x10, 0x3C,
820 0x11, 0x84,
821 0x12, 0xDA,
822 0x13, 0x99,
823 0x14, 0x8D,
824 0x15, 0xCE,
825 0x16, 0xE8,
826 0x17, 0x43,
827 0x18, 0x1C,
828 0x19, 0x1B,
829 0x1A, 0x1D,
830
831 0x1C, 0x12,
832 0x1D, 0x00,
833 0x1E, 0x00,
834 0x1F, 0x00,
835 0x20, 0x00,
836 0x21, 0x00,
837 0x22, 0x00,
838 0x23, 0x00,
839
840 0x28, 0x02,
841 0x29, 0x28,
842 0x2A, 0x14,
843 0x2B, 0x0F,
844 0x2C, 0x09,
845 0x2D, 0x05,
846
847 0x31, 0x1F,
848 0x32, 0x19,
849 0x33, 0xFC,
850 0x34, 0x13,
851 0xff, 0xff,
852};
853
854static int samsung_smt_7020_tuner_set_params(struct dvb_frontend *fe)
855{
856 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
857 struct cx8802_dev *dev = fe->dvb->priv;
858 u8 buf[4];
859 u32 div;
860 struct i2c_msg msg = {
861 .addr = 0x61,
862 .flags = 0,
863 .buf = buf,
864 .len = sizeof(buf) };
865
866 div = c->frequency / 125;
867
868 buf[0] = (div >> 8) & 0x7f;
869 buf[1] = div & 0xff;
870 buf[2] = 0x84;
871 buf[3] = 0x00;
872
873 if (c->frequency < 1500000)
874 buf[3] |= 0x10;
875
876 if (fe->ops.i2c_gate_ctrl)
877 fe->ops.i2c_gate_ctrl(fe, 1);
878
879 if (i2c_transfer(&dev->core->i2c_adap, &msg, 1) != 1)
880 return -EIO;
881
882 return 0;
883}
884
885static int samsung_smt_7020_set_tone(struct dvb_frontend *fe,
886 enum fe_sec_tone_mode tone)
887{
888 struct cx8802_dev *dev = fe->dvb->priv;
889 struct cx88_core *core = dev->core;
890
891 cx_set(MO_GP0_IO, 0x0800);
892
893 switch (tone) {
894 case SEC_TONE_ON:
895 cx_set(MO_GP0_IO, 0x08);
896 break;
897 case SEC_TONE_OFF:
898 cx_clear(MO_GP0_IO, 0x08);
899 break;
900 default:
901 return -EINVAL;
902 }
903
904 return 0;
905}
906
907static int samsung_smt_7020_set_voltage(struct dvb_frontend *fe,
908 enum fe_sec_voltage voltage)
909{
910 struct cx8802_dev *dev = fe->dvb->priv;
911 struct cx88_core *core = dev->core;
912
913 u8 data;
914 struct i2c_msg msg = {
915 .addr = 8,
916 .flags = 0,
917 .buf = &data,
918 .len = sizeof(data) };
919
920 cx_set(MO_GP0_IO, 0x8000);
921
922 switch (voltage) {
923 case SEC_VOLTAGE_OFF:
924 break;
925 case SEC_VOLTAGE_13:
926 data = ISL6421_EN1 | ISL6421_LLC1;
927 cx_clear(MO_GP0_IO, 0x80);
928 break;
929 case SEC_VOLTAGE_18:
930 data = ISL6421_EN1 | ISL6421_LLC1 | ISL6421_VSEL1;
931 cx_clear(MO_GP0_IO, 0x80);
932 break;
933 default:
934 return -EINVAL;
935 }
936
937 return (i2c_transfer(&dev->core->i2c_adap, &msg, 1) == 1) ? 0 : -EIO;
938}
939
940static int samsung_smt_7020_stv0299_set_symbol_rate(struct dvb_frontend *fe,
941 u32 srate, u32 ratio)
942{
943 u8 aclk = 0;
944 u8 bclk = 0;
945
946 if (srate < 1500000) {
947 aclk = 0xb7;
948 bclk = 0x47;
949 } else if (srate < 3000000) {
950 aclk = 0xb7;
951 bclk = 0x4b;
952 } else if (srate < 7000000) {
953 aclk = 0xb7;
954 bclk = 0x4f;
955 } else if (srate < 14000000) {
956 aclk = 0xb7;
957 bclk = 0x53;
958 } else if (srate < 30000000) {
959 aclk = 0xb6;
960 bclk = 0x53;
961 } else if (srate < 45000000) {
962 aclk = 0xb4;
963 bclk = 0x51;
964 }
965
966 stv0299_writereg(fe, 0x13, aclk);
967 stv0299_writereg(fe, 0x14, bclk);
968 stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
969 stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
970 stv0299_writereg(fe, 0x21, ratio & 0xf0);
971
972 return 0;
973}
974
975static const struct stv0299_config samsung_stv0299_config = {
976 .demod_address = 0x68,
977 .inittab = samsung_smt_7020_inittab,
978 .mclk = 88000000UL,
979 .invert = 0,
980 .skip_reinit = 0,
981 .lock_output = STV0299_LOCKOUTPUT_LK,
982 .volt13_op0_op1 = STV0299_VOLT13_OP1,
983 .min_delay_ms = 100,
984 .set_symbol_rate = samsung_smt_7020_stv0299_set_symbol_rate,
985};
986
987static int dvb_register(struct cx8802_dev *dev)
988{
989 struct cx88_core *core = dev->core;
990 struct vb2_dvb_frontend *fe0, *fe1 = NULL;
991 int mfe_shared = 0;
992 int res = -EINVAL;
993
994 if (core->i2c_rc != 0) {
995 pr_err("no i2c-bus available, cannot attach dvb drivers\n");
996 goto frontend_detach;
997 }
998
999
1000 fe0 = vb2_dvb_get_frontend(&dev->frontends, 1);
1001 if (!fe0)
1002 goto frontend_detach;
1003
1004
1005 dev->frontends.gate = 0;
1006
1007
1008 core->gate_ctrl = cx88_dvb_gate_ctrl;
1009
1010
1011 switch (core->boardnr) {
1012 case CX88_BOARD_HAUPPAUGE_DVB_T1:
1013 fe0->dvb.frontend = dvb_attach(cx22702_attach,
1014 &connexant_refboard_config,
1015 &core->i2c_adap);
1016 if (fe0->dvb.frontend) {
1017 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1018 0x61, &core->i2c_adap,
1019 DVB_PLL_THOMSON_DTT759X))
1020 goto frontend_detach;
1021 }
1022 break;
1023 case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
1024 case CX88_BOARD_CONEXANT_DVB_T1:
1025 case CX88_BOARD_KWORLD_DVB_T_CX22702:
1026 case CX88_BOARD_WINFAST_DTV1000:
1027 fe0->dvb.frontend = dvb_attach(cx22702_attach,
1028 &connexant_refboard_config,
1029 &core->i2c_adap);
1030 if (fe0->dvb.frontend) {
1031 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1032 0x60, &core->i2c_adap,
1033 DVB_PLL_THOMSON_DTT7579))
1034 goto frontend_detach;
1035 }
1036 break;
1037 case CX88_BOARD_WINFAST_DTV2000H:
1038 case CX88_BOARD_HAUPPAUGE_HVR1100:
1039 case CX88_BOARD_HAUPPAUGE_HVR1100LP:
1040 case CX88_BOARD_HAUPPAUGE_HVR1300:
1041 fe0->dvb.frontend = dvb_attach(cx22702_attach,
1042 &hauppauge_hvr_config,
1043 &core->i2c_adap);
1044 if (fe0->dvb.frontend) {
1045 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1046 &core->i2c_adap, 0x61,
1047 TUNER_PHILIPS_FMD1216ME_MK3))
1048 goto frontend_detach;
1049 }
1050 break;
1051 case CX88_BOARD_WINFAST_DTV2000H_J:
1052 fe0->dvb.frontend = dvb_attach(cx22702_attach,
1053 &hauppauge_hvr_config,
1054 &core->i2c_adap);
1055 if (fe0->dvb.frontend) {
1056 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1057 &core->i2c_adap, 0x61,
1058 TUNER_PHILIPS_FMD1216MEX_MK3))
1059 goto frontend_detach;
1060 }
1061 break;
1062 case CX88_BOARD_HAUPPAUGE_HVR3000:
1063
1064 mfe_shared = 1;
1065 dev->frontends.gate = 2;
1066
1067 fe0->dvb.frontend = dvb_attach(cx24123_attach,
1068 &hauppauge_novas_config,
1069 &dev->core->i2c_adap);
1070 if (fe0->dvb.frontend) {
1071 if (!dvb_attach(isl6421_attach,
1072 fe0->dvb.frontend,
1073 &dev->core->i2c_adap,
1074 0x08, ISL6421_DCL, 0x00, false))
1075 goto frontend_detach;
1076 }
1077
1078 fe1 = vb2_dvb_get_frontend(&dev->frontends, 2);
1079 if (!fe1)
1080 goto frontend_detach;
1081
1082 fe1->dvb.frontend = dvb_attach(cx22702_attach,
1083 &hauppauge_hvr_config,
1084 &dev->core->i2c_adap);
1085 if (fe1->dvb.frontend) {
1086 fe1->dvb.frontend->id = 1;
1087 if (!dvb_attach(simple_tuner_attach,
1088 fe1->dvb.frontend,
1089 &dev->core->i2c_adap,
1090 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
1091 goto frontend_detach;
1092 }
1093 break;
1094 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
1095 fe0->dvb.frontend = dvb_attach(mt352_attach,
1096 &dvico_fusionhdtv,
1097 &core->i2c_adap);
1098 if (fe0->dvb.frontend) {
1099 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1100 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
1101 goto frontend_detach;
1102 break;
1103 }
1104
1105 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1106 &dvico_fusionhdtv_plus_v1_1,
1107 &core->i2c_adap);
1108 if (fe0->dvb.frontend) {
1109 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1110 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
1111 goto frontend_detach;
1112 }
1113 break;
1114 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
1115
1116
1117
1118
1119 fe0->dvb.frontend = dvb_attach(mt352_attach,
1120 &dvico_fusionhdtv_dual,
1121 &core->i2c_adap);
1122 if (fe0->dvb.frontend) {
1123 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1124 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
1125 goto frontend_detach;
1126 break;
1127 }
1128
1129 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1130 &dvico_fusionhdtv_plus_v1_1,
1131 &core->i2c_adap);
1132 if (fe0->dvb.frontend) {
1133 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1134 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
1135 goto frontend_detach;
1136 }
1137 break;
1138 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
1139 fe0->dvb.frontend = dvb_attach(mt352_attach,
1140 &dvico_fusionhdtv,
1141 &core->i2c_adap);
1142 if (fe0->dvb.frontend) {
1143 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1144 0x61, NULL, DVB_PLL_LG_Z201))
1145 goto frontend_detach;
1146 }
1147 break;
1148 case CX88_BOARD_KWORLD_DVB_T:
1149 case CX88_BOARD_DNTV_LIVE_DVB_T:
1150 case CX88_BOARD_ADSTECH_DVB_T_PCI:
1151 fe0->dvb.frontend = dvb_attach(mt352_attach,
1152 &dntv_live_dvbt_config,
1153 &core->i2c_adap);
1154 if (fe0->dvb.frontend) {
1155 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1156 0x61, NULL, DVB_PLL_UNKNOWN_1))
1157 goto frontend_detach;
1158 }
1159 break;
1160 case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
1161#if IS_ENABLED(CONFIG_VIDEO_CX88_VP3054)
1162
1163 fe0->dvb.frontend = dvb_attach(mt352_attach,
1164 &dntv_live_dvbt_pro_config,
1165 &dev->vp3054->adap);
1166 if (fe0->dvb.frontend) {
1167 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1168 &core->i2c_adap, 0x61,
1169 TUNER_PHILIPS_FMD1216ME_MK3))
1170 goto frontend_detach;
1171 }
1172#else
1173 pr_err("built without vp3054 support\n");
1174#endif
1175 break;
1176 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
1177 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1178 &dvico_fusionhdtv_hybrid,
1179 &core->i2c_adap);
1180 if (fe0->dvb.frontend) {
1181 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1182 &core->i2c_adap, 0x61,
1183 TUNER_THOMSON_FE6600))
1184 goto frontend_detach;
1185 }
1186 break;
1187 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
1188 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1189 &dvico_fusionhdtv_xc3028,
1190 &core->i2c_adap);
1191 if (!fe0->dvb.frontend)
1192 fe0->dvb.frontend = dvb_attach(mt352_attach,
1193 &dvico_fusionhdtv_mt352_xc3028,
1194 &core->i2c_adap);
1195
1196
1197
1198
1199
1200 if (fe0->dvb.frontend)
1201 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1202 if (attach_xc3028(0x61, dev) < 0)
1203 goto frontend_detach;
1204 break;
1205 case CX88_BOARD_PCHDTV_HD3000:
1206 fe0->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
1207 &core->i2c_adap);
1208 if (fe0->dvb.frontend) {
1209 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1210 &core->i2c_adap, 0x61,
1211 TUNER_THOMSON_DTT761X))
1212 goto frontend_detach;
1213 }
1214 break;
1215 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
1216 dev->ts_gen_cntrl = 0x08;
1217
1218
1219 cx_clear(MO_GP0_IO, 1);
1220 msleep(100);
1221 cx_set(MO_GP0_IO, 1);
1222 msleep(200);
1223
1224
1225 fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
1226 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
1227 &fusionhdtv_3_gold,
1228 0x0e,
1229 &core->i2c_adap);
1230 if (fe0->dvb.frontend) {
1231 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1232 &core->i2c_adap, 0x61,
1233 TUNER_MICROTUNE_4042FI5))
1234 goto frontend_detach;
1235 }
1236 break;
1237 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
1238 dev->ts_gen_cntrl = 0x08;
1239
1240
1241 cx_clear(MO_GP0_IO, 1);
1242 msleep(100);
1243 cx_set(MO_GP0_IO, 9);
1244 msleep(200);
1245 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
1246 &fusionhdtv_3_gold,
1247 0x0e,
1248 &core->i2c_adap);
1249 if (fe0->dvb.frontend) {
1250 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1251 &core->i2c_adap, 0x61,
1252 TUNER_THOMSON_DTT761X))
1253 goto frontend_detach;
1254 }
1255 break;
1256 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
1257 dev->ts_gen_cntrl = 0x08;
1258
1259
1260 cx_clear(MO_GP0_IO, 1);
1261 msleep(100);
1262 cx_set(MO_GP0_IO, 1);
1263 msleep(200);
1264 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
1265 &fusionhdtv_5_gold,
1266 0x0e,
1267 &core->i2c_adap);
1268 if (fe0->dvb.frontend) {
1269 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1270 &core->i2c_adap, 0x61,
1271 TUNER_LG_TDVS_H06XF))
1272 goto frontend_detach;
1273 if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
1274 &core->i2c_adap, 0x43))
1275 goto frontend_detach;
1276 }
1277 break;
1278 case CX88_BOARD_PCHDTV_HD5500:
1279 dev->ts_gen_cntrl = 0x08;
1280
1281
1282 cx_clear(MO_GP0_IO, 1);
1283 msleep(100);
1284 cx_set(MO_GP0_IO, 1);
1285 msleep(200);
1286 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
1287 &pchdtv_hd5500,
1288 0x59,
1289 &core->i2c_adap);
1290 if (fe0->dvb.frontend) {
1291 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1292 &core->i2c_adap, 0x61,
1293 TUNER_LG_TDVS_H06XF))
1294 goto frontend_detach;
1295 if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
1296 &core->i2c_adap, 0x43))
1297 goto frontend_detach;
1298 }
1299 break;
1300 case CX88_BOARD_ATI_HDTVWONDER:
1301 fe0->dvb.frontend = dvb_attach(nxt200x_attach,
1302 &ati_hdtvwonder,
1303 &core->i2c_adap);
1304 if (fe0->dvb.frontend) {
1305 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1306 &core->i2c_adap, 0x61,
1307 TUNER_PHILIPS_TUV1236D))
1308 goto frontend_detach;
1309 }
1310 break;
1311 case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
1312 case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
1313 fe0->dvb.frontend = dvb_attach(cx24123_attach,
1314 &hauppauge_novas_config,
1315 &core->i2c_adap);
1316 if (fe0->dvb.frontend) {
1317 bool override_tone;
1318
1319 if (core->model == 92001)
1320 override_tone = true;
1321 else
1322 override_tone = false;
1323
1324 if (!dvb_attach(isl6421_attach, fe0->dvb.frontend,
1325 &core->i2c_adap, 0x08, ISL6421_DCL,
1326 0x00, override_tone))
1327 goto frontend_detach;
1328 }
1329 break;
1330 case CX88_BOARD_KWORLD_DVBS_100:
1331 fe0->dvb.frontend = dvb_attach(cx24123_attach,
1332 &kworld_dvbs_100_config,
1333 &core->i2c_adap);
1334 if (fe0->dvb.frontend) {
1335 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
1336 fe0->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
1337 }
1338 break;
1339 case CX88_BOARD_GENIATECH_DVBS:
1340 fe0->dvb.frontend = dvb_attach(cx24123_attach,
1341 &geniatech_dvbs_config,
1342 &core->i2c_adap);
1343 if (fe0->dvb.frontend) {
1344 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
1345 fe0->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
1346 }
1347 break;
1348 case CX88_BOARD_PINNACLE_PCTV_HD_800i:
1349 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1350 &pinnacle_pctv_hd_800i_config,
1351 &core->i2c_adap);
1352 if (fe0->dvb.frontend) {
1353 if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
1354 &core->i2c_adap,
1355 &pinnacle_pctv_hd_800i_tuner_config))
1356 goto frontend_detach;
1357 }
1358 break;
1359 case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
1360 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1361 &dvico_hdtv5_pci_nano_config,
1362 &core->i2c_adap);
1363 if (fe0->dvb.frontend) {
1364 struct dvb_frontend *fe;
1365 struct xc2028_config cfg = {
1366 .i2c_adap = &core->i2c_adap,
1367 .i2c_addr = 0x61,
1368 };
1369 static struct xc2028_ctrl ctl = {
1370 .fname = XC2028_DEFAULT_FIRMWARE,
1371 .max_len = 64,
1372 .scode_table = XC3028_FE_OREN538,
1373 };
1374
1375 fe = dvb_attach(xc2028_attach,
1376 fe0->dvb.frontend, &cfg);
1377 if (fe && fe->ops.tuner_ops.set_config)
1378 fe->ops.tuner_ops.set_config(fe, &ctl);
1379 }
1380 break;
1381 case CX88_BOARD_PINNACLE_HYBRID_PCTV:
1382 case CX88_BOARD_WINFAST_DTV1800H:
1383 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1384 &cx88_pinnacle_hybrid_pctv,
1385 &core->i2c_adap);
1386 if (fe0->dvb.frontend) {
1387 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1388 if (attach_xc3028(0x61, dev) < 0)
1389 goto frontend_detach;
1390 }
1391 break;
1392 case CX88_BOARD_WINFAST_DTV1800H_XC4000:
1393 case CX88_BOARD_WINFAST_DTV2000H_PLUS:
1394 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1395 &cx88_pinnacle_hybrid_pctv,
1396 &core->i2c_adap);
1397 if (fe0->dvb.frontend) {
1398 struct xc4000_config cfg = {
1399 .i2c_address = 0x61,
1400 .default_pm = 0,
1401 .dvb_amplitude = 134,
1402 .set_smoothedcvbs = 1,
1403 .if_khz = 4560
1404 };
1405 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1406 if (attach_xc4000(dev, &cfg) < 0)
1407 goto frontend_detach;
1408 }
1409 break;
1410 case CX88_BOARD_GENIATECH_X8000_MT:
1411 dev->ts_gen_cntrl = 0x00;
1412
1413 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1414 &cx88_geniatech_x8000_mt,
1415 &core->i2c_adap);
1416 if (attach_xc3028(0x61, dev) < 0)
1417 goto frontend_detach;
1418 break;
1419 case CX88_BOARD_KWORLD_ATSC_120:
1420 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1421 &kworld_atsc_120_config,
1422 &core->i2c_adap);
1423 if (attach_xc3028(0x61, dev) < 0)
1424 goto frontend_detach;
1425 break;
1426 case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD:
1427 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1428 &dvico_fusionhdtv7_config,
1429 &core->i2c_adap);
1430 if (fe0->dvb.frontend) {
1431 if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
1432 &core->i2c_adap,
1433 &dvico_fusionhdtv7_tuner_config))
1434 goto frontend_detach;
1435 }
1436 break;
1437 case CX88_BOARD_HAUPPAUGE_HVR4000:
1438
1439 mfe_shared = 1;
1440 dev->frontends.gate = 2;
1441
1442 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1443 &hauppauge_hvr4000_config,
1444 &dev->core->i2c_adap);
1445 if (fe0->dvb.frontend) {
1446 if (!dvb_attach(isl6421_attach,
1447 fe0->dvb.frontend,
1448 &dev->core->i2c_adap,
1449 0x08, ISL6421_DCL, 0x00, false))
1450 goto frontend_detach;
1451 }
1452
1453 fe1 = vb2_dvb_get_frontend(&dev->frontends, 2);
1454 if (!fe1)
1455 goto frontend_detach;
1456
1457 fe1->dvb.frontend = dvb_attach(cx22702_attach,
1458 &hauppauge_hvr_config,
1459 &dev->core->i2c_adap);
1460 if (fe1->dvb.frontend) {
1461 fe1->dvb.frontend->id = 1;
1462 if (!dvb_attach(simple_tuner_attach,
1463 fe1->dvb.frontend,
1464 &dev->core->i2c_adap,
1465 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
1466 goto frontend_detach;
1467 }
1468 break;
1469 case CX88_BOARD_HAUPPAUGE_HVR4000LITE:
1470 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1471 &hauppauge_hvr4000_config,
1472 &dev->core->i2c_adap);
1473 if (fe0->dvb.frontend) {
1474 if (!dvb_attach(isl6421_attach,
1475 fe0->dvb.frontend,
1476 &dev->core->i2c_adap,
1477 0x08, ISL6421_DCL, 0x00, false))
1478 goto frontend_detach;
1479 }
1480 break;
1481 case CX88_BOARD_PROF_6200:
1482 case CX88_BOARD_TBS_8910:
1483 case CX88_BOARD_TEVII_S420:
1484 fe0->dvb.frontend = dvb_attach(stv0299_attach,
1485 &tevii_tuner_sharp_config,
1486 &core->i2c_adap);
1487 if (fe0->dvb.frontend) {
1488 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60,
1489 &core->i2c_adap, DVB_PLL_OPERA1))
1490 goto frontend_detach;
1491 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
1492 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1493
1494 } else {
1495 fe0->dvb.frontend = dvb_attach(stv0288_attach,
1496 &tevii_tuner_earda_config,
1497 &core->i2c_adap);
1498 if (fe0->dvb.frontend) {
1499 if (!dvb_attach(stb6000_attach,
1500 fe0->dvb.frontend, 0x61,
1501 &core->i2c_adap))
1502 goto frontend_detach;
1503 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
1504 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1505 }
1506 }
1507 break;
1508 case CX88_BOARD_TEVII_S460:
1509 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1510 &tevii_s460_config,
1511 &core->i2c_adap);
1512 if (fe0->dvb.frontend)
1513 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1514 break;
1515 case CX88_BOARD_TEVII_S464:
1516 fe0->dvb.frontend = dvb_attach(ds3000_attach,
1517 &tevii_ds3000_config,
1518 &core->i2c_adap);
1519 if (fe0->dvb.frontend) {
1520 dvb_attach(ts2020_attach, fe0->dvb.frontend,
1521 &tevii_ts2020_config, &core->i2c_adap);
1522 fe0->dvb.frontend->ops.set_voltage =
1523 tevii_dvbs_set_voltage;
1524 }
1525 break;
1526 case CX88_BOARD_OMICOM_SS4_PCI:
1527 case CX88_BOARD_TBS_8920:
1528 case CX88_BOARD_PROF_7300:
1529 case CX88_BOARD_SATTRADE_ST4200:
1530 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1531 &hauppauge_hvr4000_config,
1532 &core->i2c_adap);
1533 if (fe0->dvb.frontend)
1534 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1535 break;
1536 case CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII:
1537 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1538 &cx88_terratec_cinergy_ht_pci_mkii_config,
1539 &core->i2c_adap);
1540 if (fe0->dvb.frontend) {
1541 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1542 if (attach_xc3028(0x61, dev) < 0)
1543 goto frontend_detach;
1544 }
1545 break;
1546 case CX88_BOARD_PROF_7301:{
1547 struct dvb_tuner_ops *tuner_ops = NULL;
1548
1549 fe0->dvb.frontend = dvb_attach(stv0900_attach,
1550 &prof_7301_stv0900_config,
1551 &core->i2c_adap, 0);
1552 if (fe0->dvb.frontend) {
1553 if (!dvb_attach(stb6100_attach, fe0->dvb.frontend,
1554 &prof_7301_stb6100_config,
1555 &core->i2c_adap))
1556 goto frontend_detach;
1557
1558 tuner_ops = &fe0->dvb.frontend->ops.tuner_ops;
1559 tuner_ops->set_frequency = stb6100_set_freq;
1560 tuner_ops->get_frequency = stb6100_get_freq;
1561 tuner_ops->set_bandwidth = stb6100_set_bandw;
1562 tuner_ops->get_bandwidth = stb6100_get_bandw;
1563
1564 core->prev_set_voltage =
1565 fe0->dvb.frontend->ops.set_voltage;
1566 fe0->dvb.frontend->ops.set_voltage =
1567 tevii_dvbs_set_voltage;
1568 }
1569 break;
1570 }
1571 case CX88_BOARD_SAMSUNG_SMT_7020:
1572 dev->ts_gen_cntrl = 0x08;
1573
1574 cx_set(MO_GP0_IO, 0x0101);
1575
1576 cx_clear(MO_GP0_IO, 0x01);
1577 msleep(100);
1578 cx_set(MO_GP0_IO, 0x01);
1579 msleep(200);
1580
1581 fe0->dvb.frontend = dvb_attach(stv0299_attach,
1582 &samsung_stv0299_config,
1583 &dev->core->i2c_adap);
1584 if (fe0->dvb.frontend) {
1585 fe0->dvb.frontend->ops.tuner_ops.set_params =
1586 samsung_smt_7020_tuner_set_params;
1587 fe0->dvb.frontend->tuner_priv =
1588 &dev->core->i2c_adap;
1589 fe0->dvb.frontend->ops.set_voltage =
1590 samsung_smt_7020_set_voltage;
1591 fe0->dvb.frontend->ops.set_tone =
1592 samsung_smt_7020_set_tone;
1593 }
1594
1595 break;
1596 case CX88_BOARD_TWINHAN_VP1027_DVBS:
1597 dev->ts_gen_cntrl = 0x00;
1598 fe0->dvb.frontend = dvb_attach(mb86a16_attach,
1599 &twinhan_vp1027,
1600 &core->i2c_adap);
1601 if (fe0->dvb.frontend) {
1602 core->prev_set_voltage =
1603 fe0->dvb.frontend->ops.set_voltage;
1604 fe0->dvb.frontend->ops.set_voltage =
1605 vp1027_set_voltage;
1606 }
1607 break;
1608
1609 default:
1610 pr_err("The frontend of your DVB/ATSC card isn't supported yet\n");
1611 break;
1612 }
1613
1614 if ((NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend)) {
1615 pr_err("frontend initialization failed\n");
1616 goto frontend_detach;
1617 }
1618
1619 fe0->dvb.frontend->callback = cx88_tuner_callback;
1620
1621
1622 fe0->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
1623 if (fe1)
1624 fe1->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
1625
1626
1627 call_all(core, tuner, standby);
1628
1629
1630 res = vb2_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
1631 &dev->pci->dev, NULL, adapter_nr,
1632 mfe_shared);
1633 if (res)
1634 goto frontend_detach;
1635 return res;
1636
1637frontend_detach:
1638 core->gate_ctrl = NULL;
1639 vb2_dvb_dealloc_frontends(&dev->frontends);
1640 return res;
1641}
1642
1643
1644
1645
1646static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
1647{
1648 struct cx88_core *core = drv->core;
1649 int err = 0;
1650
1651 dprintk(1, "%s\n", __func__);
1652
1653 switch (core->boardnr) {
1654 case CX88_BOARD_HAUPPAUGE_HVR1300:
1655
1656
1657
1658
1659
1660 cx_set(MO_GP0_IO, 0x00000080);
1661 udelay(1000);
1662 cx_clear(MO_GP0_IO, 0x00000080);
1663 udelay(50);
1664 cx_set(MO_GP0_IO, 0x00000080);
1665 udelay(1000);
1666
1667 cx_clear(MO_GP0_IO, 0x00000004);
1668 udelay(1000);
1669 break;
1670
1671 case CX88_BOARD_HAUPPAUGE_HVR3000:
1672 case CX88_BOARD_HAUPPAUGE_HVR4000:
1673
1674 cx_set(MO_GP0_IO, 0x00000080);
1675 udelay(1000);
1676 cx_clear(MO_GP0_IO, 0x00000080);
1677 udelay(50);
1678 cx_set(MO_GP0_IO, 0x00000080);
1679 udelay(1000);
1680 switch (core->dvbdev->frontends.active_fe_id) {
1681 case 1:
1682
1683 cx_set(MO_GP0_IO, 0x00000004);
1684
1685 cx_write(MO_SRST_IO, 1);
1686 core->dvbdev->ts_gen_cntrl = 0x02;
1687 break;
1688 case 2:
1689
1690 cx_write(MO_SRST_IO, 0);
1691
1692 cx_clear(MO_GP0_IO, 0x00000004);
1693 core->dvbdev->ts_gen_cntrl = 0x0c;
1694 break;
1695 }
1696 udelay(1000);
1697 break;
1698
1699 case CX88_BOARD_WINFAST_DTV2000H_PLUS:
1700
1701 cx_write(MO_GP2_IO, 0x0101);
1702 break;
1703
1704 default:
1705 err = -ENODEV;
1706 }
1707 return err;
1708}
1709
1710
1711static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
1712{
1713 struct cx88_core *core = drv->core;
1714 int err = 0;
1715
1716 dprintk(1, "%s\n", __func__);
1717
1718 switch (core->boardnr) {
1719 case CX88_BOARD_HAUPPAUGE_HVR1300:
1720
1721 break;
1722 case CX88_BOARD_HAUPPAUGE_HVR3000:
1723 case CX88_BOARD_HAUPPAUGE_HVR4000:
1724 break;
1725 default:
1726 err = -ENODEV;
1727 }
1728 return err;
1729}
1730
1731static int cx8802_dvb_probe(struct cx8802_driver *drv)
1732{
1733 struct cx88_core *core = drv->core;
1734 struct cx8802_dev *dev = drv->core->dvbdev;
1735 int err;
1736 struct vb2_dvb_frontend *fe;
1737 int i;
1738
1739 dprintk(1, "%s\n", __func__);
1740 dprintk(1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
1741 core->boardnr,
1742 core->name,
1743 core->pci_bus,
1744 core->pci_slot);
1745
1746 err = -ENODEV;
1747 if (!(core->board.mpeg & CX88_MPEG_DVB))
1748 goto fail_core;
1749
1750
1751 err = vp3054_i2c_probe(dev);
1752 if (err != 0)
1753 goto fail_core;
1754
1755
1756 pr_info("cx2388x based DVB/ATSC card\n");
1757 dev->ts_gen_cntrl = 0x0c;
1758
1759 err = cx8802_alloc_frontends(dev);
1760 if (err)
1761 goto fail_core;
1762
1763 for (i = 1; i <= core->board.num_frontends; i++) {
1764 struct vb2_queue *q;
1765
1766 fe = vb2_dvb_get_frontend(&core->dvbdev->frontends, i);
1767 if (!fe) {
1768 pr_err("%s() failed to get frontend(%d)\n",
1769 __func__, i);
1770 err = -ENODEV;
1771 goto fail_probe;
1772 }
1773 q = &fe->dvb.dvbq;
1774 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1775 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
1776 q->gfp_flags = GFP_DMA32;
1777 q->min_buffers_needed = 2;
1778 q->drv_priv = dev;
1779 q->buf_struct_size = sizeof(struct cx88_buffer);
1780 q->ops = &dvb_qops;
1781 q->mem_ops = &vb2_dma_sg_memops;
1782 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1783 q->lock = &core->lock;
1784 q->dev = &dev->pci->dev;
1785
1786 err = vb2_queue_init(q);
1787 if (err < 0)
1788 goto fail_probe;
1789
1790
1791 fe->dvb.name = dev->core->name;
1792 }
1793
1794 err = dvb_register(dev);
1795 if (err)
1796
1797 pr_err("dvb_register failed (err = %d)\n", err);
1798 return err;
1799fail_probe:
1800 vb2_dvb_dealloc_frontends(&core->dvbdev->frontends);
1801fail_core:
1802 return err;
1803}
1804
1805static int cx8802_dvb_remove(struct cx8802_driver *drv)
1806{
1807 struct cx88_core *core = drv->core;
1808 struct cx8802_dev *dev = drv->core->dvbdev;
1809
1810 dprintk(1, "%s\n", __func__);
1811
1812 vb2_dvb_unregister_bus(&dev->frontends);
1813
1814 vp3054_i2c_remove(dev);
1815
1816 core->gate_ctrl = NULL;
1817
1818 return 0;
1819}
1820
1821static struct cx8802_driver cx8802_dvb_driver = {
1822 .type_id = CX88_MPEG_DVB,
1823 .hw_access = CX8802_DRVCTL_SHARED,
1824 .probe = cx8802_dvb_probe,
1825 .remove = cx8802_dvb_remove,
1826 .advise_acquire = cx8802_dvb_advise_acquire,
1827 .advise_release = cx8802_dvb_advise_release,
1828};
1829
1830static int __init dvb_init(void)
1831{
1832 pr_info("cx2388x dvb driver version %s loaded\n", CX88_VERSION);
1833 return cx8802_register_driver(&cx8802_dvb_driver);
1834}
1835
1836static void __exit dvb_fini(void)
1837{
1838 cx8802_unregister_driver(&cx8802_dvb_driver);
1839}
1840
1841module_init(dvb_init);
1842module_exit(dvb_fini);
1843
