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15#include "cx88.h"
16
17#include <linux/init.h>
18#include <linux/list.h>
19#include <linux/module.h>
20#include <linux/kmod.h>
21#include <linux/kernel.h>
22#include <linux/slab.h>
23#include <linux/interrupt.h>
24#include <linux/dma-mapping.h>
25#include <linux/delay.h>
26#include <linux/kthread.h>
27#include <asm/div64.h>
28
29#include <media/v4l2-common.h>
30#include <media/v4l2-ioctl.h>
31#include <media/v4l2-event.h>
32#include <media/i2c/wm8775.h>
33
34MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards");
35MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
36MODULE_LICENSE("GPL v2");
37MODULE_VERSION(CX88_VERSION);
38
39
40
41static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
42static unsigned int vbi_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
43static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
44
45module_param_array(video_nr, int, NULL, 0444);
46module_param_array(vbi_nr, int, NULL, 0444);
47module_param_array(radio_nr, int, NULL, 0444);
48
49MODULE_PARM_DESC(video_nr, "video device numbers");
50MODULE_PARM_DESC(vbi_nr, "vbi device numbers");
51MODULE_PARM_DESC(radio_nr, "radio device numbers");
52
53static unsigned int video_debug;
54module_param(video_debug, int, 0644);
55MODULE_PARM_DESC(video_debug, "enable debug messages [video]");
56
57static unsigned int irq_debug;
58module_param(irq_debug, int, 0644);
59MODULE_PARM_DESC(irq_debug, "enable debug messages [IRQ handler]");
60
61#define dprintk(level, fmt, arg...) do { \
62 if (video_debug >= level) \
63 printk(KERN_DEBUG pr_fmt("%s: video:" fmt), \
64 __func__, ##arg); \
65} while (0)
66
67
68
69
70static const struct cx8800_fmt formats[] = {
71 {
72 .name = "8 bpp, gray",
73 .fourcc = V4L2_PIX_FMT_GREY,
74 .cxformat = ColorFormatY8,
75 .depth = 8,
76 .flags = FORMAT_FLAGS_PACKED,
77 }, {
78 .name = "15 bpp RGB, le",
79 .fourcc = V4L2_PIX_FMT_RGB555,
80 .cxformat = ColorFormatRGB15,
81 .depth = 16,
82 .flags = FORMAT_FLAGS_PACKED,
83 }, {
84 .name = "15 bpp RGB, be",
85 .fourcc = V4L2_PIX_FMT_RGB555X,
86 .cxformat = ColorFormatRGB15 | ColorFormatBSWAP,
87 .depth = 16,
88 .flags = FORMAT_FLAGS_PACKED,
89 }, {
90 .name = "16 bpp RGB, le",
91 .fourcc = V4L2_PIX_FMT_RGB565,
92 .cxformat = ColorFormatRGB16,
93 .depth = 16,
94 .flags = FORMAT_FLAGS_PACKED,
95 }, {
96 .name = "16 bpp RGB, be",
97 .fourcc = V4L2_PIX_FMT_RGB565X,
98 .cxformat = ColorFormatRGB16 | ColorFormatBSWAP,
99 .depth = 16,
100 .flags = FORMAT_FLAGS_PACKED,
101 }, {
102 .name = "24 bpp RGB, le",
103 .fourcc = V4L2_PIX_FMT_BGR24,
104 .cxformat = ColorFormatRGB24,
105 .depth = 24,
106 .flags = FORMAT_FLAGS_PACKED,
107 }, {
108 .name = "32 bpp RGB, le",
109 .fourcc = V4L2_PIX_FMT_BGR32,
110 .cxformat = ColorFormatRGB32,
111 .depth = 32,
112 .flags = FORMAT_FLAGS_PACKED,
113 }, {
114 .name = "32 bpp RGB, be",
115 .fourcc = V4L2_PIX_FMT_RGB32,
116 .cxformat = ColorFormatRGB32 | ColorFormatBSWAP |
117 ColorFormatWSWAP,
118 .depth = 32,
119 .flags = FORMAT_FLAGS_PACKED,
120 }, {
121 .name = "4:2:2, packed, YUYV",
122 .fourcc = V4L2_PIX_FMT_YUYV,
123 .cxformat = ColorFormatYUY2,
124 .depth = 16,
125 .flags = FORMAT_FLAGS_PACKED,
126 }, {
127 .name = "4:2:2, packed, UYVY",
128 .fourcc = V4L2_PIX_FMT_UYVY,
129 .cxformat = ColorFormatYUY2 | ColorFormatBSWAP,
130 .depth = 16,
131 .flags = FORMAT_FLAGS_PACKED,
132 },
133};
134
135static const struct cx8800_fmt *format_by_fourcc(unsigned int fourcc)
136{
137 unsigned int i;
138
139 for (i = 0; i < ARRAY_SIZE(formats); i++)
140 if (formats[i].fourcc == fourcc)
141 return formats + i;
142 return NULL;
143}
144
145
146
147struct cx88_ctrl {
148
149 u32 id;
150 s32 minimum;
151 s32 maximum;
152 u32 step;
153 s32 default_value;
154
155
156 u32 off;
157 u32 reg;
158 u32 sreg;
159 u32 mask;
160 u32 shift;
161};
162
163static const struct cx88_ctrl cx8800_vid_ctls[] = {
164
165 {
166 .id = V4L2_CID_BRIGHTNESS,
167 .minimum = 0x00,
168 .maximum = 0xff,
169 .step = 1,
170 .default_value = 0x7f,
171 .off = 128,
172 .reg = MO_CONTR_BRIGHT,
173 .mask = 0x00ff,
174 .shift = 0,
175 }, {
176 .id = V4L2_CID_CONTRAST,
177 .minimum = 0,
178 .maximum = 0xff,
179 .step = 1,
180 .default_value = 0x3f,
181 .off = 0,
182 .reg = MO_CONTR_BRIGHT,
183 .mask = 0xff00,
184 .shift = 8,
185 }, {
186 .id = V4L2_CID_HUE,
187 .minimum = 0,
188 .maximum = 0xff,
189 .step = 1,
190 .default_value = 0x7f,
191 .off = 128,
192 .reg = MO_HUE,
193 .mask = 0x00ff,
194 .shift = 0,
195 }, {
196
197
198
199 .id = V4L2_CID_SATURATION,
200 .minimum = 0,
201 .maximum = 0xff,
202 .step = 1,
203 .default_value = 0x7f,
204 .off = 0,
205 .reg = MO_UV_SATURATION,
206 .mask = 0x00ff,
207 .shift = 0,
208 }, {
209 .id = V4L2_CID_SHARPNESS,
210 .minimum = 0,
211 .maximum = 4,
212 .step = 1,
213 .default_value = 0x0,
214 .off = 0,
215
216
217
218
219 .reg = MO_FILTER_ODD,
220 .mask = 7 << 7,
221 .shift = 7,
222 }, {
223 .id = V4L2_CID_CHROMA_AGC,
224 .minimum = 0,
225 .maximum = 1,
226 .default_value = 0x1,
227 .reg = MO_INPUT_FORMAT,
228 .mask = 1 << 10,
229 .shift = 10,
230 }, {
231 .id = V4L2_CID_COLOR_KILLER,
232 .minimum = 0,
233 .maximum = 1,
234 .default_value = 0x1,
235 .reg = MO_INPUT_FORMAT,
236 .mask = 1 << 9,
237 .shift = 9,
238 }, {
239 .id = V4L2_CID_BAND_STOP_FILTER,
240 .minimum = 0,
241 .maximum = 1,
242 .step = 1,
243 .default_value = 0x0,
244 .off = 0,
245 .reg = MO_HTOTAL,
246 .mask = 3 << 11,
247 .shift = 11,
248 }
249};
250
251static const struct cx88_ctrl cx8800_aud_ctls[] = {
252 {
253
254 .id = V4L2_CID_AUDIO_MUTE,
255 .minimum = 0,
256 .maximum = 1,
257 .default_value = 1,
258 .reg = AUD_VOL_CTL,
259 .sreg = SHADOW_AUD_VOL_CTL,
260 .mask = (1 << 6),
261 .shift = 6,
262 }, {
263 .id = V4L2_CID_AUDIO_VOLUME,
264 .minimum = 0,
265 .maximum = 0x3f,
266 .step = 1,
267 .default_value = 0x3f,
268 .reg = AUD_VOL_CTL,
269 .sreg = SHADOW_AUD_VOL_CTL,
270 .mask = 0x3f,
271 .shift = 0,
272 }, {
273 .id = V4L2_CID_AUDIO_BALANCE,
274 .minimum = 0,
275 .maximum = 0x7f,
276 .step = 1,
277 .default_value = 0x40,
278 .reg = AUD_BAL_CTL,
279 .sreg = SHADOW_AUD_BAL_CTL,
280 .mask = 0x7f,
281 .shift = 0,
282 }
283};
284
285enum {
286 CX8800_VID_CTLS = ARRAY_SIZE(cx8800_vid_ctls),
287 CX8800_AUD_CTLS = ARRAY_SIZE(cx8800_aud_ctls),
288};
289
290
291
292int cx88_video_mux(struct cx88_core *core, unsigned int input)
293{
294
295
296 dprintk(1, "video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n",
297 input, INPUT(input).vmux,
298 INPUT(input).gpio0, INPUT(input).gpio1,
299 INPUT(input).gpio2, INPUT(input).gpio3);
300 core->input = input;
301 cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input).vmux << 14);
302 cx_write(MO_GP3_IO, INPUT(input).gpio3);
303 cx_write(MO_GP0_IO, INPUT(input).gpio0);
304 cx_write(MO_GP1_IO, INPUT(input).gpio1);
305 cx_write(MO_GP2_IO, INPUT(input).gpio2);
306
307 switch (INPUT(input).type) {
308 case CX88_VMUX_SVIDEO:
309 cx_set(MO_AFECFG_IO, 0x00000001);
310 cx_set(MO_INPUT_FORMAT, 0x00010010);
311 cx_set(MO_FILTER_EVEN, 0x00002020);
312 cx_set(MO_FILTER_ODD, 0x00002020);
313 break;
314 default:
315 cx_clear(MO_AFECFG_IO, 0x00000001);
316 cx_clear(MO_INPUT_FORMAT, 0x00010010);
317 cx_clear(MO_FILTER_EVEN, 0x00002020);
318 cx_clear(MO_FILTER_ODD, 0x00002020);
319 break;
320 }
321
322
323
324
325
326 if (INPUT(input).audioroute) {
327
328
329
330
331
332 if (core->sd_wm8775) {
333 call_all(core, audio, s_routing,
334 INPUT(input).audioroute, 0, 0);
335 }
336
337
338
339
340
341 if (INPUT(input).type != CX88_VMUX_TELEVISION &&
342 INPUT(input).type != CX88_VMUX_CABLE) {
343
344 core->tvaudio = WW_I2SADC;
345 cx88_set_tvaudio(core);
346 } else {
347
348 cx_write(AUD_I2SCNTL, 0x0);
349 cx_clear(AUD_CTL, EN_I2SIN_ENABLE);
350 }
351 }
352
353 return 0;
354}
355EXPORT_SYMBOL(cx88_video_mux);
356
357
358
359static int start_video_dma(struct cx8800_dev *dev,
360 struct cx88_dmaqueue *q,
361 struct cx88_buffer *buf)
362{
363 struct cx88_core *core = dev->core;
364
365
366 cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH21],
367 buf->bpl, buf->risc.dma);
368 cx88_set_scale(core, core->width, core->height, core->field);
369 cx_write(MO_COLOR_CTRL, dev->fmt->cxformat | ColorFormatGamma);
370
371
372 cx_write(MO_VIDY_GPCNTRL, GP_COUNT_CONTROL_RESET);
373 q->count = 0;
374
375
376 cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT);
377
378
379
380
381
382
383
384
385
386 cx_set(MO_VID_INTMSK, 0x0f0011);
387
388
389 cx_set(VID_CAPTURE_CONTROL, 0x06);
390
391
392 cx_set(MO_DEV_CNTRL2, (1 << 5));
393 cx_set(MO_VID_DMACNTRL, 0x11);
394
395 return 0;
396}
397
398#ifdef CONFIG_PM
399static int stop_video_dma(struct cx8800_dev *dev)
400{
401 struct cx88_core *core = dev->core;
402
403
404 cx_clear(MO_VID_DMACNTRL, 0x11);
405
406
407 cx_clear(VID_CAPTURE_CONTROL, 0x06);
408
409
410 cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT);
411 cx_clear(MO_VID_INTMSK, 0x0f0011);
412 return 0;
413}
414
415static int restart_video_queue(struct cx8800_dev *dev,
416 struct cx88_dmaqueue *q)
417{
418 struct cx88_buffer *buf;
419
420 if (!list_empty(&q->active)) {
421 buf = list_entry(q->active.next, struct cx88_buffer, list);
422 dprintk(2, "restart_queue [%p/%d]: restart dma\n",
423 buf, buf->vb.vb2_buf.index);
424 start_video_dma(dev, q, buf);
425 }
426 return 0;
427}
428#endif
429
430
431
432static int queue_setup(struct vb2_queue *q,
433 unsigned int *num_buffers, unsigned int *num_planes,
434 unsigned int sizes[], struct device *alloc_devs[])
435{
436 struct cx8800_dev *dev = q->drv_priv;
437 struct cx88_core *core = dev->core;
438
439 *num_planes = 1;
440 sizes[0] = (dev->fmt->depth * core->width * core->height) >> 3;
441 return 0;
442}
443
444static int buffer_prepare(struct vb2_buffer *vb)
445{
446 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
447 struct cx8800_dev *dev = vb->vb2_queue->drv_priv;
448 struct cx88_core *core = dev->core;
449 struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
450 struct sg_table *sgt = vb2_dma_sg_plane_desc(vb, 0);
451
452 buf->bpl = core->width * dev->fmt->depth >> 3;
453
454 if (vb2_plane_size(vb, 0) < core->height * buf->bpl)
455 return -EINVAL;
456 vb2_set_plane_payload(vb, 0, core->height * buf->bpl);
457
458 switch (core->field) {
459 case V4L2_FIELD_TOP:
460 cx88_risc_buffer(dev->pci, &buf->risc,
461 sgt->sgl, 0, UNSET,
462 buf->bpl, 0, core->height);
463 break;
464 case V4L2_FIELD_BOTTOM:
465 cx88_risc_buffer(dev->pci, &buf->risc,
466 sgt->sgl, UNSET, 0,
467 buf->bpl, 0, core->height);
468 break;
469 case V4L2_FIELD_SEQ_TB:
470 cx88_risc_buffer(dev->pci, &buf->risc,
471 sgt->sgl,
472 0, buf->bpl * (core->height >> 1),
473 buf->bpl, 0,
474 core->height >> 1);
475 break;
476 case V4L2_FIELD_SEQ_BT:
477 cx88_risc_buffer(dev->pci, &buf->risc,
478 sgt->sgl,
479 buf->bpl * (core->height >> 1), 0,
480 buf->bpl, 0,
481 core->height >> 1);
482 break;
483 case V4L2_FIELD_INTERLACED:
484 default:
485 cx88_risc_buffer(dev->pci, &buf->risc,
486 sgt->sgl, 0, buf->bpl,
487 buf->bpl, buf->bpl,
488 core->height >> 1);
489 break;
490 }
491 dprintk(2,
492 "[%p/%d] buffer_prepare - %dx%d %dbpp \"%s\" - dma=0x%08lx\n",
493 buf, buf->vb.vb2_buf.index,
494 core->width, core->height, dev->fmt->depth, dev->fmt->name,
495 (unsigned long)buf->risc.dma);
496 return 0;
497}
498
499static void buffer_finish(struct vb2_buffer *vb)
500{
501 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
502 struct cx8800_dev *dev = vb->vb2_queue->drv_priv;
503 struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
504 struct cx88_riscmem *risc = &buf->risc;
505
506 if (risc->cpu)
507 pci_free_consistent(dev->pci, risc->size, risc->cpu, risc->dma);
508 memset(risc, 0, sizeof(*risc));
509}
510
511static void buffer_queue(struct vb2_buffer *vb)
512{
513 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
514 struct cx8800_dev *dev = vb->vb2_queue->drv_priv;
515 struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
516 struct cx88_buffer *prev;
517 struct cx88_dmaqueue *q = &dev->vidq;
518
519
520 buf->risc.cpu[1] = cpu_to_le32(buf->risc.dma + 8);
521 buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_CNT_INC);
522 buf->risc.jmp[1] = cpu_to_le32(buf->risc.dma + 8);
523
524 if (list_empty(&q->active)) {
525 list_add_tail(&buf->list, &q->active);
526 dprintk(2, "[%p/%d] buffer_queue - first active\n",
527 buf, buf->vb.vb2_buf.index);
528
529 } else {
530 buf->risc.cpu[0] |= cpu_to_le32(RISC_IRQ1);
531 prev = list_entry(q->active.prev, struct cx88_buffer, list);
532 list_add_tail(&buf->list, &q->active);
533 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
534 dprintk(2, "[%p/%d] buffer_queue - append to active\n",
535 buf, buf->vb.vb2_buf.index);
536 }
537}
538
539static int start_streaming(struct vb2_queue *q, unsigned int count)
540{
541 struct cx8800_dev *dev = q->drv_priv;
542 struct cx88_dmaqueue *dmaq = &dev->vidq;
543 struct cx88_buffer *buf = list_entry(dmaq->active.next,
544 struct cx88_buffer, list);
545
546 start_video_dma(dev, dmaq, buf);
547 return 0;
548}
549
550static void stop_streaming(struct vb2_queue *q)
551{
552 struct cx8800_dev *dev = q->drv_priv;
553 struct cx88_core *core = dev->core;
554 struct cx88_dmaqueue *dmaq = &dev->vidq;
555 unsigned long flags;
556
557 cx_clear(MO_VID_DMACNTRL, 0x11);
558 cx_clear(VID_CAPTURE_CONTROL, 0x06);
559 spin_lock_irqsave(&dev->slock, flags);
560 while (!list_empty(&dmaq->active)) {
561 struct cx88_buffer *buf = list_entry(dmaq->active.next,
562 struct cx88_buffer, list);
563
564 list_del(&buf->list);
565 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
566 }
567 spin_unlock_irqrestore(&dev->slock, flags);
568}
569
570static const struct vb2_ops cx8800_video_qops = {
571 .queue_setup = queue_setup,
572 .buf_prepare = buffer_prepare,
573 .buf_finish = buffer_finish,
574 .buf_queue = buffer_queue,
575 .wait_prepare = vb2_ops_wait_prepare,
576 .wait_finish = vb2_ops_wait_finish,
577 .start_streaming = start_streaming,
578 .stop_streaming = stop_streaming,
579};
580
581
582
583static int radio_open(struct file *file)
584{
585 struct cx8800_dev *dev = video_drvdata(file);
586 struct cx88_core *core = dev->core;
587 int ret = v4l2_fh_open(file);
588
589 if (ret)
590 return ret;
591
592 cx_write(MO_GP3_IO, core->board.radio.gpio3);
593 cx_write(MO_GP0_IO, core->board.radio.gpio0);
594 cx_write(MO_GP1_IO, core->board.radio.gpio1);
595 cx_write(MO_GP2_IO, core->board.radio.gpio2);
596 if (core->board.radio.audioroute) {
597 if (core->sd_wm8775) {
598 call_all(core, audio, s_routing,
599 core->board.radio.audioroute, 0, 0);
600 }
601
602 core->tvaudio = WW_I2SADC;
603 cx88_set_tvaudio(core);
604 } else {
605
606 core->tvaudio = WW_FM;
607 cx88_set_tvaudio(core);
608 cx88_set_stereo(core, V4L2_TUNER_MODE_STEREO, 1);
609 }
610 call_all(core, tuner, s_radio);
611 return 0;
612}
613
614
615
616
617static int cx8800_s_vid_ctrl(struct v4l2_ctrl *ctrl)
618{
619 struct cx88_core *core =
620 container_of(ctrl->handler, struct cx88_core, video_hdl);
621 const struct cx88_ctrl *cc = ctrl->priv;
622 u32 value, mask;
623
624 mask = cc->mask;
625 switch (ctrl->id) {
626 case V4L2_CID_SATURATION:
627
628
629 value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
630
631 if (core->tvnorm & V4L2_STD_SECAM) {
632
633 value = value << 8 | value;
634 } else {
635
636 value = (value * 0x5a) / 0x7f << 8 | value;
637 }
638 mask = 0xffff;
639 break;
640 case V4L2_CID_SHARPNESS:
641
642 value = (ctrl->val < 1 ? 0 : ((ctrl->val + 3) << 7));
643
644 cx_andor(MO_FILTER_EVEN, mask, value);
645 break;
646 case V4L2_CID_CHROMA_AGC:
647 value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
648 break;
649 default:
650 value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
651 break;
652 }
653 dprintk(1,
654 "set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
655 ctrl->id, ctrl->name, ctrl->val, cc->reg, value,
656 mask, cc->sreg ? " [shadowed]" : "");
657 if (cc->sreg)
658 cx_sandor(cc->sreg, cc->reg, mask, value);
659 else
660 cx_andor(cc->reg, mask, value);
661 return 0;
662}
663
664static int cx8800_s_aud_ctrl(struct v4l2_ctrl *ctrl)
665{
666 struct cx88_core *core =
667 container_of(ctrl->handler, struct cx88_core, audio_hdl);
668 const struct cx88_ctrl *cc = ctrl->priv;
669 u32 value, mask;
670
671
672 if (core->sd_wm8775) {
673 switch (ctrl->id) {
674 case V4L2_CID_AUDIO_MUTE:
675 wm8775_s_ctrl(core, ctrl->id, ctrl->val);
676 break;
677 case V4L2_CID_AUDIO_VOLUME:
678 wm8775_s_ctrl(core, ctrl->id, (ctrl->val) ?
679 (0x90 + ctrl->val) << 8 : 0);
680 break;
681 case V4L2_CID_AUDIO_BALANCE:
682 wm8775_s_ctrl(core, ctrl->id, ctrl->val << 9);
683 break;
684 default:
685 break;
686 }
687 }
688
689 mask = cc->mask;
690 switch (ctrl->id) {
691 case V4L2_CID_AUDIO_BALANCE:
692 value = (ctrl->val < 0x40) ?
693 (0x7f - ctrl->val) : (ctrl->val - 0x40);
694 break;
695 case V4L2_CID_AUDIO_VOLUME:
696 value = 0x3f - (ctrl->val & 0x3f);
697 break;
698 default:
699 value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
700 break;
701 }
702 dprintk(1,
703 "set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
704 ctrl->id, ctrl->name, ctrl->val, cc->reg, value,
705 mask, cc->sreg ? " [shadowed]" : "");
706 if (cc->sreg)
707 cx_sandor(cc->sreg, cc->reg, mask, value);
708 else
709 cx_andor(cc->reg, mask, value);
710 return 0;
711}
712
713
714
715
716static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
717 struct v4l2_format *f)
718{
719 struct cx8800_dev *dev = video_drvdata(file);
720 struct cx88_core *core = dev->core;
721
722 f->fmt.pix.width = core->width;
723 f->fmt.pix.height = core->height;
724 f->fmt.pix.field = core->field;
725 f->fmt.pix.pixelformat = dev->fmt->fourcc;
726 f->fmt.pix.bytesperline =
727 (f->fmt.pix.width * dev->fmt->depth) >> 3;
728 f->fmt.pix.sizeimage =
729 f->fmt.pix.height * f->fmt.pix.bytesperline;
730 f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
731 return 0;
732}
733
734static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
735 struct v4l2_format *f)
736{
737 struct cx8800_dev *dev = video_drvdata(file);
738 struct cx88_core *core = dev->core;
739 const struct cx8800_fmt *fmt;
740 enum v4l2_field field;
741 unsigned int maxw, maxh;
742
743 fmt = format_by_fourcc(f->fmt.pix.pixelformat);
744 if (!fmt)
745 return -EINVAL;
746
747 maxw = norm_maxw(core->tvnorm);
748 maxh = norm_maxh(core->tvnorm);
749
750 field = f->fmt.pix.field;
751
752 switch (field) {
753 case V4L2_FIELD_TOP:
754 case V4L2_FIELD_BOTTOM:
755 case V4L2_FIELD_INTERLACED:
756 case V4L2_FIELD_SEQ_BT:
757 case V4L2_FIELD_SEQ_TB:
758 break;
759 default:
760 field = (f->fmt.pix.height > maxh / 2)
761 ? V4L2_FIELD_INTERLACED
762 : V4L2_FIELD_BOTTOM;
763 break;
764 }
765 if (V4L2_FIELD_HAS_T_OR_B(field))
766 maxh /= 2;
767
768 v4l_bound_align_image(&f->fmt.pix.width, 48, maxw, 2,
769 &f->fmt.pix.height, 32, maxh, 0, 0);
770 f->fmt.pix.field = field;
771 f->fmt.pix.bytesperline =
772 (f->fmt.pix.width * fmt->depth) >> 3;
773 f->fmt.pix.sizeimage =
774 f->fmt.pix.height * f->fmt.pix.bytesperline;
775 f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
776
777 return 0;
778}
779
780static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
781 struct v4l2_format *f)
782{
783 struct cx8800_dev *dev = video_drvdata(file);
784 struct cx88_core *core = dev->core;
785 int err = vidioc_try_fmt_vid_cap(file, priv, f);
786
787 if (err != 0)
788 return err;
789 if (vb2_is_busy(&dev->vb2_vidq) || vb2_is_busy(&dev->vb2_vbiq))
790 return -EBUSY;
791 if (core->dvbdev && vb2_is_busy(&core->dvbdev->vb2_mpegq))
792 return -EBUSY;
793 dev->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
794 core->width = f->fmt.pix.width;
795 core->height = f->fmt.pix.height;
796 core->field = f->fmt.pix.field;
797 return 0;
798}
799
800int cx88_querycap(struct file *file, struct cx88_core *core,
801 struct v4l2_capability *cap)
802{
803 strscpy(cap->card, core->board.name, sizeof(cap->card));
804 cap->capabilities = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING |
805 V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VBI_CAPTURE |
806 V4L2_CAP_DEVICE_CAPS;
807 if (core->board.tuner_type != UNSET)
808 cap->capabilities |= V4L2_CAP_TUNER;
809 if (core->board.radio.type == CX88_RADIO)
810 cap->capabilities |= V4L2_CAP_RADIO;
811 return 0;
812}
813EXPORT_SYMBOL(cx88_querycap);
814
815static int vidioc_querycap(struct file *file, void *priv,
816 struct v4l2_capability *cap)
817{
818 struct cx8800_dev *dev = video_drvdata(file);
819 struct cx88_core *core = dev->core;
820
821 strscpy(cap->driver, "cx8800", sizeof(cap->driver));
822 sprintf(cap->bus_info, "PCI:%s", pci_name(dev->pci));
823 return cx88_querycap(file, core, cap);
824}
825
826static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
827 struct v4l2_fmtdesc *f)
828{
829 if (unlikely(f->index >= ARRAY_SIZE(formats)))
830 return -EINVAL;
831
832 strscpy(f->description, formats[f->index].name, sizeof(f->description));
833 f->pixelformat = formats[f->index].fourcc;
834
835 return 0;
836}
837
838static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *tvnorm)
839{
840 struct cx8800_dev *dev = video_drvdata(file);
841 struct cx88_core *core = dev->core;
842
843 *tvnorm = core->tvnorm;
844 return 0;
845}
846
847static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id tvnorms)
848{
849 struct cx8800_dev *dev = video_drvdata(file);
850 struct cx88_core *core = dev->core;
851
852 return cx88_set_tvnorm(core, tvnorms);
853}
854
855
856int cx88_enum_input(struct cx88_core *core, struct v4l2_input *i)
857{
858 static const char * const iname[] = {
859 [CX88_VMUX_COMPOSITE1] = "Composite1",
860 [CX88_VMUX_COMPOSITE2] = "Composite2",
861 [CX88_VMUX_COMPOSITE3] = "Composite3",
862 [CX88_VMUX_COMPOSITE4] = "Composite4",
863 [CX88_VMUX_SVIDEO] = "S-Video",
864 [CX88_VMUX_TELEVISION] = "Television",
865 [CX88_VMUX_CABLE] = "Cable TV",
866 [CX88_VMUX_DVB] = "DVB",
867 [CX88_VMUX_DEBUG] = "for debug only",
868 };
869 unsigned int n = i->index;
870
871 if (n >= 4)
872 return -EINVAL;
873 if (!INPUT(n).type)
874 return -EINVAL;
875 i->type = V4L2_INPUT_TYPE_CAMERA;
876 strscpy(i->name, iname[INPUT(n).type], sizeof(i->name));
877 if ((INPUT(n).type == CX88_VMUX_TELEVISION) ||
878 (INPUT(n).type == CX88_VMUX_CABLE))
879 i->type = V4L2_INPUT_TYPE_TUNER;
880
881 i->std = CX88_NORMS;
882 return 0;
883}
884EXPORT_SYMBOL(cx88_enum_input);
885
886static int vidioc_enum_input(struct file *file, void *priv,
887 struct v4l2_input *i)
888{
889 struct cx8800_dev *dev = video_drvdata(file);
890 struct cx88_core *core = dev->core;
891
892 return cx88_enum_input(core, i);
893}
894
895static int vidioc_g_input(struct file *file, void *priv, unsigned int *i)
896{
897 struct cx8800_dev *dev = video_drvdata(file);
898 struct cx88_core *core = dev->core;
899
900 *i = core->input;
901 return 0;
902}
903
904static int vidioc_s_input(struct file *file, void *priv, unsigned int i)
905{
906 struct cx8800_dev *dev = video_drvdata(file);
907 struct cx88_core *core = dev->core;
908
909 if (i >= 4)
910 return -EINVAL;
911 if (!INPUT(i).type)
912 return -EINVAL;
913
914 cx88_newstation(core);
915 cx88_video_mux(core, i);
916 return 0;
917}
918
919static int vidioc_g_tuner(struct file *file, void *priv,
920 struct v4l2_tuner *t)
921{
922 struct cx8800_dev *dev = video_drvdata(file);
923 struct cx88_core *core = dev->core;
924 u32 reg;
925
926 if (unlikely(core->board.tuner_type == UNSET))
927 return -EINVAL;
928 if (t->index != 0)
929 return -EINVAL;
930
931 strscpy(t->name, "Television", sizeof(t->name));
932 t->capability = V4L2_TUNER_CAP_NORM;
933 t->rangehigh = 0xffffffffUL;
934 call_all(core, tuner, g_tuner, t);
935
936 cx88_get_stereo(core, t);
937 reg = cx_read(MO_DEVICE_STATUS);
938 t->signal = (reg & (1 << 5)) ? 0xffff : 0x0000;
939 return 0;
940}
941
942static int vidioc_s_tuner(struct file *file, void *priv,
943 const struct v4l2_tuner *t)
944{
945 struct cx8800_dev *dev = video_drvdata(file);
946 struct cx88_core *core = dev->core;
947
948 if (core->board.tuner_type == UNSET)
949 return -EINVAL;
950 if (t->index != 0)
951 return -EINVAL;
952
953 cx88_set_stereo(core, t->audmode, 1);
954 return 0;
955}
956
957static int vidioc_g_frequency(struct file *file, void *priv,
958 struct v4l2_frequency *f)
959{
960 struct cx8800_dev *dev = video_drvdata(file);
961 struct cx88_core *core = dev->core;
962
963 if (unlikely(core->board.tuner_type == UNSET))
964 return -EINVAL;
965 if (f->tuner)
966 return -EINVAL;
967
968 f->frequency = core->freq;
969
970 call_all(core, tuner, g_frequency, f);
971
972 return 0;
973}
974
975int cx88_set_freq(struct cx88_core *core,
976 const struct v4l2_frequency *f)
977{
978 struct v4l2_frequency new_freq = *f;
979
980 if (unlikely(core->board.tuner_type == UNSET))
981 return -EINVAL;
982 if (unlikely(f->tuner != 0))
983 return -EINVAL;
984
985 cx88_newstation(core);
986 call_all(core, tuner, s_frequency, f);
987 call_all(core, tuner, g_frequency, &new_freq);
988 core->freq = new_freq.frequency;
989
990
991 usleep_range(10000, 20000);
992 cx88_set_tvaudio(core);
993
994 return 0;
995}
996EXPORT_SYMBOL(cx88_set_freq);
997
998static int vidioc_s_frequency(struct file *file, void *priv,
999 const struct v4l2_frequency *f)
1000{
1001 struct cx8800_dev *dev = video_drvdata(file);
1002 struct cx88_core *core = dev->core;
1003
1004 return cx88_set_freq(core, f);
1005}
1006
1007#ifdef CONFIG_VIDEO_ADV_DEBUG
1008static int vidioc_g_register(struct file *file, void *fh,
1009 struct v4l2_dbg_register *reg)
1010{
1011 struct cx8800_dev *dev = video_drvdata(file);
1012 struct cx88_core *core = dev->core;
1013
1014
1015 reg->val = cx_read(reg->reg & 0xfffffc);
1016 reg->size = 4;
1017 return 0;
1018}
1019
1020static int vidioc_s_register(struct file *file, void *fh,
1021 const struct v4l2_dbg_register *reg)
1022{
1023 struct cx8800_dev *dev = video_drvdata(file);
1024 struct cx88_core *core = dev->core;
1025
1026 cx_write(reg->reg & 0xfffffc, reg->val);
1027 return 0;
1028}
1029#endif
1030
1031
1032
1033
1034
1035static int radio_g_tuner(struct file *file, void *priv,
1036 struct v4l2_tuner *t)
1037{
1038 struct cx8800_dev *dev = video_drvdata(file);
1039 struct cx88_core *core = dev->core;
1040
1041 if (unlikely(t->index > 0))
1042 return -EINVAL;
1043
1044 strscpy(t->name, "Radio", sizeof(t->name));
1045
1046 call_all(core, tuner, g_tuner, t);
1047 return 0;
1048}
1049
1050static int radio_s_tuner(struct file *file, void *priv,
1051 const struct v4l2_tuner *t)
1052{
1053 struct cx8800_dev *dev = video_drvdata(file);
1054 struct cx88_core *core = dev->core;
1055
1056 if (t->index != 0)
1057 return -EINVAL;
1058
1059 call_all(core, tuner, s_tuner, t);
1060 return 0;
1061}
1062
1063
1064
1065static const char *cx88_vid_irqs[32] = {
1066 "y_risci1", "u_risci1", "v_risci1", "vbi_risc1",
1067 "y_risci2", "u_risci2", "v_risci2", "vbi_risc2",
1068 "y_oflow", "u_oflow", "v_oflow", "vbi_oflow",
1069 "y_sync", "u_sync", "v_sync", "vbi_sync",
1070 "opc_err", "par_err", "rip_err", "pci_abort",
1071};
1072
1073static void cx8800_vid_irq(struct cx8800_dev *dev)
1074{
1075 struct cx88_core *core = dev->core;
1076 u32 status, mask, count;
1077
1078 status = cx_read(MO_VID_INTSTAT);
1079 mask = cx_read(MO_VID_INTMSK);
1080 if (0 == (status & mask))
1081 return;
1082 cx_write(MO_VID_INTSTAT, status);
1083 if (irq_debug || (status & mask & ~0xff))
1084 cx88_print_irqbits("irq vid",
1085 cx88_vid_irqs, ARRAY_SIZE(cx88_vid_irqs),
1086 status, mask);
1087
1088
1089 if (status & (1 << 16)) {
1090 pr_warn("video risc op code error\n");
1091 cx_clear(MO_VID_DMACNTRL, 0x11);
1092 cx_clear(VID_CAPTURE_CONTROL, 0x06);
1093 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
1094 }
1095
1096
1097 if (status & 0x01) {
1098 spin_lock(&dev->slock);
1099 count = cx_read(MO_VIDY_GPCNT);
1100 cx88_wakeup(core, &dev->vidq, count);
1101 spin_unlock(&dev->slock);
1102 }
1103
1104
1105 if (status & 0x08) {
1106 spin_lock(&dev->slock);
1107 count = cx_read(MO_VBI_GPCNT);
1108 cx88_wakeup(core, &dev->vbiq, count);
1109 spin_unlock(&dev->slock);
1110 }
1111}
1112
1113static irqreturn_t cx8800_irq(int irq, void *dev_id)
1114{
1115 struct cx8800_dev *dev = dev_id;
1116 struct cx88_core *core = dev->core;
1117 u32 status;
1118 int loop, handled = 0;
1119
1120 for (loop = 0; loop < 10; loop++) {
1121 status = cx_read(MO_PCI_INTSTAT) &
1122 (core->pci_irqmask | PCI_INT_VIDINT);
1123 if (status == 0)
1124 goto out;
1125 cx_write(MO_PCI_INTSTAT, status);
1126 handled = 1;
1127
1128 if (status & core->pci_irqmask)
1129 cx88_core_irq(core, status);
1130 if (status & PCI_INT_VIDINT)
1131 cx8800_vid_irq(dev);
1132 }
1133 if (loop == 10) {
1134 pr_warn("irq loop -- clearing mask\n");
1135 cx_write(MO_PCI_INTMSK, 0);
1136 }
1137
1138 out:
1139 return IRQ_RETVAL(handled);
1140}
1141
1142
1143
1144
1145static const struct v4l2_file_operations video_fops = {
1146 .owner = THIS_MODULE,
1147 .open = v4l2_fh_open,
1148 .release = vb2_fop_release,
1149 .read = vb2_fop_read,
1150 .poll = vb2_fop_poll,
1151 .mmap = vb2_fop_mmap,
1152 .unlocked_ioctl = video_ioctl2,
1153};
1154
1155static const struct v4l2_ioctl_ops video_ioctl_ops = {
1156 .vidioc_querycap = vidioc_querycap,
1157 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
1158 .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
1159 .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
1160 .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
1161 .vidioc_reqbufs = vb2_ioctl_reqbufs,
1162 .vidioc_querybuf = vb2_ioctl_querybuf,
1163 .vidioc_qbuf = vb2_ioctl_qbuf,
1164 .vidioc_dqbuf = vb2_ioctl_dqbuf,
1165 .vidioc_g_std = vidioc_g_std,
1166 .vidioc_s_std = vidioc_s_std,
1167 .vidioc_enum_input = vidioc_enum_input,
1168 .vidioc_g_input = vidioc_g_input,
1169 .vidioc_s_input = vidioc_s_input,
1170 .vidioc_streamon = vb2_ioctl_streamon,
1171 .vidioc_streamoff = vb2_ioctl_streamoff,
1172 .vidioc_g_tuner = vidioc_g_tuner,
1173 .vidioc_s_tuner = vidioc_s_tuner,
1174 .vidioc_g_frequency = vidioc_g_frequency,
1175 .vidioc_s_frequency = vidioc_s_frequency,
1176 .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
1177 .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
1178#ifdef CONFIG_VIDEO_ADV_DEBUG
1179 .vidioc_g_register = vidioc_g_register,
1180 .vidioc_s_register = vidioc_s_register,
1181#endif
1182};
1183
1184static const struct video_device cx8800_video_template = {
1185 .name = "cx8800-video",
1186 .fops = &video_fops,
1187 .ioctl_ops = &video_ioctl_ops,
1188 .tvnorms = CX88_NORMS,
1189};
1190
1191static const struct v4l2_ioctl_ops vbi_ioctl_ops = {
1192 .vidioc_querycap = vidioc_querycap,
1193 .vidioc_g_fmt_vbi_cap = cx8800_vbi_fmt,
1194 .vidioc_try_fmt_vbi_cap = cx8800_vbi_fmt,
1195 .vidioc_s_fmt_vbi_cap = cx8800_vbi_fmt,
1196 .vidioc_reqbufs = vb2_ioctl_reqbufs,
1197 .vidioc_querybuf = vb2_ioctl_querybuf,
1198 .vidioc_qbuf = vb2_ioctl_qbuf,
1199 .vidioc_dqbuf = vb2_ioctl_dqbuf,
1200 .vidioc_g_std = vidioc_g_std,
1201 .vidioc_s_std = vidioc_s_std,
1202 .vidioc_enum_input = vidioc_enum_input,
1203 .vidioc_g_input = vidioc_g_input,
1204 .vidioc_s_input = vidioc_s_input,
1205 .vidioc_streamon = vb2_ioctl_streamon,
1206 .vidioc_streamoff = vb2_ioctl_streamoff,
1207 .vidioc_g_tuner = vidioc_g_tuner,
1208 .vidioc_s_tuner = vidioc_s_tuner,
1209 .vidioc_g_frequency = vidioc_g_frequency,
1210 .vidioc_s_frequency = vidioc_s_frequency,
1211#ifdef CONFIG_VIDEO_ADV_DEBUG
1212 .vidioc_g_register = vidioc_g_register,
1213 .vidioc_s_register = vidioc_s_register,
1214#endif
1215};
1216
1217static const struct video_device cx8800_vbi_template = {
1218 .name = "cx8800-vbi",
1219 .fops = &video_fops,
1220 .ioctl_ops = &vbi_ioctl_ops,
1221 .tvnorms = CX88_NORMS,
1222};
1223
1224static const struct v4l2_file_operations radio_fops = {
1225 .owner = THIS_MODULE,
1226 .open = radio_open,
1227 .poll = v4l2_ctrl_poll,
1228 .release = v4l2_fh_release,
1229 .unlocked_ioctl = video_ioctl2,
1230};
1231
1232static const struct v4l2_ioctl_ops radio_ioctl_ops = {
1233 .vidioc_querycap = vidioc_querycap,
1234 .vidioc_g_tuner = radio_g_tuner,
1235 .vidioc_s_tuner = radio_s_tuner,
1236 .vidioc_g_frequency = vidioc_g_frequency,
1237 .vidioc_s_frequency = vidioc_s_frequency,
1238 .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
1239 .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
1240#ifdef CONFIG_VIDEO_ADV_DEBUG
1241 .vidioc_g_register = vidioc_g_register,
1242 .vidioc_s_register = vidioc_s_register,
1243#endif
1244};
1245
1246static const struct video_device cx8800_radio_template = {
1247 .name = "cx8800-radio",
1248 .fops = &radio_fops,
1249 .ioctl_ops = &radio_ioctl_ops,
1250};
1251
1252static const struct v4l2_ctrl_ops cx8800_ctrl_vid_ops = {
1253 .s_ctrl = cx8800_s_vid_ctrl,
1254};
1255
1256static const struct v4l2_ctrl_ops cx8800_ctrl_aud_ops = {
1257 .s_ctrl = cx8800_s_aud_ctrl,
1258};
1259
1260
1261
1262static void cx8800_unregister_video(struct cx8800_dev *dev)
1263{
1264 video_unregister_device(&dev->radio_dev);
1265 video_unregister_device(&dev->vbi_dev);
1266 video_unregister_device(&dev->video_dev);
1267}
1268
1269static int cx8800_initdev(struct pci_dev *pci_dev,
1270 const struct pci_device_id *pci_id)
1271{
1272 struct cx8800_dev *dev;
1273 struct cx88_core *core;
1274 struct vb2_queue *q;
1275 int err;
1276 int i;
1277
1278 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1279 if (!dev)
1280 return -ENOMEM;
1281
1282
1283 dev->pci = pci_dev;
1284 if (pci_enable_device(pci_dev)) {
1285 err = -EIO;
1286 goto fail_free;
1287 }
1288 core = cx88_core_get(dev->pci);
1289 if (!core) {
1290 err = -EINVAL;
1291 goto fail_free;
1292 }
1293 dev->core = core;
1294
1295
1296 dev->pci_rev = pci_dev->revision;
1297 pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat);
1298 pr_info("found at %s, rev: %d, irq: %d, latency: %d, mmio: 0x%llx\n",
1299 pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
1300 dev->pci_lat,
1301 (unsigned long long)pci_resource_start(pci_dev, 0));
1302
1303 pci_set_master(pci_dev);
1304 err = pci_set_dma_mask(pci_dev, DMA_BIT_MASK(32));
1305 if (err) {
1306 pr_err("Oops: no 32bit PCI DMA ???\n");
1307 goto fail_core;
1308 }
1309
1310
1311 spin_lock_init(&dev->slock);
1312
1313
1314 INIT_LIST_HEAD(&dev->vidq.active);
1315
1316
1317 INIT_LIST_HEAD(&dev->vbiq.active);
1318
1319
1320 err = request_irq(pci_dev->irq, cx8800_irq,
1321 IRQF_SHARED, core->name, dev);
1322 if (err < 0) {
1323 pr_err("can't get IRQ %d\n", pci_dev->irq);
1324 goto fail_core;
1325 }
1326 cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1327
1328 for (i = 0; i < CX8800_AUD_CTLS; i++) {
1329 const struct cx88_ctrl *cc = &cx8800_aud_ctls[i];
1330 struct v4l2_ctrl *vc;
1331
1332 vc = v4l2_ctrl_new_std(&core->audio_hdl, &cx8800_ctrl_aud_ops,
1333 cc->id, cc->minimum, cc->maximum,
1334 cc->step, cc->default_value);
1335 if (!vc) {
1336 err = core->audio_hdl.error;
1337 goto fail_core;
1338 }
1339 vc->priv = (void *)cc;
1340 }
1341
1342 for (i = 0; i < CX8800_VID_CTLS; i++) {
1343 const struct cx88_ctrl *cc = &cx8800_vid_ctls[i];
1344 struct v4l2_ctrl *vc;
1345
1346 vc = v4l2_ctrl_new_std(&core->video_hdl, &cx8800_ctrl_vid_ops,
1347 cc->id, cc->minimum, cc->maximum,
1348 cc->step, cc->default_value);
1349 if (!vc) {
1350 err = core->video_hdl.error;
1351 goto fail_core;
1352 }
1353 vc->priv = (void *)cc;
1354 if (vc->id == V4L2_CID_CHROMA_AGC)
1355 core->chroma_agc = vc;
1356 }
1357 v4l2_ctrl_add_handler(&core->video_hdl, &core->audio_hdl, NULL, false);
1358
1359
1360
1361 if (core->board.audio_chip == CX88_AUDIO_WM8775) {
1362 struct i2c_board_info wm8775_info = {
1363 .type = "wm8775",
1364 .addr = 0x36 >> 1,
1365 .platform_data = &core->wm8775_data,
1366 };
1367 struct v4l2_subdev *sd;
1368
1369 if (core->boardnr == CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1)
1370 core->wm8775_data.is_nova_s = true;
1371 else
1372 core->wm8775_data.is_nova_s = false;
1373
1374 sd = v4l2_i2c_new_subdev_board(&core->v4l2_dev, &core->i2c_adap,
1375 &wm8775_info, NULL);
1376 if (sd) {
1377 core->sd_wm8775 = sd;
1378 sd->grp_id = WM8775_GID;
1379 }
1380 }
1381
1382 if (core->board.audio_chip == CX88_AUDIO_TVAUDIO) {
1383
1384
1385
1386
1387 v4l2_i2c_new_subdev(&core->v4l2_dev, &core->i2c_adap,
1388 "tvaudio", 0, I2C_ADDRS(0xb0 >> 1));
1389 }
1390
1391 switch (core->boardnr) {
1392 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
1393 case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD: {
1394 static const struct i2c_board_info rtc_info = {
1395 I2C_BOARD_INFO("isl1208", 0x6f)
1396 };
1397
1398 request_module("rtc-isl1208");
1399 core->i2c_rtc = i2c_new_device(&core->i2c_adap, &rtc_info);
1400 }
1401
1402 case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
1403 request_module("ir-kbd-i2c");
1404 }
1405
1406
1407 pci_set_drvdata(pci_dev, dev);
1408
1409 dev->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24);
1410
1411
1412 core->v4ldev = dev;
1413
1414
1415 mutex_lock(&core->lock);
1416 cx88_set_tvnorm(core, V4L2_STD_NTSC_M);
1417 v4l2_ctrl_handler_setup(&core->video_hdl);
1418 v4l2_ctrl_handler_setup(&core->audio_hdl);
1419 cx88_video_mux(core, 0);
1420
1421 q = &dev->vb2_vidq;
1422 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1423 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
1424 q->gfp_flags = GFP_DMA32;
1425 q->min_buffers_needed = 2;
1426 q->drv_priv = dev;
1427 q->buf_struct_size = sizeof(struct cx88_buffer);
1428 q->ops = &cx8800_video_qops;
1429 q->mem_ops = &vb2_dma_sg_memops;
1430 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1431 q->lock = &core->lock;
1432 q->dev = &dev->pci->dev;
1433
1434 err = vb2_queue_init(q);
1435 if (err < 0)
1436 goto fail_unreg;
1437
1438 q = &dev->vb2_vbiq;
1439 q->type = V4L2_BUF_TYPE_VBI_CAPTURE;
1440 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
1441 q->gfp_flags = GFP_DMA32;
1442 q->min_buffers_needed = 2;
1443 q->drv_priv = dev;
1444 q->buf_struct_size = sizeof(struct cx88_buffer);
1445 q->ops = &cx8800_vbi_qops;
1446 q->mem_ops = &vb2_dma_sg_memops;
1447 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1448 q->lock = &core->lock;
1449 q->dev = &dev->pci->dev;
1450
1451 err = vb2_queue_init(q);
1452 if (err < 0)
1453 goto fail_unreg;
1454
1455
1456 cx88_vdev_init(core, dev->pci, &dev->video_dev,
1457 &cx8800_video_template, "video");
1458 video_set_drvdata(&dev->video_dev, dev);
1459 dev->video_dev.ctrl_handler = &core->video_hdl;
1460 dev->video_dev.queue = &dev->vb2_vidq;
1461 dev->video_dev.device_caps = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING |
1462 V4L2_CAP_VIDEO_CAPTURE;
1463 if (core->board.tuner_type != UNSET)
1464 dev->video_dev.device_caps |= V4L2_CAP_TUNER;
1465 err = video_register_device(&dev->video_dev, VFL_TYPE_GRABBER,
1466 video_nr[core->nr]);
1467 if (err < 0) {
1468 pr_err("can't register video device\n");
1469 goto fail_unreg;
1470 }
1471 pr_info("registered device %s [v4l2]\n",
1472 video_device_node_name(&dev->video_dev));
1473
1474 cx88_vdev_init(core, dev->pci, &dev->vbi_dev,
1475 &cx8800_vbi_template, "vbi");
1476 video_set_drvdata(&dev->vbi_dev, dev);
1477 dev->vbi_dev.queue = &dev->vb2_vbiq;
1478 dev->vbi_dev.device_caps = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING |
1479 V4L2_CAP_VBI_CAPTURE;
1480 if (core->board.tuner_type != UNSET)
1481 dev->vbi_dev.device_caps |= V4L2_CAP_TUNER;
1482 err = video_register_device(&dev->vbi_dev, VFL_TYPE_VBI,
1483 vbi_nr[core->nr]);
1484 if (err < 0) {
1485 pr_err("can't register vbi device\n");
1486 goto fail_unreg;
1487 }
1488 pr_info("registered device %s\n",
1489 video_device_node_name(&dev->vbi_dev));
1490
1491 if (core->board.radio.type == CX88_RADIO) {
1492 cx88_vdev_init(core, dev->pci, &dev->radio_dev,
1493 &cx8800_radio_template, "radio");
1494 video_set_drvdata(&dev->radio_dev, dev);
1495 dev->radio_dev.ctrl_handler = &core->audio_hdl;
1496 dev->radio_dev.device_caps = V4L2_CAP_RADIO | V4L2_CAP_TUNER;
1497 err = video_register_device(&dev->radio_dev, VFL_TYPE_RADIO,
1498 radio_nr[core->nr]);
1499 if (err < 0) {
1500 pr_err("can't register radio device\n");
1501 goto fail_unreg;
1502 }
1503 pr_info("registered device %s\n",
1504 video_device_node_name(&dev->radio_dev));
1505 }
1506
1507
1508 if (core->board.tuner_type != UNSET) {
1509 core->kthread = kthread_run(cx88_audio_thread,
1510 core, "cx88 tvaudio");
1511 if (IS_ERR(core->kthread)) {
1512 err = PTR_ERR(core->kthread);
1513 pr_err("failed to create cx88 audio thread, err=%d\n",
1514 err);
1515 }
1516 }
1517 mutex_unlock(&core->lock);
1518
1519 return 0;
1520
1521fail_unreg:
1522 cx8800_unregister_video(dev);
1523 free_irq(pci_dev->irq, dev);
1524 mutex_unlock(&core->lock);
1525fail_core:
1526 core->v4ldev = NULL;
1527 cx88_core_put(core, dev->pci);
1528fail_free:
1529 kfree(dev);
1530 return err;
1531}
1532
1533static void cx8800_finidev(struct pci_dev *pci_dev)
1534{
1535 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1536 struct cx88_core *core = dev->core;
1537
1538
1539 if (core->kthread) {
1540 kthread_stop(core->kthread);
1541 core->kthread = NULL;
1542 }
1543
1544 if (core->ir)
1545 cx88_ir_stop(core);
1546
1547 cx88_shutdown(core);
1548
1549
1550
1551 free_irq(pci_dev->irq, dev);
1552 cx8800_unregister_video(dev);
1553 pci_disable_device(pci_dev);
1554
1555 core->v4ldev = NULL;
1556
1557
1558 cx88_core_put(core, dev->pci);
1559 kfree(dev);
1560}
1561
1562#ifdef CONFIG_PM
1563static int cx8800_suspend(struct pci_dev *pci_dev, pm_message_t state)
1564{
1565 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1566 struct cx88_core *core = dev->core;
1567 unsigned long flags;
1568
1569
1570 spin_lock_irqsave(&dev->slock, flags);
1571 if (!list_empty(&dev->vidq.active)) {
1572 pr_info("suspend video\n");
1573 stop_video_dma(dev);
1574 }
1575 if (!list_empty(&dev->vbiq.active)) {
1576 pr_info("suspend vbi\n");
1577 cx8800_stop_vbi_dma(dev);
1578 }
1579 spin_unlock_irqrestore(&dev->slock, flags);
1580
1581 if (core->ir)
1582 cx88_ir_stop(core);
1583
1584 cx88_shutdown(core);
1585
1586 pci_save_state(pci_dev);
1587 if (pci_set_power_state(pci_dev,
1588 pci_choose_state(pci_dev, state)) != 0) {
1589 pci_disable_device(pci_dev);
1590 dev->state.disabled = 1;
1591 }
1592 return 0;
1593}
1594
1595static int cx8800_resume(struct pci_dev *pci_dev)
1596{
1597 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1598 struct cx88_core *core = dev->core;
1599 unsigned long flags;
1600 int err;
1601
1602 if (dev->state.disabled) {
1603 err = pci_enable_device(pci_dev);
1604 if (err) {
1605 pr_err("can't enable device\n");
1606 return err;
1607 }
1608
1609 dev->state.disabled = 0;
1610 }
1611 err = pci_set_power_state(pci_dev, PCI_D0);
1612 if (err) {
1613 pr_err("can't set power state\n");
1614 pci_disable_device(pci_dev);
1615 dev->state.disabled = 1;
1616
1617 return err;
1618 }
1619 pci_restore_state(pci_dev);
1620
1621
1622 cx88_reset(core);
1623 if (core->ir)
1624 cx88_ir_start(core);
1625
1626 cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1627
1628
1629 spin_lock_irqsave(&dev->slock, flags);
1630 if (!list_empty(&dev->vidq.active)) {
1631 pr_info("resume video\n");
1632 restart_video_queue(dev, &dev->vidq);
1633 }
1634 if (!list_empty(&dev->vbiq.active)) {
1635 pr_info("resume vbi\n");
1636 cx8800_restart_vbi_queue(dev, &dev->vbiq);
1637 }
1638 spin_unlock_irqrestore(&dev->slock, flags);
1639
1640 return 0;
1641}
1642#endif
1643
1644
1645
1646static const struct pci_device_id cx8800_pci_tbl[] = {
1647 {
1648 .vendor = 0x14f1,
1649 .device = 0x8800,
1650 .subvendor = PCI_ANY_ID,
1651 .subdevice = PCI_ANY_ID,
1652 }, {
1653
1654 }
1655};
1656MODULE_DEVICE_TABLE(pci, cx8800_pci_tbl);
1657
1658static struct pci_driver cx8800_pci_driver = {
1659 .name = "cx8800",
1660 .id_table = cx8800_pci_tbl,
1661 .probe = cx8800_initdev,
1662 .remove = cx8800_finidev,
1663#ifdef CONFIG_PM
1664 .suspend = cx8800_suspend,
1665 .resume = cx8800_resume,
1666#endif
1667};
1668
1669module_pci_driver(cx8800_pci_driver);
1670
