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9#include <linux/module.h>
10#include <linux/kernel.h>
11#include <linux/types.h>
12#include <linux/errno.h>
13#include <linux/bug.h>
14#include <linux/interrupt.h>
15#include <linux/device.h>
16#include <linux/pm_runtime.h>
17#include <linux/list.h>
18#include <linux/slab.h>
19
20#include <linux/videodev2.h>
21#include <media/v4l2-device.h>
22#include <media/v4l2-ioctl.h>
23#include <media/v4l2-mem2mem.h>
24#include <media/videobuf2-v4l2.h>
25#include <media/videobuf2-dma-contig.h>
26
27#include "common.h"
28#include "fimc-core.h"
29#include "fimc-reg.h"
30#include "media-dev.h"
31
32static int fimc_capture_hw_init(struct fimc_dev *fimc)
33{
34 struct fimc_source_info *si = &fimc->vid_cap.source_config;
35 struct fimc_ctx *ctx = fimc->vid_cap.ctx;
36 int ret;
37 unsigned long flags;
38
39 if (ctx == NULL || ctx->s_frame.fmt == NULL)
40 return -EINVAL;
41
42 if (si->fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK) {
43 ret = fimc_hw_camblk_cfg_writeback(fimc);
44 if (ret < 0)
45 return ret;
46 }
47
48 spin_lock_irqsave(&fimc->slock, flags);
49 fimc_prepare_dma_offset(ctx, &ctx->d_frame);
50 fimc_set_yuv_order(ctx);
51
52 fimc_hw_set_camera_polarity(fimc, si);
53 fimc_hw_set_camera_type(fimc, si);
54 fimc_hw_set_camera_source(fimc, si);
55 fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
56
57 ret = fimc_set_scaler_info(ctx);
58 if (!ret) {
59 fimc_hw_set_input_path(ctx);
60 fimc_hw_set_prescaler(ctx);
61 fimc_hw_set_mainscaler(ctx);
62 fimc_hw_set_target_format(ctx);
63 fimc_hw_set_rotation(ctx);
64 fimc_hw_set_effect(ctx);
65 fimc_hw_set_output_path(ctx);
66 fimc_hw_set_out_dma(ctx);
67 if (fimc->drv_data->alpha_color)
68 fimc_hw_set_rgb_alpha(ctx);
69 clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
70 }
71 spin_unlock_irqrestore(&fimc->slock, flags);
72 return ret;
73}
74
75
76
77
78
79
80
81
82
83static int fimc_capture_state_cleanup(struct fimc_dev *fimc, bool suspend)
84{
85 struct fimc_vid_cap *cap = &fimc->vid_cap;
86 struct fimc_vid_buffer *buf;
87 unsigned long flags;
88 bool streaming;
89
90 spin_lock_irqsave(&fimc->slock, flags);
91 streaming = fimc->state & (1 << ST_CAPT_ISP_STREAM);
92
93 fimc->state &= ~(1 << ST_CAPT_RUN | 1 << ST_CAPT_SHUT |
94 1 << ST_CAPT_STREAM | 1 << ST_CAPT_ISP_STREAM);
95 if (suspend)
96 fimc->state |= (1 << ST_CAPT_SUSPENDED);
97 else
98 fimc->state &= ~(1 << ST_CAPT_PEND | 1 << ST_CAPT_SUSPENDED);
99
100
101 while (!suspend && !list_empty(&cap->pending_buf_q)) {
102 buf = fimc_pending_queue_pop(cap);
103 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
104 }
105
106 while (!list_empty(&cap->active_buf_q)) {
107 buf = fimc_active_queue_pop(cap);
108 if (suspend)
109 fimc_pending_queue_add(cap, buf);
110 else
111 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
112 }
113
114 fimc_hw_reset(fimc);
115 cap->buf_index = 0;
116
117 spin_unlock_irqrestore(&fimc->slock, flags);
118
119 if (streaming)
120 return fimc_pipeline_call(&cap->ve, set_stream, 0);
121 else
122 return 0;
123}
124
125static int fimc_stop_capture(struct fimc_dev *fimc, bool suspend)
126{
127 unsigned long flags;
128
129 if (!fimc_capture_active(fimc))
130 return 0;
131
132 spin_lock_irqsave(&fimc->slock, flags);
133 set_bit(ST_CAPT_SHUT, &fimc->state);
134 fimc_deactivate_capture(fimc);
135 spin_unlock_irqrestore(&fimc->slock, flags);
136
137 wait_event_timeout(fimc->irq_queue,
138 !test_bit(ST_CAPT_SHUT, &fimc->state),
139 (2*HZ/10));
140
141 return fimc_capture_state_cleanup(fimc, suspend);
142}
143
144
145
146
147
148
149
150
151
152static int fimc_capture_config_update(struct fimc_ctx *ctx)
153{
154 struct fimc_dev *fimc = ctx->fimc_dev;
155 int ret;
156
157 fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
158
159 ret = fimc_set_scaler_info(ctx);
160 if (ret)
161 return ret;
162
163 fimc_hw_set_prescaler(ctx);
164 fimc_hw_set_mainscaler(ctx);
165 fimc_hw_set_target_format(ctx);
166 fimc_hw_set_rotation(ctx);
167 fimc_hw_set_effect(ctx);
168 fimc_prepare_dma_offset(ctx, &ctx->d_frame);
169 fimc_hw_set_out_dma(ctx);
170 if (fimc->drv_data->alpha_color)
171 fimc_hw_set_rgb_alpha(ctx);
172
173 clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
174 return ret;
175}
176
177void fimc_capture_irq_handler(struct fimc_dev *fimc, int deq_buf)
178{
179 struct fimc_vid_cap *cap = &fimc->vid_cap;
180 struct fimc_pipeline *p = to_fimc_pipeline(cap->ve.pipe);
181 struct v4l2_subdev *csis = p->subdevs[IDX_CSIS];
182 struct fimc_frame *f = &cap->ctx->d_frame;
183 struct fimc_vid_buffer *v_buf;
184
185 if (test_and_clear_bit(ST_CAPT_SHUT, &fimc->state)) {
186 wake_up(&fimc->irq_queue);
187 goto done;
188 }
189
190 if (!list_empty(&cap->active_buf_q) &&
191 test_bit(ST_CAPT_RUN, &fimc->state) && deq_buf) {
192 v_buf = fimc_active_queue_pop(cap);
193
194 v_buf->vb.vb2_buf.timestamp = ktime_get_ns();
195 v_buf->vb.sequence = cap->frame_count++;
196
197 vb2_buffer_done(&v_buf->vb.vb2_buf, VB2_BUF_STATE_DONE);
198 }
199
200 if (!list_empty(&cap->pending_buf_q)) {
201
202 v_buf = fimc_pending_queue_pop(cap);
203 fimc_hw_set_output_addr(fimc, &v_buf->paddr, cap->buf_index);
204 v_buf->index = cap->buf_index;
205
206
207 fimc_active_queue_add(cap, v_buf);
208
209 dbg("next frame: %d, done frame: %d",
210 fimc_hw_get_frame_index(fimc), v_buf->index);
211
212 if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
213 cap->buf_index = 0;
214 }
215
216
217
218
219 if (f->fmt->mdataplanes && !list_empty(&cap->active_buf_q)) {
220 unsigned int plane = ffs(f->fmt->mdataplanes) - 1;
221 unsigned int size = f->payload[plane];
222 s32 index = fimc_hw_get_frame_index(fimc);
223 void *vaddr;
224
225 list_for_each_entry(v_buf, &cap->active_buf_q, list) {
226 if (v_buf->index != index)
227 continue;
228 vaddr = vb2_plane_vaddr(&v_buf->vb.vb2_buf, plane);
229 v4l2_subdev_call(csis, video, s_rx_buffer,
230 vaddr, &size);
231 break;
232 }
233 }
234
235 if (cap->active_buf_cnt == 0) {
236 if (deq_buf)
237 clear_bit(ST_CAPT_RUN, &fimc->state);
238
239 if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
240 cap->buf_index = 0;
241 } else {
242 set_bit(ST_CAPT_RUN, &fimc->state);
243 }
244
245 if (test_bit(ST_CAPT_APPLY_CFG, &fimc->state))
246 fimc_capture_config_update(cap->ctx);
247done:
248 if (cap->active_buf_cnt == 1) {
249 fimc_deactivate_capture(fimc);
250 clear_bit(ST_CAPT_STREAM, &fimc->state);
251 }
252
253 dbg("frame: %d, active_buf_cnt: %d",
254 fimc_hw_get_frame_index(fimc), cap->active_buf_cnt);
255}
256
257
258static int start_streaming(struct vb2_queue *q, unsigned int count)
259{
260 struct fimc_ctx *ctx = q->drv_priv;
261 struct fimc_dev *fimc = ctx->fimc_dev;
262 struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
263 int min_bufs;
264 int ret;
265
266 vid_cap->frame_count = 0;
267
268 ret = fimc_capture_hw_init(fimc);
269 if (ret) {
270 fimc_capture_state_cleanup(fimc, false);
271 return ret;
272 }
273
274 set_bit(ST_CAPT_PEND, &fimc->state);
275
276 min_bufs = fimc->vid_cap.reqbufs_count > 1 ? 2 : 1;
277
278 if (vid_cap->active_buf_cnt >= min_bufs &&
279 !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
280 fimc_activate_capture(ctx);
281
282 if (!test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
283 return fimc_pipeline_call(&vid_cap->ve, set_stream, 1);
284 }
285
286 return 0;
287}
288
289static void stop_streaming(struct vb2_queue *q)
290{
291 struct fimc_ctx *ctx = q->drv_priv;
292 struct fimc_dev *fimc = ctx->fimc_dev;
293
294 if (!fimc_capture_active(fimc))
295 return;
296
297 fimc_stop_capture(fimc, false);
298}
299
300int fimc_capture_suspend(struct fimc_dev *fimc)
301{
302 bool suspend = fimc_capture_busy(fimc);
303
304 int ret = fimc_stop_capture(fimc, suspend);
305 if (ret)
306 return ret;
307 return fimc_pipeline_call(&fimc->vid_cap.ve, close);
308}
309
310static void buffer_queue(struct vb2_buffer *vb);
311
312int fimc_capture_resume(struct fimc_dev *fimc)
313{
314 struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
315 struct exynos_video_entity *ve = &vid_cap->ve;
316 struct fimc_vid_buffer *buf;
317 int i;
318
319 if (!test_and_clear_bit(ST_CAPT_SUSPENDED, &fimc->state))
320 return 0;
321
322 INIT_LIST_HEAD(&fimc->vid_cap.active_buf_q);
323 vid_cap->buf_index = 0;
324 fimc_pipeline_call(ve, open, &ve->vdev.entity, false);
325 fimc_capture_hw_init(fimc);
326
327 clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
328
329 for (i = 0; i < vid_cap->reqbufs_count; i++) {
330 if (list_empty(&vid_cap->pending_buf_q))
331 break;
332 buf = fimc_pending_queue_pop(vid_cap);
333 buffer_queue(&buf->vb.vb2_buf);
334 }
335 return 0;
336
337}
338
339static int queue_setup(struct vb2_queue *vq,
340 unsigned int *num_buffers, unsigned int *num_planes,
341 unsigned int sizes[], struct device *alloc_devs[])
342{
343 struct fimc_ctx *ctx = vq->drv_priv;
344 struct fimc_frame *frame = &ctx->d_frame;
345 struct fimc_fmt *fmt = frame->fmt;
346 unsigned long wh = frame->f_width * frame->f_height;
347 int i;
348
349 if (fmt == NULL)
350 return -EINVAL;
351
352 if (*num_planes) {
353 if (*num_planes != fmt->memplanes)
354 return -EINVAL;
355 for (i = 0; i < *num_planes; i++)
356 if (sizes[i] < (wh * fmt->depth[i]) / 8)
357 return -EINVAL;
358 return 0;
359 }
360
361 *num_planes = fmt->memplanes;
362
363 for (i = 0; i < fmt->memplanes; i++) {
364 unsigned int size = (wh * fmt->depth[i]) / 8;
365
366 if (fimc_fmt_is_user_defined(fmt->color))
367 sizes[i] = frame->payload[i];
368 else
369 sizes[i] = max_t(u32, size, frame->payload[i]);
370 }
371
372 return 0;
373}
374
375static int buffer_prepare(struct vb2_buffer *vb)
376{
377 struct vb2_queue *vq = vb->vb2_queue;
378 struct fimc_ctx *ctx = vq->drv_priv;
379 int i;
380
381 if (ctx->d_frame.fmt == NULL)
382 return -EINVAL;
383
384 for (i = 0; i < ctx->d_frame.fmt->memplanes; i++) {
385 unsigned long size = ctx->d_frame.payload[i];
386
387 if (vb2_plane_size(vb, i) < size) {
388 v4l2_err(&ctx->fimc_dev->vid_cap.ve.vdev,
389 "User buffer too small (%ld < %ld)\n",
390 vb2_plane_size(vb, i), size);
391 return -EINVAL;
392 }
393 vb2_set_plane_payload(vb, i, size);
394 }
395
396 return 0;
397}
398
399static void buffer_queue(struct vb2_buffer *vb)
400{
401 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
402 struct fimc_vid_buffer *buf
403 = container_of(vbuf, struct fimc_vid_buffer, vb);
404 struct fimc_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
405 struct fimc_dev *fimc = ctx->fimc_dev;
406 struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
407 struct exynos_video_entity *ve = &vid_cap->ve;
408 unsigned long flags;
409 int min_bufs;
410
411 spin_lock_irqsave(&fimc->slock, flags);
412 fimc_prepare_addr(ctx, &buf->vb.vb2_buf, &ctx->d_frame, &buf->paddr);
413
414 if (!test_bit(ST_CAPT_SUSPENDED, &fimc->state) &&
415 !test_bit(ST_CAPT_STREAM, &fimc->state) &&
416 vid_cap->active_buf_cnt < FIMC_MAX_OUT_BUFS) {
417
418 int buf_id = (vid_cap->reqbufs_count == 1) ? -1 :
419 vid_cap->buf_index;
420
421 fimc_hw_set_output_addr(fimc, &buf->paddr, buf_id);
422 buf->index = vid_cap->buf_index;
423 fimc_active_queue_add(vid_cap, buf);
424
425 if (++vid_cap->buf_index >= FIMC_MAX_OUT_BUFS)
426 vid_cap->buf_index = 0;
427 } else {
428 fimc_pending_queue_add(vid_cap, buf);
429 }
430
431 min_bufs = vid_cap->reqbufs_count > 1 ? 2 : 1;
432
433
434 if (vb2_is_streaming(&vid_cap->vbq) &&
435 vid_cap->active_buf_cnt >= min_bufs &&
436 !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
437 int ret;
438
439 fimc_activate_capture(ctx);
440 spin_unlock_irqrestore(&fimc->slock, flags);
441
442 if (test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
443 return;
444
445 ret = fimc_pipeline_call(ve, set_stream, 1);
446 if (ret < 0)
447 v4l2_err(&ve->vdev, "stream on failed: %d\n", ret);
448 return;
449 }
450 spin_unlock_irqrestore(&fimc->slock, flags);
451}
452
453static const struct vb2_ops fimc_capture_qops = {
454 .queue_setup = queue_setup,
455 .buf_prepare = buffer_prepare,
456 .buf_queue = buffer_queue,
457 .wait_prepare = vb2_ops_wait_prepare,
458 .wait_finish = vb2_ops_wait_finish,
459 .start_streaming = start_streaming,
460 .stop_streaming = stop_streaming,
461};
462
463static int fimc_capture_set_default_format(struct fimc_dev *fimc);
464
465static int fimc_capture_open(struct file *file)
466{
467 struct fimc_dev *fimc = video_drvdata(file);
468 struct fimc_vid_cap *vc = &fimc->vid_cap;
469 struct exynos_video_entity *ve = &vc->ve;
470 int ret = -EBUSY;
471
472 dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
473
474 mutex_lock(&fimc->lock);
475
476 if (fimc_m2m_active(fimc))
477 goto unlock;
478
479 set_bit(ST_CAPT_BUSY, &fimc->state);
480 ret = pm_runtime_get_sync(&fimc->pdev->dev);
481 if (ret < 0)
482 goto unlock;
483
484 ret = v4l2_fh_open(file);
485 if (ret) {
486 pm_runtime_put_sync(&fimc->pdev->dev);
487 goto unlock;
488 }
489
490 if (v4l2_fh_is_singular_file(file)) {
491 fimc_md_graph_lock(ve);
492
493 ret = fimc_pipeline_call(ve, open, &ve->vdev.entity, true);
494
495 if (ret == 0 && vc->user_subdev_api && vc->inh_sensor_ctrls) {
496
497
498
499
500 fimc_ctrls_delete(vc->ctx);
501
502 ret = fimc_ctrls_create(vc->ctx);
503 if (ret == 0)
504 vc->inh_sensor_ctrls = false;
505 }
506 if (ret == 0)
507 ve->vdev.entity.use_count++;
508
509 fimc_md_graph_unlock(ve);
510
511 if (ret == 0)
512 ret = fimc_capture_set_default_format(fimc);
513
514 if (ret < 0) {
515 clear_bit(ST_CAPT_BUSY, &fimc->state);
516 pm_runtime_put_sync(&fimc->pdev->dev);
517 v4l2_fh_release(file);
518 }
519 }
520unlock:
521 mutex_unlock(&fimc->lock);
522 return ret;
523}
524
525static int fimc_capture_release(struct file *file)
526{
527 struct fimc_dev *fimc = video_drvdata(file);
528 struct fimc_vid_cap *vc = &fimc->vid_cap;
529 bool close = v4l2_fh_is_singular_file(file);
530 int ret;
531
532 dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
533
534 mutex_lock(&fimc->lock);
535
536 if (close && vc->streaming) {
537 media_pipeline_stop(&vc->ve.vdev.entity);
538 vc->streaming = false;
539 }
540
541 ret = _vb2_fop_release(file, NULL);
542
543 if (close) {
544 clear_bit(ST_CAPT_BUSY, &fimc->state);
545 fimc_pipeline_call(&vc->ve, close);
546 clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
547
548 fimc_md_graph_lock(&vc->ve);
549 vc->ve.vdev.entity.use_count--;
550 fimc_md_graph_unlock(&vc->ve);
551 }
552
553 pm_runtime_put_sync(&fimc->pdev->dev);
554 mutex_unlock(&fimc->lock);
555
556 return ret;
557}
558
559static const struct v4l2_file_operations fimc_capture_fops = {
560 .owner = THIS_MODULE,
561 .open = fimc_capture_open,
562 .release = fimc_capture_release,
563 .poll = vb2_fop_poll,
564 .unlocked_ioctl = video_ioctl2,
565 .mmap = vb2_fop_mmap,
566};
567
568
569
570
571
572static struct fimc_fmt *fimc_capture_try_format(struct fimc_ctx *ctx,
573 u32 *width, u32 *height,
574 u32 *code, u32 *fourcc, int pad)
575{
576 bool rotation = ctx->rotation == 90 || ctx->rotation == 270;
577 struct fimc_dev *fimc = ctx->fimc_dev;
578 const struct fimc_variant *var = fimc->variant;
579 const struct fimc_pix_limit *pl = var->pix_limit;
580 struct fimc_frame *dst = &ctx->d_frame;
581 u32 depth, min_w, max_w, min_h, align_h = 3;
582 u32 mask = FMT_FLAGS_CAM;
583 struct fimc_fmt *ffmt;
584
585
586 if (code && ctx->s_frame.fmt && pad == FIMC_SD_PAD_SOURCE &&
587 fimc_fmt_is_user_defined(ctx->s_frame.fmt->color))
588 *code = ctx->s_frame.fmt->mbus_code;
589
590 if (fourcc && *fourcc != V4L2_PIX_FMT_JPEG && pad == FIMC_SD_PAD_SOURCE)
591 mask |= FMT_FLAGS_M2M;
592
593 if (pad == FIMC_SD_PAD_SINK_FIFO)
594 mask = FMT_FLAGS_WRITEBACK;
595
596 ffmt = fimc_find_format(fourcc, code, mask, 0);
597 if (WARN_ON(!ffmt))
598 return NULL;
599
600 if (code)
601 *code = ffmt->mbus_code;
602 if (fourcc)
603 *fourcc = ffmt->fourcc;
604
605 if (pad != FIMC_SD_PAD_SOURCE) {
606 max_w = fimc_fmt_is_user_defined(ffmt->color) ?
607 pl->scaler_dis_w : pl->scaler_en_w;
608
609 v4l_bound_align_image(width, max_t(u32, *width, 32), max_w, 4,
610 height, max_t(u32, *height, 32),
611 FIMC_CAMIF_MAX_HEIGHT,
612 fimc_fmt_is_user_defined(ffmt->color) ?
613 3 : 1,
614 0);
615 return ffmt;
616 }
617
618 if (fimc_fmt_is_user_defined(ffmt->color)) {
619 *width = ctx->s_frame.f_width;
620 *height = ctx->s_frame.f_height;
621 return ffmt;
622 }
623
624 max_w = rotation ? pl->out_rot_en_w : pl->out_rot_dis_w;
625 if (ctx->state & FIMC_COMPOSE) {
626 min_w = dst->offs_h + dst->width;
627 min_h = dst->offs_v + dst->height;
628 } else {
629 min_w = var->min_out_pixsize;
630 min_h = var->min_out_pixsize;
631 }
632 if (var->min_vsize_align == 1 && !rotation)
633 align_h = fimc_fmt_is_rgb(ffmt->color) ? 0 : 1;
634
635 depth = fimc_get_format_depth(ffmt);
636 v4l_bound_align_image(width, min_w, max_w,
637 ffs(var->min_out_pixsize) - 1,
638 height, min_h, FIMC_CAMIF_MAX_HEIGHT,
639 align_h,
640 64/(ALIGN(depth, 8)));
641
642 dbg("pad%d: code: 0x%x, %dx%d. dst fmt: %dx%d",
643 pad, code ? *code : 0, *width, *height,
644 dst->f_width, dst->f_height);
645
646 return ffmt;
647}
648
649static void fimc_capture_try_selection(struct fimc_ctx *ctx,
650 struct v4l2_rect *r,
651 int target)
652{
653 bool rotate = ctx->rotation == 90 || ctx->rotation == 270;
654 struct fimc_dev *fimc = ctx->fimc_dev;
655 const struct fimc_variant *var = fimc->variant;
656 const struct fimc_pix_limit *pl = var->pix_limit;
657 struct fimc_frame *sink = &ctx->s_frame;
658 u32 max_w, max_h, min_w = 0, min_h = 0, min_sz;
659 u32 align_sz = 0, align_h = 4;
660 u32 max_sc_h, max_sc_v;
661
662
663 if (fimc_fmt_is_user_defined(ctx->d_frame.fmt->color)) {
664 r->width = sink->f_width;
665 r->height = sink->f_height;
666 r->left = r->top = 0;
667 return;
668 }
669 if (target == V4L2_SEL_TGT_COMPOSE) {
670 u32 tmp_min_h = ffs(sink->width) - 3;
671 u32 tmp_min_v = ffs(sink->height) - 1;
672
673 if (ctx->rotation != 90 && ctx->rotation != 270)
674 align_h = 1;
675 max_sc_h = min(SCALER_MAX_HRATIO, 1 << tmp_min_h);
676 max_sc_v = min(SCALER_MAX_VRATIO, 1 << tmp_min_v);
677 min_sz = var->min_out_pixsize;
678 } else {
679 u32 depth = fimc_get_format_depth(sink->fmt);
680 align_sz = 64/ALIGN(depth, 8);
681 min_sz = var->min_inp_pixsize;
682 min_w = min_h = min_sz;
683 max_sc_h = max_sc_v = 1;
684 }
685
686
687
688
689
690
691
692
693
694 max_w = min_t(u32,
695 rotate ? pl->out_rot_en_w : pl->out_rot_dis_w,
696 rotate ? sink->f_height : sink->f_width);
697 max_h = min_t(u32, FIMC_CAMIF_MAX_HEIGHT, sink->f_height);
698
699 if (target == V4L2_SEL_TGT_COMPOSE) {
700 min_w = min_t(u32, max_w, sink->f_width / max_sc_h);
701 min_h = min_t(u32, max_h, sink->f_height / max_sc_v);
702 if (rotate) {
703 swap(max_sc_h, max_sc_v);
704 swap(min_w, min_h);
705 }
706 }
707 v4l_bound_align_image(&r->width, min_w, max_w, ffs(min_sz) - 1,
708 &r->height, min_h, max_h, align_h,
709 align_sz);
710
711 r->left = clamp_t(u32, r->left, 0, sink->f_width - r->width);
712 r->top = clamp_t(u32, r->top, 0, sink->f_height - r->height);
713 r->left = round_down(r->left, var->hor_offs_align);
714
715 dbg("target %#x: (%d,%d)/%dx%d, sink fmt: %dx%d",
716 target, r->left, r->top, r->width, r->height,
717 sink->f_width, sink->f_height);
718}
719
720
721
722
723static int fimc_cap_querycap(struct file *file, void *priv,
724 struct v4l2_capability *cap)
725{
726 struct fimc_dev *fimc = video_drvdata(file);
727
728 __fimc_vidioc_querycap(&fimc->pdev->dev, cap);
729 return 0;
730}
731
732static int fimc_cap_enum_fmt(struct file *file, void *priv,
733 struct v4l2_fmtdesc *f)
734{
735 struct fimc_fmt *fmt;
736
737 fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM | FMT_FLAGS_M2M,
738 f->index);
739 if (!fmt)
740 return -EINVAL;
741 strscpy(f->description, fmt->name, sizeof(f->description));
742 f->pixelformat = fmt->fourcc;
743 if (fmt->fourcc == MEDIA_BUS_FMT_JPEG_1X8)
744 f->flags |= V4L2_FMT_FLAG_COMPRESSED;
745 return 0;
746}
747
748static struct media_entity *fimc_pipeline_get_head(struct media_entity *me)
749{
750 struct media_pad *pad = &me->pads[0];
751
752 while (!(pad->flags & MEDIA_PAD_FL_SOURCE)) {
753 pad = media_entity_remote_pad(pad);
754 if (!pad)
755 break;
756 me = pad->entity;
757 pad = &me->pads[0];
758 }
759
760 return me;
761}
762
763
764
765
766
767
768
769
770
771static int fimc_pipeline_try_format(struct fimc_ctx *ctx,
772 struct v4l2_mbus_framefmt *tfmt,
773 struct fimc_fmt **fmt_id,
774 bool set)
775{
776 struct fimc_dev *fimc = ctx->fimc_dev;
777 struct fimc_pipeline *p = to_fimc_pipeline(fimc->vid_cap.ve.pipe);
778 struct v4l2_subdev *sd = p->subdevs[IDX_SENSOR];
779 struct v4l2_subdev_format sfmt;
780 struct v4l2_mbus_framefmt *mf = &sfmt.format;
781 struct media_entity *me;
782 struct fimc_fmt *ffmt;
783 struct media_pad *pad;
784 int ret, i = 1;
785 u32 fcc;
786
787 if (WARN_ON(!sd || !tfmt))
788 return -EINVAL;
789
790 memset(&sfmt, 0, sizeof(sfmt));
791 sfmt.format = *tfmt;
792 sfmt.which = set ? V4L2_SUBDEV_FORMAT_ACTIVE : V4L2_SUBDEV_FORMAT_TRY;
793
794 me = fimc_pipeline_get_head(&sd->entity);
795
796 while (1) {
797 ffmt = fimc_find_format(NULL, mf->code != 0 ? &mf->code : NULL,
798 FMT_FLAGS_CAM, i++);
799 if (ffmt == NULL) {
800
801
802
803
804 return -EINVAL;
805 }
806 mf->code = tfmt->code = ffmt->mbus_code;
807
808
809 while (me != &fimc->vid_cap.subdev.entity) {
810 sd = media_entity_to_v4l2_subdev(me);
811
812 sfmt.pad = 0;
813 ret = v4l2_subdev_call(sd, pad, set_fmt, NULL, &sfmt);
814 if (ret)
815 return ret;
816
817 if (me->pads[0].flags & MEDIA_PAD_FL_SINK) {
818 sfmt.pad = me->num_pads - 1;
819 mf->code = tfmt->code;
820 ret = v4l2_subdev_call(sd, pad, set_fmt, NULL,
821 &sfmt);
822 if (ret)
823 return ret;
824 }
825
826 pad = media_entity_remote_pad(&me->pads[sfmt.pad]);
827 if (!pad)
828 return -EINVAL;
829 me = pad->entity;
830 }
831
832 if (mf->code != tfmt->code)
833 continue;
834
835 fcc = ffmt->fourcc;
836 tfmt->width = mf->width;
837 tfmt->height = mf->height;
838 ffmt = fimc_capture_try_format(ctx, &tfmt->width, &tfmt->height,
839 NULL, &fcc, FIMC_SD_PAD_SINK_CAM);
840 ffmt = fimc_capture_try_format(ctx, &tfmt->width, &tfmt->height,
841 NULL, &fcc, FIMC_SD_PAD_SOURCE);
842 if (ffmt && ffmt->mbus_code)
843 mf->code = ffmt->mbus_code;
844 if (mf->width != tfmt->width || mf->height != tfmt->height)
845 continue;
846 tfmt->code = mf->code;
847 break;
848 }
849
850 if (fmt_id && ffmt)
851 *fmt_id = ffmt;
852 *tfmt = *mf;
853
854 return 0;
855}
856
857
858
859
860
861
862
863
864
865
866static int fimc_get_sensor_frame_desc(struct v4l2_subdev *sensor,
867 struct v4l2_plane_pix_format *plane_fmt,
868 unsigned int num_planes, bool try)
869{
870 struct v4l2_mbus_frame_desc fd;
871 int i, ret;
872 int pad;
873
874 for (i = 0; i < num_planes; i++)
875 fd.entry[i].length = plane_fmt[i].sizeimage;
876
877 pad = sensor->entity.num_pads - 1;
878 if (try)
879 ret = v4l2_subdev_call(sensor, pad, set_frame_desc, pad, &fd);
880 else
881 ret = v4l2_subdev_call(sensor, pad, get_frame_desc, pad, &fd);
882
883 if (ret < 0)
884 return ret;
885
886 if (num_planes != fd.num_entries)
887 return -EINVAL;
888
889 for (i = 0; i < num_planes; i++)
890 plane_fmt[i].sizeimage = fd.entry[i].length;
891
892 if (fd.entry[0].length > FIMC_MAX_JPEG_BUF_SIZE) {
893 v4l2_err(sensor->v4l2_dev, "Unsupported buffer size: %u\n",
894 fd.entry[0].length);
895
896 return -EINVAL;
897 }
898
899 return 0;
900}
901
902static int fimc_cap_g_fmt_mplane(struct file *file, void *fh,
903 struct v4l2_format *f)
904{
905 struct fimc_dev *fimc = video_drvdata(file);
906
907 __fimc_get_format(&fimc->vid_cap.ctx->d_frame, f);
908 return 0;
909}
910
911
912
913
914
915
916static int __video_try_or_set_format(struct fimc_dev *fimc,
917 struct v4l2_format *f, bool try,
918 struct fimc_fmt **inp_fmt,
919 struct fimc_fmt **out_fmt)
920{
921 struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
922 struct fimc_vid_cap *vc = &fimc->vid_cap;
923 struct exynos_video_entity *ve = &vc->ve;
924 struct fimc_ctx *ctx = vc->ctx;
925 unsigned int width = 0, height = 0;
926 int ret = 0;
927
928
929 if (fimc_jpeg_fourcc(pix->pixelformat)) {
930 fimc_capture_try_format(ctx, &pix->width, &pix->height,
931 NULL, &pix->pixelformat,
932 FIMC_SD_PAD_SINK_CAM);
933 if (try) {
934 width = pix->width;
935 height = pix->height;
936 } else {
937 ctx->s_frame.f_width = pix->width;
938 ctx->s_frame.f_height = pix->height;
939 }
940 }
941
942
943 *out_fmt = fimc_capture_try_format(ctx, &pix->width, &pix->height,
944 NULL, &pix->pixelformat,
945 FIMC_SD_PAD_SOURCE);
946 if (*out_fmt == NULL)
947 return -EINVAL;
948
949
950 if (try && fimc_jpeg_fourcc(pix->pixelformat)) {
951 pix->width = width;
952 pix->height = height;
953 }
954
955
956 if (!vc->user_subdev_api) {
957 struct v4l2_mbus_framefmt mbus_fmt;
958 struct v4l2_mbus_framefmt *mf;
959
960 mf = try ? &mbus_fmt : &fimc->vid_cap.ci_fmt;
961
962 mf->code = (*out_fmt)->mbus_code;
963 mf->width = pix->width;
964 mf->height = pix->height;
965
966 fimc_md_graph_lock(ve);
967 ret = fimc_pipeline_try_format(ctx, mf, inp_fmt, try);
968 fimc_md_graph_unlock(ve);
969
970 if (ret < 0)
971 return ret;
972
973 pix->width = mf->width;
974 pix->height = mf->height;
975 }
976
977 fimc_adjust_mplane_format(*out_fmt, pix->width, pix->height, pix);
978
979 if ((*out_fmt)->flags & FMT_FLAGS_COMPRESSED) {
980 struct v4l2_subdev *sensor;
981
982 fimc_md_graph_lock(ve);
983
984 sensor = __fimc_md_get_subdev(ve->pipe, IDX_SENSOR);
985 if (sensor)
986 fimc_get_sensor_frame_desc(sensor, pix->plane_fmt,
987 (*out_fmt)->memplanes, try);
988 else
989 ret = -EPIPE;
990
991 fimc_md_graph_unlock(ve);
992 }
993
994 return ret;
995}
996
997static int fimc_cap_try_fmt_mplane(struct file *file, void *fh,
998 struct v4l2_format *f)
999{
1000 struct fimc_dev *fimc = video_drvdata(file);
1001 struct fimc_fmt *out_fmt = NULL, *inp_fmt = NULL;
1002
1003 return __video_try_or_set_format(fimc, f, true, &inp_fmt, &out_fmt);
1004}
1005
1006static void fimc_capture_mark_jpeg_xfer(struct fimc_ctx *ctx,
1007 enum fimc_color_fmt color)
1008{
1009 bool jpeg = fimc_fmt_is_user_defined(color);
1010
1011 ctx->scaler.enabled = !jpeg;
1012 fimc_ctrls_activate(ctx, !jpeg);
1013
1014 if (jpeg)
1015 set_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
1016 else
1017 clear_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
1018}
1019
1020static int __fimc_capture_set_format(struct fimc_dev *fimc,
1021 struct v4l2_format *f)
1022{
1023 struct fimc_vid_cap *vc = &fimc->vid_cap;
1024 struct fimc_ctx *ctx = vc->ctx;
1025 struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
1026 struct fimc_frame *ff = &ctx->d_frame;
1027 struct fimc_fmt *inp_fmt = NULL;
1028 int ret, i;
1029
1030 if (vb2_is_busy(&fimc->vid_cap.vbq))
1031 return -EBUSY;
1032
1033 ret = __video_try_or_set_format(fimc, f, false, &inp_fmt, &ff->fmt);
1034 if (ret < 0)
1035 return ret;
1036
1037
1038 fimc_alpha_ctrl_update(ctx);
1039
1040 for (i = 0; i < ff->fmt->memplanes; i++) {
1041 ff->bytesperline[i] = pix->plane_fmt[i].bytesperline;
1042 ff->payload[i] = pix->plane_fmt[i].sizeimage;
1043 }
1044
1045 set_frame_bounds(ff, pix->width, pix->height);
1046
1047 if (!(ctx->state & FIMC_COMPOSE))
1048 set_frame_crop(ff, 0, 0, pix->width, pix->height);
1049
1050 fimc_capture_mark_jpeg_xfer(ctx, ff->fmt->color);
1051
1052
1053 if (!vc->user_subdev_api) {
1054 ctx->s_frame.fmt = inp_fmt;
1055 set_frame_bounds(&ctx->s_frame, pix->width, pix->height);
1056 set_frame_crop(&ctx->s_frame, 0, 0, pix->width, pix->height);
1057 }
1058
1059 return ret;
1060}
1061
1062static int fimc_cap_s_fmt_mplane(struct file *file, void *priv,
1063 struct v4l2_format *f)
1064{
1065 struct fimc_dev *fimc = video_drvdata(file);
1066
1067 return __fimc_capture_set_format(fimc, f);
1068}
1069
1070static int fimc_cap_enum_input(struct file *file, void *priv,
1071 struct v4l2_input *i)
1072{
1073 struct fimc_dev *fimc = video_drvdata(file);
1074 struct exynos_video_entity *ve = &fimc->vid_cap.ve;
1075 struct v4l2_subdev *sd;
1076
1077 if (i->index != 0)
1078 return -EINVAL;
1079
1080 i->type = V4L2_INPUT_TYPE_CAMERA;
1081 fimc_md_graph_lock(ve);
1082 sd = __fimc_md_get_subdev(ve->pipe, IDX_SENSOR);
1083 fimc_md_graph_unlock(ve);
1084
1085 if (sd)
1086 strscpy(i->name, sd->name, sizeof(i->name));
1087
1088 return 0;
1089}
1090
1091static int fimc_cap_s_input(struct file *file, void *priv, unsigned int i)
1092{
1093 return i == 0 ? i : -EINVAL;
1094}
1095
1096static int fimc_cap_g_input(struct file *file, void *priv, unsigned int *i)
1097{
1098 *i = 0;
1099 return 0;
1100}
1101
1102
1103
1104
1105
1106
1107
1108
1109static int fimc_pipeline_validate(struct fimc_dev *fimc)
1110{
1111 struct v4l2_subdev_format sink_fmt, src_fmt;
1112 struct fimc_vid_cap *vc = &fimc->vid_cap;
1113 struct v4l2_subdev *sd = &vc->subdev;
1114 struct fimc_pipeline *p = to_fimc_pipeline(vc->ve.pipe);
1115 struct media_pad *sink_pad, *src_pad;
1116 int i, ret;
1117
1118 while (1) {
1119
1120
1121
1122
1123
1124 src_pad = NULL;
1125
1126 for (i = 0; i < sd->entity.num_pads; i++) {
1127 struct media_pad *p = &sd->entity.pads[i];
1128
1129 if (p->flags & MEDIA_PAD_FL_SINK) {
1130 sink_pad = p;
1131 src_pad = media_entity_remote_pad(sink_pad);
1132 if (src_pad)
1133 break;
1134 }
1135 }
1136
1137 if (!src_pad || !is_media_entity_v4l2_subdev(src_pad->entity))
1138 break;
1139
1140
1141 if (sd == &vc->subdev) {
1142 struct fimc_frame *ff = &vc->ctx->s_frame;
1143 sink_fmt.format.width = ff->f_width;
1144 sink_fmt.format.height = ff->f_height;
1145 sink_fmt.format.code = ff->fmt ? ff->fmt->mbus_code : 0;
1146 } else {
1147 sink_fmt.pad = sink_pad->index;
1148 sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1149 ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &sink_fmt);
1150 if (ret < 0 && ret != -ENOIOCTLCMD)
1151 return -EPIPE;
1152 }
1153
1154
1155 sd = media_entity_to_v4l2_subdev(src_pad->entity);
1156 src_fmt.pad = src_pad->index;
1157 src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1158 ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
1159 if (ret < 0 && ret != -ENOIOCTLCMD)
1160 return -EPIPE;
1161
1162 if (src_fmt.format.width != sink_fmt.format.width ||
1163 src_fmt.format.height != sink_fmt.format.height ||
1164 src_fmt.format.code != sink_fmt.format.code)
1165 return -EPIPE;
1166
1167 if (sd == p->subdevs[IDX_SENSOR] &&
1168 fimc_user_defined_mbus_fmt(src_fmt.format.code)) {
1169 struct v4l2_plane_pix_format plane_fmt[FIMC_MAX_PLANES];
1170 struct fimc_frame *frame = &vc->ctx->d_frame;
1171 unsigned int i;
1172
1173 ret = fimc_get_sensor_frame_desc(sd, plane_fmt,
1174 frame->fmt->memplanes,
1175 false);
1176 if (ret < 0)
1177 return -EPIPE;
1178
1179 for (i = 0; i < frame->fmt->memplanes; i++)
1180 if (frame->payload[i] < plane_fmt[i].sizeimage)
1181 return -EPIPE;
1182 }
1183 }
1184 return 0;
1185}
1186
1187static int fimc_cap_streamon(struct file *file, void *priv,
1188 enum v4l2_buf_type type)
1189{
1190 struct fimc_dev *fimc = video_drvdata(file);
1191 struct fimc_vid_cap *vc = &fimc->vid_cap;
1192 struct media_entity *entity = &vc->ve.vdev.entity;
1193 struct fimc_source_info *si = NULL;
1194 struct v4l2_subdev *sd;
1195 int ret;
1196
1197 if (fimc_capture_active(fimc))
1198 return -EBUSY;
1199
1200 ret = media_pipeline_start(entity, &vc->ve.pipe->mp);
1201 if (ret < 0)
1202 return ret;
1203
1204 sd = __fimc_md_get_subdev(vc->ve.pipe, IDX_SENSOR);
1205 if (sd)
1206 si = v4l2_get_subdev_hostdata(sd);
1207
1208 if (si == NULL) {
1209 ret = -EPIPE;
1210 goto err_p_stop;
1211 }
1212
1213
1214
1215
1216 vc->source_config = *si;
1217
1218 if (vc->input == GRP_ID_FIMC_IS)
1219 vc->source_config.fimc_bus_type = FIMC_BUS_TYPE_ISP_WRITEBACK;
1220
1221 if (vc->user_subdev_api) {
1222 ret = fimc_pipeline_validate(fimc);
1223 if (ret < 0)
1224 goto err_p_stop;
1225 }
1226
1227 ret = vb2_ioctl_streamon(file, priv, type);
1228 if (!ret) {
1229 vc->streaming = true;
1230 return ret;
1231 }
1232
1233err_p_stop:
1234 media_pipeline_stop(entity);
1235 return ret;
1236}
1237
1238static int fimc_cap_streamoff(struct file *file, void *priv,
1239 enum v4l2_buf_type type)
1240{
1241 struct fimc_dev *fimc = video_drvdata(file);
1242 struct fimc_vid_cap *vc = &fimc->vid_cap;
1243 int ret;
1244
1245 ret = vb2_ioctl_streamoff(file, priv, type);
1246 if (ret < 0)
1247 return ret;
1248
1249 media_pipeline_stop(&vc->ve.vdev.entity);
1250 vc->streaming = false;
1251 return 0;
1252}
1253
1254static int fimc_cap_reqbufs(struct file *file, void *priv,
1255 struct v4l2_requestbuffers *reqbufs)
1256{
1257 struct fimc_dev *fimc = video_drvdata(file);
1258 int ret;
1259
1260 ret = vb2_ioctl_reqbufs(file, priv, reqbufs);
1261
1262 if (!ret)
1263 fimc->vid_cap.reqbufs_count = reqbufs->count;
1264
1265 return ret;
1266}
1267
1268static int fimc_cap_g_selection(struct file *file, void *fh,
1269 struct v4l2_selection *s)
1270{
1271 struct fimc_dev *fimc = video_drvdata(file);
1272 struct fimc_ctx *ctx = fimc->vid_cap.ctx;
1273 struct fimc_frame *f = &ctx->s_frame;
1274
1275 if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
1276 return -EINVAL;
1277
1278 switch (s->target) {
1279 case V4L2_SEL_TGT_COMPOSE_DEFAULT:
1280 case V4L2_SEL_TGT_COMPOSE_BOUNDS:
1281 f = &ctx->d_frame;
1282
1283 case V4L2_SEL_TGT_CROP_BOUNDS:
1284 case V4L2_SEL_TGT_CROP_DEFAULT:
1285 s->r.left = 0;
1286 s->r.top = 0;
1287 s->r.width = f->o_width;
1288 s->r.height = f->o_height;
1289 return 0;
1290
1291 case V4L2_SEL_TGT_COMPOSE:
1292 f = &ctx->d_frame;
1293
1294 case V4L2_SEL_TGT_CROP:
1295 s->r.left = f->offs_h;
1296 s->r.top = f->offs_v;
1297 s->r.width = f->width;
1298 s->r.height = f->height;
1299 return 0;
1300 }
1301
1302 return -EINVAL;
1303}
1304
1305
1306static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b)
1307{
1308 if (a->left < b->left || a->top < b->top)
1309 return 0;
1310 if (a->left + a->width > b->left + b->width)
1311 return 0;
1312 if (a->top + a->height > b->top + b->height)
1313 return 0;
1314
1315 return 1;
1316}
1317
1318static int fimc_cap_s_selection(struct file *file, void *fh,
1319 struct v4l2_selection *s)
1320{
1321 struct fimc_dev *fimc = video_drvdata(file);
1322 struct fimc_ctx *ctx = fimc->vid_cap.ctx;
1323 struct v4l2_rect rect = s->r;
1324 struct fimc_frame *f;
1325 unsigned long flags;
1326
1327 if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
1328 return -EINVAL;
1329
1330 if (s->target == V4L2_SEL_TGT_COMPOSE)
1331 f = &ctx->d_frame;
1332 else if (s->target == V4L2_SEL_TGT_CROP)
1333 f = &ctx->s_frame;
1334 else
1335 return -EINVAL;
1336
1337 fimc_capture_try_selection(ctx, &rect, s->target);
1338
1339 if (s->flags & V4L2_SEL_FLAG_LE &&
1340 !enclosed_rectangle(&rect, &s->r))
1341 return -ERANGE;
1342
1343 if (s->flags & V4L2_SEL_FLAG_GE &&
1344 !enclosed_rectangle(&s->r, &rect))
1345 return -ERANGE;
1346
1347 s->r = rect;
1348 spin_lock_irqsave(&fimc->slock, flags);
1349 set_frame_crop(f, s->r.left, s->r.top, s->r.width,
1350 s->r.height);
1351 spin_unlock_irqrestore(&fimc->slock, flags);
1352
1353 set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
1354 return 0;
1355}
1356
1357static const struct v4l2_ioctl_ops fimc_capture_ioctl_ops = {
1358 .vidioc_querycap = fimc_cap_querycap,
1359
1360 .vidioc_enum_fmt_vid_cap = fimc_cap_enum_fmt,
1361 .vidioc_try_fmt_vid_cap_mplane = fimc_cap_try_fmt_mplane,
1362 .vidioc_s_fmt_vid_cap_mplane = fimc_cap_s_fmt_mplane,
1363 .vidioc_g_fmt_vid_cap_mplane = fimc_cap_g_fmt_mplane,
1364
1365 .vidioc_reqbufs = fimc_cap_reqbufs,
1366 .vidioc_querybuf = vb2_ioctl_querybuf,
1367 .vidioc_qbuf = vb2_ioctl_qbuf,
1368 .vidioc_dqbuf = vb2_ioctl_dqbuf,
1369 .vidioc_expbuf = vb2_ioctl_expbuf,
1370 .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
1371 .vidioc_create_bufs = vb2_ioctl_create_bufs,
1372
1373 .vidioc_streamon = fimc_cap_streamon,
1374 .vidioc_streamoff = fimc_cap_streamoff,
1375
1376 .vidioc_g_selection = fimc_cap_g_selection,
1377 .vidioc_s_selection = fimc_cap_s_selection,
1378
1379 .vidioc_enum_input = fimc_cap_enum_input,
1380 .vidioc_s_input = fimc_cap_s_input,
1381 .vidioc_g_input = fimc_cap_g_input,
1382};
1383
1384
1385static int fimc_link_setup(struct media_entity *entity,
1386 const struct media_pad *local,
1387 const struct media_pad *remote, u32 flags)
1388{
1389 struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
1390 struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1391 struct fimc_vid_cap *vc = &fimc->vid_cap;
1392 struct v4l2_subdev *sensor;
1393
1394 if (!is_media_entity_v4l2_subdev(remote->entity))
1395 return -EINVAL;
1396
1397 if (WARN_ON(fimc == NULL))
1398 return 0;
1399
1400 dbg("%s --> %s, flags: 0x%x. input: 0x%x",
1401 local->entity->name, remote->entity->name, flags,
1402 fimc->vid_cap.input);
1403
1404 if (!(flags & MEDIA_LNK_FL_ENABLED)) {
1405 fimc->vid_cap.input = 0;
1406 return 0;
1407 }
1408
1409 if (vc->input != 0)
1410 return -EBUSY;
1411
1412 vc->input = sd->grp_id;
1413
1414 if (vc->user_subdev_api || vc->inh_sensor_ctrls)
1415 return 0;
1416
1417
1418 sensor = fimc_find_remote_sensor(&vc->subdev.entity);
1419 if (sensor == NULL)
1420 return 0;
1421
1422 return v4l2_ctrl_add_handler(&vc->ctx->ctrls.handler,
1423 sensor->ctrl_handler, NULL, true);
1424}
1425
1426static const struct media_entity_operations fimc_sd_media_ops = {
1427 .link_setup = fimc_link_setup,
1428};
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443void fimc_sensor_notify(struct v4l2_subdev *sd, unsigned int notification,
1444 void *arg)
1445{
1446 struct fimc_source_info *si;
1447 struct fimc_vid_buffer *buf;
1448 struct fimc_md *fmd;
1449 struct fimc_dev *fimc;
1450 unsigned long flags;
1451
1452 if (sd == NULL)
1453 return;
1454
1455 si = v4l2_get_subdev_hostdata(sd);
1456 fmd = entity_to_fimc_mdev(&sd->entity);
1457
1458 spin_lock_irqsave(&fmd->slock, flags);
1459
1460 fimc = si ? source_to_sensor_info(si)->host : NULL;
1461
1462 if (fimc && arg && notification == S5P_FIMC_TX_END_NOTIFY &&
1463 test_bit(ST_CAPT_PEND, &fimc->state)) {
1464 unsigned long irq_flags;
1465 spin_lock_irqsave(&fimc->slock, irq_flags);
1466 if (!list_empty(&fimc->vid_cap.active_buf_q)) {
1467 buf = list_entry(fimc->vid_cap.active_buf_q.next,
1468 struct fimc_vid_buffer, list);
1469 vb2_set_plane_payload(&buf->vb.vb2_buf, 0,
1470 *((u32 *)arg));
1471 }
1472 fimc_capture_irq_handler(fimc, 1);
1473 fimc_deactivate_capture(fimc);
1474 spin_unlock_irqrestore(&fimc->slock, irq_flags);
1475 }
1476 spin_unlock_irqrestore(&fmd->slock, flags);
1477}
1478
1479static int fimc_subdev_enum_mbus_code(struct v4l2_subdev *sd,
1480 struct v4l2_subdev_pad_config *cfg,
1481 struct v4l2_subdev_mbus_code_enum *code)
1482{
1483 struct fimc_fmt *fmt;
1484
1485 fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, code->index);
1486 if (!fmt)
1487 return -EINVAL;
1488 code->code = fmt->mbus_code;
1489 return 0;
1490}
1491
1492static int fimc_subdev_get_fmt(struct v4l2_subdev *sd,
1493 struct v4l2_subdev_pad_config *cfg,
1494 struct v4l2_subdev_format *fmt)
1495{
1496 struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1497 struct fimc_ctx *ctx = fimc->vid_cap.ctx;
1498 struct fimc_frame *ff = &ctx->s_frame;
1499 struct v4l2_mbus_framefmt *mf;
1500
1501 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1502 mf = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
1503 fmt->format = *mf;
1504 return 0;
1505 }
1506
1507 mf = &fmt->format;
1508 mutex_lock(&fimc->lock);
1509
1510 switch (fmt->pad) {
1511 case FIMC_SD_PAD_SOURCE:
1512 if (!WARN_ON(ff->fmt == NULL))
1513 mf->code = ff->fmt->mbus_code;
1514
1515 mf->width = ff->width;
1516 mf->height = ff->height;
1517 break;
1518 case FIMC_SD_PAD_SINK_FIFO:
1519 *mf = fimc->vid_cap.wb_fmt;
1520 break;
1521 case FIMC_SD_PAD_SINK_CAM:
1522 default:
1523 *mf = fimc->vid_cap.ci_fmt;
1524 break;
1525 }
1526
1527 mutex_unlock(&fimc->lock);
1528 mf->colorspace = V4L2_COLORSPACE_JPEG;
1529
1530 return 0;
1531}
1532
1533static int fimc_subdev_set_fmt(struct v4l2_subdev *sd,
1534 struct v4l2_subdev_pad_config *cfg,
1535 struct v4l2_subdev_format *fmt)
1536{
1537 struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1538 struct v4l2_mbus_framefmt *mf = &fmt->format;
1539 struct fimc_vid_cap *vc = &fimc->vid_cap;
1540 struct fimc_ctx *ctx = vc->ctx;
1541 struct fimc_frame *ff;
1542 struct fimc_fmt *ffmt;
1543
1544 dbg("pad%d: code: 0x%x, %dx%d",
1545 fmt->pad, mf->code, mf->width, mf->height);
1546
1547 if (fmt->pad == FIMC_SD_PAD_SOURCE && vb2_is_busy(&vc->vbq))
1548 return -EBUSY;
1549
1550 mutex_lock(&fimc->lock);
1551 ffmt = fimc_capture_try_format(ctx, &mf->width, &mf->height,
1552 &mf->code, NULL, fmt->pad);
1553 mutex_unlock(&fimc->lock);
1554 mf->colorspace = V4L2_COLORSPACE_JPEG;
1555
1556 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1557 mf = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
1558 *mf = fmt->format;
1559 return 0;
1560 }
1561
1562 if (WARN_ON(ffmt == NULL))
1563 return -EINVAL;
1564
1565
1566 fimc_alpha_ctrl_update(ctx);
1567
1568 fimc_capture_mark_jpeg_xfer(ctx, ffmt->color);
1569 if (fmt->pad == FIMC_SD_PAD_SOURCE) {
1570 ff = &ctx->d_frame;
1571
1572 mf->width = ctx->s_frame.width;
1573 mf->height = ctx->s_frame.height;
1574 } else {
1575 ff = &ctx->s_frame;
1576 }
1577
1578 mutex_lock(&fimc->lock);
1579 set_frame_bounds(ff, mf->width, mf->height);
1580
1581 if (fmt->pad == FIMC_SD_PAD_SINK_FIFO)
1582 vc->wb_fmt = *mf;
1583 else if (fmt->pad == FIMC_SD_PAD_SINK_CAM)
1584 vc->ci_fmt = *mf;
1585
1586 ff->fmt = ffmt;
1587
1588
1589 if (!(fmt->pad == FIMC_SD_PAD_SOURCE && (ctx->state & FIMC_COMPOSE)))
1590 set_frame_crop(ff, 0, 0, mf->width, mf->height);
1591
1592 if (fmt->pad != FIMC_SD_PAD_SOURCE)
1593 ctx->state &= ~FIMC_COMPOSE;
1594
1595 mutex_unlock(&fimc->lock);
1596 return 0;
1597}
1598
1599static int fimc_subdev_get_selection(struct v4l2_subdev *sd,
1600 struct v4l2_subdev_pad_config *cfg,
1601 struct v4l2_subdev_selection *sel)
1602{
1603 struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1604 struct fimc_ctx *ctx = fimc->vid_cap.ctx;
1605 struct fimc_frame *f = &ctx->s_frame;
1606 struct v4l2_rect *r = &sel->r;
1607 struct v4l2_rect *try_sel;
1608
1609 if (sel->pad == FIMC_SD_PAD_SOURCE)
1610 return -EINVAL;
1611
1612 mutex_lock(&fimc->lock);
1613
1614 switch (sel->target) {
1615 case V4L2_SEL_TGT_COMPOSE_BOUNDS:
1616 f = &ctx->d_frame;
1617
1618 case V4L2_SEL_TGT_CROP_BOUNDS:
1619 r->width = f->o_width;
1620 r->height = f->o_height;
1621 r->left = 0;
1622 r->top = 0;
1623 mutex_unlock(&fimc->lock);
1624 return 0;
1625
1626 case V4L2_SEL_TGT_CROP:
1627 try_sel = v4l2_subdev_get_try_crop(sd, cfg, sel->pad);
1628 break;
1629 case V4L2_SEL_TGT_COMPOSE:
1630 try_sel = v4l2_subdev_get_try_compose(sd, cfg, sel->pad);
1631 f = &ctx->d_frame;
1632 break;
1633 default:
1634 mutex_unlock(&fimc->lock);
1635 return -EINVAL;
1636 }
1637
1638 if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
1639 sel->r = *try_sel;
1640 } else {
1641 r->left = f->offs_h;
1642 r->top = f->offs_v;
1643 r->width = f->width;
1644 r->height = f->height;
1645 }
1646
1647 dbg("target %#x: l:%d, t:%d, %dx%d, f_w: %d, f_h: %d",
1648 sel->pad, r->left, r->top, r->width, r->height,
1649 f->f_width, f->f_height);
1650
1651 mutex_unlock(&fimc->lock);
1652 return 0;
1653}
1654
1655static int fimc_subdev_set_selection(struct v4l2_subdev *sd,
1656 struct v4l2_subdev_pad_config *cfg,
1657 struct v4l2_subdev_selection *sel)
1658{
1659 struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1660 struct fimc_ctx *ctx = fimc->vid_cap.ctx;
1661 struct fimc_frame *f = &ctx->s_frame;
1662 struct v4l2_rect *r = &sel->r;
1663 struct v4l2_rect *try_sel;
1664 unsigned long flags;
1665
1666 if (sel->pad == FIMC_SD_PAD_SOURCE)
1667 return -EINVAL;
1668
1669 mutex_lock(&fimc->lock);
1670 fimc_capture_try_selection(ctx, r, V4L2_SEL_TGT_CROP);
1671
1672 switch (sel->target) {
1673 case V4L2_SEL_TGT_CROP:
1674 try_sel = v4l2_subdev_get_try_crop(sd, cfg, sel->pad);
1675 break;
1676 case V4L2_SEL_TGT_COMPOSE:
1677 try_sel = v4l2_subdev_get_try_compose(sd, cfg, sel->pad);
1678 f = &ctx->d_frame;
1679 break;
1680 default:
1681 mutex_unlock(&fimc->lock);
1682 return -EINVAL;
1683 }
1684
1685 if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
1686 *try_sel = sel->r;
1687 } else {
1688 spin_lock_irqsave(&fimc->slock, flags);
1689 set_frame_crop(f, r->left, r->top, r->width, r->height);
1690 set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
1691 if (sel->target == V4L2_SEL_TGT_COMPOSE)
1692 ctx->state |= FIMC_COMPOSE;
1693 spin_unlock_irqrestore(&fimc->slock, flags);
1694 }
1695
1696 dbg("target %#x: (%d,%d)/%dx%d", sel->target, r->left, r->top,
1697 r->width, r->height);
1698
1699 mutex_unlock(&fimc->lock);
1700 return 0;
1701}
1702
1703static const struct v4l2_subdev_pad_ops fimc_subdev_pad_ops = {
1704 .enum_mbus_code = fimc_subdev_enum_mbus_code,
1705 .get_selection = fimc_subdev_get_selection,
1706 .set_selection = fimc_subdev_set_selection,
1707 .get_fmt = fimc_subdev_get_fmt,
1708 .set_fmt = fimc_subdev_set_fmt,
1709};
1710
1711static const struct v4l2_subdev_ops fimc_subdev_ops = {
1712 .pad = &fimc_subdev_pad_ops,
1713};
1714
1715
1716static int fimc_capture_set_default_format(struct fimc_dev *fimc)
1717{
1718 struct v4l2_format fmt = {
1719 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE,
1720 .fmt.pix_mp = {
1721 .width = FIMC_DEFAULT_WIDTH,
1722 .height = FIMC_DEFAULT_HEIGHT,
1723 .pixelformat = V4L2_PIX_FMT_YUYV,
1724 .field = V4L2_FIELD_NONE,
1725 .colorspace = V4L2_COLORSPACE_JPEG,
1726 },
1727 };
1728
1729 return __fimc_capture_set_format(fimc, &fmt);
1730}
1731
1732
1733static int fimc_register_capture_device(struct fimc_dev *fimc,
1734 struct v4l2_device *v4l2_dev)
1735{
1736 struct video_device *vfd = &fimc->vid_cap.ve.vdev;
1737 struct vb2_queue *q = &fimc->vid_cap.vbq;
1738 struct fimc_ctx *ctx;
1739 struct fimc_vid_cap *vid_cap;
1740 struct fimc_fmt *fmt;
1741 int ret = -ENOMEM;
1742
1743 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
1744 if (!ctx)
1745 return -ENOMEM;
1746
1747 ctx->fimc_dev = fimc;
1748 ctx->in_path = FIMC_IO_CAMERA;
1749 ctx->out_path = FIMC_IO_DMA;
1750 ctx->state = FIMC_CTX_CAP;
1751 ctx->s_frame.fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, 0);
1752 ctx->d_frame.fmt = ctx->s_frame.fmt;
1753
1754 memset(vfd, 0, sizeof(*vfd));
1755 snprintf(vfd->name, sizeof(vfd->name), "fimc.%d.capture", fimc->id);
1756
1757 vfd->fops = &fimc_capture_fops;
1758 vfd->ioctl_ops = &fimc_capture_ioctl_ops;
1759 vfd->v4l2_dev = v4l2_dev;
1760 vfd->minor = -1;
1761 vfd->release = video_device_release_empty;
1762 vfd->queue = q;
1763 vfd->lock = &fimc->lock;
1764 vfd->device_caps = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_CAPTURE_MPLANE;
1765
1766 video_set_drvdata(vfd, fimc);
1767 vid_cap = &fimc->vid_cap;
1768 vid_cap->active_buf_cnt = 0;
1769 vid_cap->reqbufs_count = 0;
1770 vid_cap->ctx = ctx;
1771
1772 INIT_LIST_HEAD(&vid_cap->pending_buf_q);
1773 INIT_LIST_HEAD(&vid_cap->active_buf_q);
1774
1775 memset(q, 0, sizeof(*q));
1776 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
1777 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF;
1778 q->drv_priv = ctx;
1779 q->ops = &fimc_capture_qops;
1780 q->mem_ops = &vb2_dma_contig_memops;
1781 q->buf_struct_size = sizeof(struct fimc_vid_buffer);
1782 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1783 q->lock = &fimc->lock;
1784 q->dev = &fimc->pdev->dev;
1785
1786 ret = vb2_queue_init(q);
1787 if (ret)
1788 goto err_free_ctx;
1789
1790
1791 fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, 0);
1792 vid_cap->ci_fmt.width = FIMC_DEFAULT_WIDTH;
1793 vid_cap->ci_fmt.height = FIMC_DEFAULT_HEIGHT;
1794 vid_cap->ci_fmt.code = fmt->mbus_code;
1795
1796 ctx->s_frame.width = FIMC_DEFAULT_WIDTH;
1797 ctx->s_frame.height = FIMC_DEFAULT_HEIGHT;
1798 ctx->s_frame.fmt = fmt;
1799
1800 fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_WRITEBACK, 0);
1801 vid_cap->wb_fmt = vid_cap->ci_fmt;
1802 vid_cap->wb_fmt.code = fmt->mbus_code;
1803
1804 vid_cap->vd_pad.flags = MEDIA_PAD_FL_SINK;
1805 vfd->entity.function = MEDIA_ENT_F_PROC_VIDEO_SCALER;
1806 ret = media_entity_pads_init(&vfd->entity, 1, &vid_cap->vd_pad);
1807 if (ret)
1808 goto err_free_ctx;
1809
1810 ret = fimc_ctrls_create(ctx);
1811 if (ret)
1812 goto err_me_cleanup;
1813
1814 ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
1815 if (ret)
1816 goto err_ctrl_free;
1817
1818 v4l2_info(v4l2_dev, "Registered %s as /dev/%s\n",
1819 vfd->name, video_device_node_name(vfd));
1820
1821 vfd->ctrl_handler = &ctx->ctrls.handler;
1822 return 0;
1823
1824err_ctrl_free:
1825 fimc_ctrls_delete(ctx);
1826err_me_cleanup:
1827 media_entity_cleanup(&vfd->entity);
1828err_free_ctx:
1829 kfree(ctx);
1830 return ret;
1831}
1832
1833static int fimc_capture_subdev_registered(struct v4l2_subdev *sd)
1834{
1835 struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1836 int ret;
1837
1838 if (fimc == NULL)
1839 return -ENXIO;
1840
1841 ret = fimc_register_m2m_device(fimc, sd->v4l2_dev);
1842 if (ret)
1843 return ret;
1844
1845 fimc->vid_cap.ve.pipe = v4l2_get_subdev_hostdata(sd);
1846
1847 ret = fimc_register_capture_device(fimc, sd->v4l2_dev);
1848 if (ret) {
1849 fimc_unregister_m2m_device(fimc);
1850 fimc->vid_cap.ve.pipe = NULL;
1851 }
1852
1853 return ret;
1854}
1855
1856static void fimc_capture_subdev_unregistered(struct v4l2_subdev *sd)
1857{
1858 struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
1859 struct video_device *vdev;
1860
1861 if (fimc == NULL)
1862 return;
1863
1864 mutex_lock(&fimc->lock);
1865
1866 fimc_unregister_m2m_device(fimc);
1867 vdev = &fimc->vid_cap.ve.vdev;
1868
1869 if (video_is_registered(vdev)) {
1870 video_unregister_device(vdev);
1871 media_entity_cleanup(&vdev->entity);
1872 fimc_ctrls_delete(fimc->vid_cap.ctx);
1873 fimc->vid_cap.ve.pipe = NULL;
1874 }
1875 kfree(fimc->vid_cap.ctx);
1876 fimc->vid_cap.ctx = NULL;
1877
1878 mutex_unlock(&fimc->lock);
1879}
1880
1881static const struct v4l2_subdev_internal_ops fimc_capture_sd_internal_ops = {
1882 .registered = fimc_capture_subdev_registered,
1883 .unregistered = fimc_capture_subdev_unregistered,
1884};
1885
1886int fimc_initialize_capture_subdev(struct fimc_dev *fimc)
1887{
1888 struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
1889 int ret;
1890
1891 v4l2_subdev_init(sd, &fimc_subdev_ops);
1892 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1893 snprintf(sd->name, sizeof(sd->name), "FIMC.%d", fimc->id);
1894
1895 fimc->vid_cap.sd_pads[FIMC_SD_PAD_SINK_CAM].flags = MEDIA_PAD_FL_SINK;
1896 fimc->vid_cap.sd_pads[FIMC_SD_PAD_SINK_FIFO].flags = MEDIA_PAD_FL_SINK;
1897 fimc->vid_cap.sd_pads[FIMC_SD_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
1898 ret = media_entity_pads_init(&sd->entity, FIMC_SD_PADS_NUM,
1899 fimc->vid_cap.sd_pads);
1900 if (ret)
1901 return ret;
1902
1903 sd->entity.ops = &fimc_sd_media_ops;
1904 sd->internal_ops = &fimc_capture_sd_internal_ops;
1905 v4l2_set_subdevdata(sd, fimc);
1906 return 0;
1907}
1908
1909void fimc_unregister_capture_subdev(struct fimc_dev *fimc)
1910{
1911 struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
1912
1913 v4l2_device_unregister_subdev(sd);
1914 media_entity_cleanup(&sd->entity);
1915 v4l2_set_subdevdata(sd, NULL);
1916}
1917