LXR linux/drivers/media/platform/qcom/camss/camss-csiphy.h

   1/* SPDX-License-Identifier: GPL-2.0 */
   2/*
   3 * camss-csiphy.h
   4 *
   5 * Qualcomm MSM Camera Subsystem - CSIPHY Module
   6 *
   7 * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.
   8 * Copyright (C) 2016-2018 Linaro Ltd.
   9 */
  10#ifndef QC_MSM_CAMSS_CSIPHY_H
  11#define QC_MSM_CAMSS_CSIPHY_H
  12
  13#include <linux/clk.h>
  14#include <linux/interrupt.h>
  15#include <media/media-entity.h>
  16#include <media/v4l2-device.h>
  17#include <media/v4l2-mediabus.h>
  18#include <media/v4l2-subdev.h>
  19
  20#define MSM_CSIPHY_PAD_SINK 0
  21#define MSM_CSIPHY_PAD_SRC 1
  22#define MSM_CSIPHY_PADS_NUM 2
  23
  24struct csiphy_lane {
  25        u8 pos;
  26        u8 pol;
  27};
  28
  29struct csiphy_lanes_cfg {
  30        int num_data;
  31        struct csiphy_lane *data;
  32        struct csiphy_lane clk;
  33};
  34
  35struct csiphy_csi2_cfg {
  36        struct csiphy_lanes_cfg lane_cfg;
  37};
  38
  39struct csiphy_config {
  40        u8 combo_mode;
  41        u8 csid_id;
  42        struct csiphy_csi2_cfg *csi2;
  43};
  44
  45struct csiphy_device;
  46
  47struct csiphy_hw_ops {
  48        void (*hw_version_read)(struct csiphy_device *csiphy,
  49                                struct device *dev);
  50        void (*reset)(struct csiphy_device *csiphy);
  51        void (*lanes_enable)(struct csiphy_device *csiphy,
  52                             struct csiphy_config *cfg,
  53                             u32 pixel_clock, u8 bpp, u8 lane_mask);
  54        void (*lanes_disable)(struct csiphy_device *csiphy,
  55                              struct csiphy_config *cfg);
  56        irqreturn_t (*isr)(int irq, void *dev);
  57};
  58
  59struct csiphy_device {
  60        struct camss *camss;
  61        u8 id;
  62        struct v4l2_subdev subdev;
  63        struct media_pad pads[MSM_CSIPHY_PADS_NUM];
  64        void __iomem *base;
  65        void __iomem *base_clk_mux;
  66        u32 irq;
  67        char irq_name[30];
  68        struct camss_clock *clock;
  69        int nclocks;
  70        u32 timer_clk_rate;
  71        struct csiphy_config cfg;
  72        struct v4l2_mbus_framefmt fmt[MSM_CSIPHY_PADS_NUM];
  73        const struct csiphy_hw_ops *ops;
  74        const struct csiphy_format *formats;
  75        unsigned int nformats;
  76};
  77
  78struct resources;
  79
  80int msm_csiphy_subdev_init(struct camss *camss,
  81                           struct csiphy_device *csiphy,
  82                           const struct resources *res, u8 id);
  83
  84int msm_csiphy_register_entity(struct csiphy_device *csiphy,
  85                               struct v4l2_device *v4l2_dev);
  86
  87void msm_csiphy_unregister_entity(struct csiphy_device *csiphy);
  88
  89extern const struct csiphy_hw_ops csiphy_ops_2ph_1_0;
  90extern const struct csiphy_hw_ops csiphy_ops_3ph_1_0;
  91
  92#endif /* QC_MSM_CAMSS_CSIPHY_H */
  93