1
2
3
4
5
6
7
8
9
10#ifndef _TI_VPDMA_PRIV_H_
11#define _TI_VPDMA_PRIV_H_
12
13
14
15
16
17
18#define VPDMA_PID 0x00
19#define VPDMA_LIST_ADDR 0x04
20#define VPDMA_LIST_ATTR 0x08
21#define VPDMA_LIST_STAT_SYNC 0x0c
22#define VPDMA_BG_RGB 0x18
23#define VPDMA_BG_YUV 0x1c
24#define VPDMA_SETUP 0x30
25#define VPDMA_MAX_SIZE1 0x34
26#define VPDMA_MAX_SIZE2 0x38
27#define VPDMA_MAX_SIZE3 0x3c
28#define VPDMA_MAX_SIZE_WIDTH_MASK 0xffff
29#define VPDMA_MAX_SIZE_WIDTH_SHFT 16
30#define VPDMA_MAX_SIZE_HEIGHT_MASK 0xffff
31#define VPDMA_MAX_SIZE_HEIGHT_SHFT 0
32
33
34#define VPDMA_INT_CHAN_STAT(grp) (0x40 + grp * 8)
35#define VPDMA_INT_CHAN_MASK(grp) (VPDMA_INT_CHAN_STAT(grp) + 4)
36#define VPDMA_INT_CLIENT0_STAT 0x78
37#define VPDMA_INT_CLIENT0_MASK 0x7c
38#define VPDMA_INT_CLIENT1_STAT 0x80
39#define VPDMA_INT_CLIENT1_MASK 0x84
40#define VPDMA_INT_LIST0_STAT 0x88
41#define VPDMA_INT_LIST0_MASK 0x8c
42
43#define VPDMA_INTX_OFFSET 0x50
44
45#define VPDMA_PERFMON(i) (0x200 + i * 4)
46
47
48#define VPDMA_DEI_CHROMA1_CSTAT 0x0300
49#define VPDMA_DEI_LUMA1_CSTAT 0x0304
50#define VPDMA_DEI_LUMA2_CSTAT 0x0308
51#define VPDMA_DEI_CHROMA2_CSTAT 0x030c
52#define VPDMA_DEI_LUMA3_CSTAT 0x0310
53#define VPDMA_DEI_CHROMA3_CSTAT 0x0314
54#define VPDMA_DEI_MV_IN_CSTAT 0x0330
55#define VPDMA_DEI_MV_OUT_CSTAT 0x033c
56#define VPDMA_VIP_LO_Y_CSTAT 0x0388
57#define VPDMA_VIP_LO_UV_CSTAT 0x038c
58#define VPDMA_VIP_UP_Y_CSTAT 0x0390
59#define VPDMA_VIP_UP_UV_CSTAT 0x0394
60#define VPDMA_VPI_CTL_CSTAT 0x03d0
61
62
63#define VPDMA_CSTAT_LINE_MODE_MASK 0x03
64#define VPDMA_CSTAT_LINE_MODE_SHIFT 8
65#define VPDMA_CSTAT_FRAME_START_MASK 0xf
66#define VPDMA_CSTAT_FRAME_START_SHIFT 10
67
68#define VPDMA_LIST_NUM_MASK 0x07
69#define VPDMA_LIST_NUM_SHFT 24
70#define VPDMA_LIST_STOP_SHFT 20
71#define VPDMA_LIST_RDY_MASK 0x01
72#define VPDMA_LIST_RDY_SHFT 19
73#define VPDMA_LIST_TYPE_MASK 0x03
74#define VPDMA_LIST_TYPE_SHFT 16
75#define VPDMA_LIST_SIZE_MASK 0xffff
76
77
78
79
80
81
82
83
84
85
86
87
88
89#define DATA_TYPE_Y444 0x0
90#define DATA_TYPE_Y422 0x1
91#define DATA_TYPE_Y420 0x2
92#define DATA_TYPE_C444 0x4
93#define DATA_TYPE_C422 0x5
94#define DATA_TYPE_C420 0x6
95#define DATA_TYPE_YC444 0x8
96#define DATA_TYPE_YCB422 0x7
97#define DATA_TYPE_YCR422 0x17
98#define DATA_TYPE_CBY422 0x27
99#define DATA_TYPE_CRY422 0x37
100
101
102
103
104
105
106
107
108
109
110#define DATA_TYPE_RGB16_565 0x10
111#define DATA_TYPE_ARGB_1555 0x13
112#define DATA_TYPE_ARGB_4444 0x14
113#define DATA_TYPE_RGBA_5551 0x11
114#define DATA_TYPE_RGBA_4444 0x12
115#define DATA_TYPE_ARGB24_6666 0x18
116#define DATA_TYPE_RGB24_888 0x16
117#define DATA_TYPE_ARGB32_8888 0x17
118#define DATA_TYPE_RGBA24_6666 0x15
119#define DATA_TYPE_RGBA32_8888 0x19
120#define DATA_TYPE_BGR16_565 0x0
121#define DATA_TYPE_ABGR_1555 0x3
122#define DATA_TYPE_ABGR_4444 0x4
123#define DATA_TYPE_BGRA_5551 0x1
124#define DATA_TYPE_BGRA_4444 0x2
125#define DATA_TYPE_ABGR24_6666 0x8
126#define DATA_TYPE_BGR24_888 0x6
127#define DATA_TYPE_ABGR32_8888 0x7
128#define DATA_TYPE_BGRA24_6666 0x5
129#define DATA_TYPE_BGRA32_8888 0x9
130
131#define DATA_TYPE_MV 0x3
132
133
134#define VPE_CHAN_NUM_LUMA1_IN 0
135#define VPE_CHAN_NUM_CHROMA1_IN 1
136#define VPE_CHAN_NUM_LUMA2_IN 2
137#define VPE_CHAN_NUM_CHROMA2_IN 3
138#define VPE_CHAN_NUM_LUMA3_IN 4
139#define VPE_CHAN_NUM_CHROMA3_IN 5
140#define VPE_CHAN_NUM_MV_IN 12
141#define VPE_CHAN_NUM_MV_OUT 15
142#define VIP1_CHAN_NUM_MULT_PORT_A_SRC0 38
143#define VIP1_CHAN_NUM_MULT_ANC_A_SRC0 70
144#define VPE_CHAN_NUM_LUMA_OUT 102
145#define VPE_CHAN_NUM_CHROMA_OUT 103
146#define VIP1_CHAN_NUM_PORT_A_LUMA 102
147#define VIP1_CHAN_NUM_PORT_A_CHROMA 103
148#define VPE_CHAN_NUM_RGB_OUT 106
149#define VIP1_CHAN_NUM_PORT_A_RGB 106
150#define VIP1_CHAN_NUM_PORT_B_RGB 107
151
152
153
154
155
156
157#define VPDMA_ADB_SIZE_ALIGN 0x0f
158
159
160
161
162struct vpdma_dtd {
163 u32 type_ctl_stride;
164 union {
165 u32 xfer_length_height;
166 u32 w1;
167 };
168 dma_addr_t start_addr;
169 u32 pkt_ctl;
170 union {
171 u32 frame_width_height;
172 dma_addr_t desc_write_addr;
173 };
174 union {
175 u32 start_h_v;
176 u32 max_width_height;
177 };
178 u32 client_attr0;
179 u32 client_attr1;
180};
181
182
183#define DTD_NO_NOTIFY 0
184#define DTD_NOTIFY 1
185
186#define DTD_PKT_TYPE 0xa
187#define DTD_DIR_IN 0
188#define DTD_DIR_OUT 1
189
190
191#define DTD_DATA_TYPE_MASK 0x3f
192#define DTD_DATA_TYPE_SHFT 26
193#define DTD_NOTIFY_MASK 0x01
194#define DTD_NOTIFY_SHFT 25
195#define DTD_FIELD_MASK 0x01
196#define DTD_FIELD_SHFT 24
197#define DTD_1D_MASK 0x01
198#define DTD_1D_SHFT 23
199#define DTD_EVEN_LINE_SKIP_MASK 0x01
200#define DTD_EVEN_LINE_SKIP_SHFT 20
201#define DTD_ODD_LINE_SKIP_MASK 0x01
202#define DTD_ODD_LINE_SKIP_SHFT 16
203#define DTD_LINE_STRIDE_MASK 0xffff
204#define DTD_LINE_STRIDE_SHFT 0
205
206
207#define DTD_LINE_LENGTH_MASK 0xffff
208#define DTD_LINE_LENGTH_SHFT 16
209#define DTD_XFER_HEIGHT_MASK 0xffff
210#define DTD_XFER_HEIGHT_SHFT 0
211
212
213#define DTD_PKT_TYPE_MASK 0x1f
214#define DTD_PKT_TYPE_SHFT 27
215#define DTD_MODE_MASK 0x01
216#define DTD_MODE_SHFT 26
217#define DTD_DIR_MASK 0x01
218#define DTD_DIR_SHFT 25
219#define DTD_CHAN_MASK 0x01ff
220#define DTD_CHAN_SHFT 16
221#define DTD_PRI_MASK 0x0f
222#define DTD_PRI_SHFT 9
223#define DTD_NEXT_CHAN_MASK 0x01ff
224#define DTD_NEXT_CHAN_SHFT 0
225
226
227#define DTD_FRAME_WIDTH_MASK 0xffff
228#define DTD_FRAME_WIDTH_SHFT 16
229#define DTD_FRAME_HEIGHT_MASK 0xffff
230#define DTD_FRAME_HEIGHT_SHFT 0
231
232
233#define DTD_H_START_MASK 0xffff
234#define DTD_H_START_SHFT 16
235#define DTD_V_START_MASK 0xffff
236#define DTD_V_START_SHFT 0
237
238#define DTD_DESC_START_MASK 0xffffffe0
239#define DTD_DESC_START_SHIFT 5
240#define DTD_WRITE_DESC_MASK 0x01
241#define DTD_WRITE_DESC_SHIFT 2
242#define DTD_DROP_DATA_MASK 0x01
243#define DTD_DROP_DATA_SHIFT 1
244#define DTD_USE_DESC_MASK 0x01
245#define DTD_USE_DESC_SHIFT 0
246
247
248#define DTD_MAX_WIDTH_MASK 0x07
249#define DTD_MAX_WIDTH_SHFT 4
250#define DTD_MAX_HEIGHT_MASK 0x07
251#define DTD_MAX_HEIGHT_SHFT 0
252
253static inline u32 dtd_type_ctl_stride(int type, bool notify, int field,
254 bool one_d, bool even_line_skip, bool odd_line_skip,
255 int line_stride)
256{
257 return (type << DTD_DATA_TYPE_SHFT) | (notify << DTD_NOTIFY_SHFT) |
258 (field << DTD_FIELD_SHFT) | (one_d << DTD_1D_SHFT) |
259 (even_line_skip << DTD_EVEN_LINE_SKIP_SHFT) |
260 (odd_line_skip << DTD_ODD_LINE_SKIP_SHFT) |
261 line_stride;
262}
263
264static inline u32 dtd_xfer_length_height(int line_length, int xfer_height)
265{
266 return (line_length << DTD_LINE_LENGTH_SHFT) | xfer_height;
267}
268
269static inline u32 dtd_pkt_ctl(bool mode, bool dir, int chan, int pri,
270 int next_chan)
271{
272 return (DTD_PKT_TYPE << DTD_PKT_TYPE_SHFT) | (mode << DTD_MODE_SHFT) |
273 (dir << DTD_DIR_SHFT) | (chan << DTD_CHAN_SHFT) |
274 (pri << DTD_PRI_SHFT) | next_chan;
275}
276
277static inline u32 dtd_frame_width_height(int width, int height)
278{
279 return (width << DTD_FRAME_WIDTH_SHFT) | height;
280}
281
282static inline u32 dtd_desc_write_addr(unsigned int addr, bool write_desc,
283 bool drop_data, bool use_desc)
284{
285 return (addr & DTD_DESC_START_MASK) |
286 (write_desc << DTD_WRITE_DESC_SHIFT) |
287 (drop_data << DTD_DROP_DATA_SHIFT) |
288 use_desc;
289}
290
291static inline u32 dtd_start_h_v(int h_start, int v_start)
292{
293 return (h_start << DTD_H_START_SHFT) | v_start;
294}
295
296static inline u32 dtd_max_width_height(int max_width, int max_height)
297{
298 return (max_width << DTD_MAX_WIDTH_SHFT) | max_height;
299}
300
301static inline int dtd_get_data_type(struct vpdma_dtd *dtd)
302{
303 return dtd->type_ctl_stride >> DTD_DATA_TYPE_SHFT;
304}
305
306static inline bool dtd_get_notify(struct vpdma_dtd *dtd)
307{
308 return (dtd->type_ctl_stride >> DTD_NOTIFY_SHFT) & DTD_NOTIFY_MASK;
309}
310
311static inline int dtd_get_field(struct vpdma_dtd *dtd)
312{
313 return (dtd->type_ctl_stride >> DTD_FIELD_SHFT) & DTD_FIELD_MASK;
314}
315
316static inline bool dtd_get_1d(struct vpdma_dtd *dtd)
317{
318 return (dtd->type_ctl_stride >> DTD_1D_SHFT) & DTD_1D_MASK;
319}
320
321static inline bool dtd_get_even_line_skip(struct vpdma_dtd *dtd)
322{
323 return (dtd->type_ctl_stride >> DTD_EVEN_LINE_SKIP_SHFT)
324 & DTD_EVEN_LINE_SKIP_MASK;
325}
326
327static inline bool dtd_get_odd_line_skip(struct vpdma_dtd *dtd)
328{
329 return (dtd->type_ctl_stride >> DTD_ODD_LINE_SKIP_SHFT)
330 & DTD_ODD_LINE_SKIP_MASK;
331}
332
333static inline int dtd_get_line_stride(struct vpdma_dtd *dtd)
334{
335 return dtd->type_ctl_stride & DTD_LINE_STRIDE_MASK;
336}
337
338static inline int dtd_get_line_length(struct vpdma_dtd *dtd)
339{
340 return dtd->xfer_length_height >> DTD_LINE_LENGTH_SHFT;
341}
342
343static inline int dtd_get_xfer_height(struct vpdma_dtd *dtd)
344{
345 return dtd->xfer_length_height & DTD_XFER_HEIGHT_MASK;
346}
347
348static inline int dtd_get_pkt_type(struct vpdma_dtd *dtd)
349{
350 return dtd->pkt_ctl >> DTD_PKT_TYPE_SHFT;
351}
352
353static inline bool dtd_get_mode(struct vpdma_dtd *dtd)
354{
355 return (dtd->pkt_ctl >> DTD_MODE_SHFT) & DTD_MODE_MASK;
356}
357
358static inline bool dtd_get_dir(struct vpdma_dtd *dtd)
359{
360 return (dtd->pkt_ctl >> DTD_DIR_SHFT) & DTD_DIR_MASK;
361}
362
363static inline int dtd_get_chan(struct vpdma_dtd *dtd)
364{
365 return (dtd->pkt_ctl >> DTD_CHAN_SHFT) & DTD_CHAN_MASK;
366}
367
368static inline int dtd_get_priority(struct vpdma_dtd *dtd)
369{
370 return (dtd->pkt_ctl >> DTD_PRI_SHFT) & DTD_PRI_MASK;
371}
372
373static inline int dtd_get_next_chan(struct vpdma_dtd *dtd)
374{
375 return (dtd->pkt_ctl >> DTD_NEXT_CHAN_SHFT) & DTD_NEXT_CHAN_MASK;
376}
377
378static inline int dtd_get_frame_width(struct vpdma_dtd *dtd)
379{
380 return dtd->frame_width_height >> DTD_FRAME_WIDTH_SHFT;
381}
382
383static inline int dtd_get_frame_height(struct vpdma_dtd *dtd)
384{
385 return dtd->frame_width_height & DTD_FRAME_HEIGHT_MASK;
386}
387
388static inline int dtd_get_desc_write_addr(struct vpdma_dtd *dtd)
389{
390 return dtd->desc_write_addr & DTD_DESC_START_MASK;
391}
392
393static inline bool dtd_get_write_desc(struct vpdma_dtd *dtd)
394{
395 return (dtd->desc_write_addr >> DTD_WRITE_DESC_SHIFT) &
396 DTD_WRITE_DESC_MASK;
397}
398
399static inline bool dtd_get_drop_data(struct vpdma_dtd *dtd)
400{
401 return (dtd->desc_write_addr >> DTD_DROP_DATA_SHIFT) &
402 DTD_DROP_DATA_MASK;
403}
404
405static inline bool dtd_get_use_desc(struct vpdma_dtd *dtd)
406{
407 return dtd->desc_write_addr & DTD_USE_DESC_MASK;
408}
409
410static inline int dtd_get_h_start(struct vpdma_dtd *dtd)
411{
412 return dtd->start_h_v >> DTD_H_START_SHFT;
413}
414
415static inline int dtd_get_v_start(struct vpdma_dtd *dtd)
416{
417 return dtd->start_h_v & DTD_V_START_MASK;
418}
419
420static inline int dtd_get_max_width(struct vpdma_dtd *dtd)
421{
422 return (dtd->max_width_height >> DTD_MAX_WIDTH_SHFT) &
423 DTD_MAX_WIDTH_MASK;
424}
425
426static inline int dtd_get_max_height(struct vpdma_dtd *dtd)
427{
428 return (dtd->max_width_height >> DTD_MAX_HEIGHT_SHFT) &
429 DTD_MAX_HEIGHT_MASK;
430}
431
432
433
434
435struct vpdma_cfd {
436 union {
437 u32 dest_addr_offset;
438 u32 w0;
439 };
440 union {
441 u32 block_len;
442 u32 w1;
443 };
444 u32 payload_addr;
445 u32 ctl_payload_len;
446};
447
448
449
450#define CFD_PKT_TYPE 0xb
451
452#define CFD_DIRECT 1
453#define CFD_INDIRECT 0
454#define CFD_CLS_ADB 0
455#define CFD_CLS_BLOCK 1
456
457
458#define CFD__BLOCK_LEN_MASK 0xffff
459#define CFD__BLOCK_LEN_SHFT 0
460
461
462#define CFD_PKT_TYPE_MASK 0x1f
463#define CFD_PKT_TYPE_SHFT 27
464#define CFD_DIRECT_MASK 0x01
465#define CFD_DIRECT_SHFT 26
466#define CFD_CLASS_MASK 0x03
467#define CFD_CLASS_SHFT 24
468#define CFD_DEST_MASK 0xff
469#define CFD_DEST_SHFT 16
470#define CFD_PAYLOAD_LEN_MASK 0xffff
471#define CFD_PAYLOAD_LEN_SHFT 0
472
473static inline u32 cfd_pkt_payload_len(bool direct, int cls, int dest,
474 int payload_len)
475{
476 return (CFD_PKT_TYPE << CFD_PKT_TYPE_SHFT) |
477 (direct << CFD_DIRECT_SHFT) |
478 (cls << CFD_CLASS_SHFT) |
479 (dest << CFD_DEST_SHFT) |
480 payload_len;
481}
482
483static inline int cfd_get_pkt_type(struct vpdma_cfd *cfd)
484{
485 return cfd->ctl_payload_len >> CFD_PKT_TYPE_SHFT;
486}
487
488static inline bool cfd_get_direct(struct vpdma_cfd *cfd)
489{
490 return (cfd->ctl_payload_len >> CFD_DIRECT_SHFT) & CFD_DIRECT_MASK;
491}
492
493static inline bool cfd_get_class(struct vpdma_cfd *cfd)
494{
495 return (cfd->ctl_payload_len >> CFD_CLASS_SHFT) & CFD_CLASS_MASK;
496}
497
498static inline int cfd_get_dest(struct vpdma_cfd *cfd)
499{
500 return (cfd->ctl_payload_len >> CFD_DEST_SHFT) & CFD_DEST_MASK;
501}
502
503static inline int cfd_get_payload_len(struct vpdma_cfd *cfd)
504{
505 return cfd->ctl_payload_len & CFD_PAYLOAD_LEN_MASK;
506}
507
508
509
510
511struct vpdma_ctd {
512 union {
513 u32 timer_value;
514 u32 list_addr;
515 u32 w0;
516 };
517 union {
518 u32 pixel_line_count;
519 u32 list_size;
520 u32 w1;
521 };
522 union {
523 u32 event;
524 u32 fid_ctl;
525 u32 w2;
526 };
527 u32 type_source_ctl;
528};
529
530
531#define CTD_TYPE_SYNC_ON_CLIENT 0
532#define CTD_TYPE_SYNC_ON_LIST 1
533#define CTD_TYPE_SYNC_ON_EXT 2
534#define CTD_TYPE_SYNC_ON_LM_TIMER 3
535#define CTD_TYPE_SYNC_ON_CHANNEL 4
536#define CTD_TYPE_CHNG_CLIENT_IRQ 5
537#define CTD_TYPE_SEND_IRQ 6
538#define CTD_TYPE_RELOAD_LIST 7
539#define CTD_TYPE_ABORT_CHANNEL 8
540
541#define CTD_PKT_TYPE 0xc
542
543
544#define CTD_TIMER_VALUE_MASK 0xffff
545#define CTD_TIMER_VALUE_SHFT 0
546
547
548#define CTD_PIXEL_COUNT_MASK 0xffff
549#define CTD_PIXEL_COUNT_SHFT 16
550#define CTD_LINE_COUNT_MASK 0xffff
551#define CTD_LINE_COUNT_SHFT 0
552
553
554#define CTD_LIST_SIZE_MASK 0xffff
555#define CTD_LIST_SIZE_SHFT 0
556
557
558#define CTD_EVENT_MASK 0x0f
559#define CTD_EVENT_SHFT 0
560
561
562#define CTD_FID2_MASK 0x03
563#define CTD_FID2_SHFT 4
564#define CTD_FID1_MASK 0x03
565#define CTD_FID1_SHFT 2
566#define CTD_FID0_MASK 0x03
567#define CTD_FID0_SHFT 0
568
569
570#define CTD_PKT_TYPE_MASK 0x1f
571#define CTD_PKT_TYPE_SHFT 27
572#define CTD_SOURCE_MASK 0xff
573#define CTD_SOURCE_SHFT 16
574#define CTD_CONTROL_MASK 0x0f
575#define CTD_CONTROL_SHFT 0
576
577static inline u32 ctd_pixel_line_count(int pixel_count, int line_count)
578{
579 return (pixel_count << CTD_PIXEL_COUNT_SHFT) | line_count;
580}
581
582static inline u32 ctd_set_fid_ctl(int fid0, int fid1, int fid2)
583{
584 return (fid2 << CTD_FID2_SHFT) | (fid1 << CTD_FID1_SHFT) | fid0;
585}
586
587static inline u32 ctd_type_source_ctl(int source, int control)
588{
589 return (CTD_PKT_TYPE << CTD_PKT_TYPE_SHFT) |
590 (source << CTD_SOURCE_SHFT) | control;
591}
592
593static inline u32 ctd_get_pixel_count(struct vpdma_ctd *ctd)
594{
595 return ctd->pixel_line_count >> CTD_PIXEL_COUNT_SHFT;
596}
597
598static inline int ctd_get_line_count(struct vpdma_ctd *ctd)
599{
600 return ctd->pixel_line_count & CTD_LINE_COUNT_MASK;
601}
602
603static inline int ctd_get_event(struct vpdma_ctd *ctd)
604{
605 return ctd->event & CTD_EVENT_MASK;
606}
607
608static inline int ctd_get_fid2_ctl(struct vpdma_ctd *ctd)
609{
610 return (ctd->fid_ctl >> CTD_FID2_SHFT) & CTD_FID2_MASK;
611}
612
613static inline int ctd_get_fid1_ctl(struct vpdma_ctd *ctd)
614{
615 return (ctd->fid_ctl >> CTD_FID1_SHFT) & CTD_FID1_MASK;
616}
617
618static inline int ctd_get_fid0_ctl(struct vpdma_ctd *ctd)
619{
620 return ctd->fid_ctl & CTD_FID2_MASK;
621}
622
623static inline int ctd_get_pkt_type(struct vpdma_ctd *ctd)
624{
625 return ctd->type_source_ctl >> CTD_PKT_TYPE_SHFT;
626}
627
628static inline int ctd_get_source(struct vpdma_ctd *ctd)
629{
630 return (ctd->type_source_ctl >> CTD_SOURCE_SHFT) & CTD_SOURCE_MASK;
631}
632
633static inline int ctd_get_ctl(struct vpdma_ctd *ctd)
634{
635 return ctd->type_source_ctl & CTD_CONTROL_MASK;
636}
637
638#endif
639