1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79#include <linux/kernel.h>
80#include <linux/module.h>
81#include <linux/uaccess.h>
82#include <linux/types.h>
83#include <linux/init.h>
84#include <linux/ptrace.h>
85#include <linux/slab.h>
86#include <linux/string.h>
87#include <linux/timer.h>
88#include <linux/major.h>
89#include <linux/fs.h>
90#include <linux/ioctl.h>
91#include <asm/io.h>
92#include <linux/pci.h>
93#include <linux/mtd/mtd.h>
94
95#define PMC551_VERSION \
96 "Ramix PMC551 PCI Mezzanine Ram Driver. (C) 1999,2000 Nortel Networks.\n"
97
98#define PCI_VENDOR_ID_V3_SEMI 0x11b0
99#define PCI_DEVICE_ID_V3_SEMI_V370PDC 0x0200
100
101#define PMC551_PCI_MEM_MAP0 0x50
102#define PMC551_PCI_MEM_MAP1 0x54
103#define PMC551_PCI_MEM_MAP_MAP_ADDR_MASK 0x3ff00000
104#define PMC551_PCI_MEM_MAP_APERTURE_MASK 0x000000f0
105#define PMC551_PCI_MEM_MAP_REG_EN 0x00000002
106#define PMC551_PCI_MEM_MAP_ENABLE 0x00000001
107
108#define PMC551_SDRAM_MA 0x60
109#define PMC551_SDRAM_CMD 0x62
110#define PMC551_DRAM_CFG 0x64
111#define PMC551_SYS_CTRL_REG 0x78
112
113#define PMC551_DRAM_BLK0 0x68
114#define PMC551_DRAM_BLK1 0x6c
115#define PMC551_DRAM_BLK2 0x70
116#define PMC551_DRAM_BLK3 0x74
117#define PMC551_DRAM_BLK_GET_SIZE(x) (524288 << ((x >> 4) & 0x0f))
118#define PMC551_DRAM_BLK_SET_COL_MUX(x, v) (((x) & ~0x00007000) | (((v) & 0x7) << 12))
119#define PMC551_DRAM_BLK_SET_ROW_MUX(x, v) (((x) & ~0x00000f00) | (((v) & 0xf) << 8))
120
121struct mypriv {
122 struct pci_dev *dev;
123 u_char *start;
124 u32 base_map0;
125 u32 curr_map0;
126 u32 asize;
127 struct mtd_info *nextpmc551;
128};
129
130static struct mtd_info *pmc551list;
131
132static int pmc551_point(struct mtd_info *mtd, loff_t from, size_t len,
133 size_t *retlen, void **virt, resource_size_t *phys);
134
135static int pmc551_erase(struct mtd_info *mtd, struct erase_info *instr)
136{
137 struct mypriv *priv = mtd->priv;
138 u32 soff_hi, soff_lo;
139 u32 eoff_hi, eoff_lo;
140 unsigned long end;
141 u_char *ptr;
142 size_t retlen;
143
144#ifdef CONFIG_MTD_PMC551_DEBUG
145 printk(KERN_DEBUG "pmc551_erase(pos:%ld, len:%ld)\n", (long)instr->addr,
146 (long)instr->len);
147#endif
148
149 end = instr->addr + instr->len - 1;
150 eoff_hi = end & ~(priv->asize - 1);
151 soff_hi = instr->addr & ~(priv->asize - 1);
152 eoff_lo = end & (priv->asize - 1);
153 soff_lo = instr->addr & (priv->asize - 1);
154
155 pmc551_point(mtd, instr->addr, instr->len, &retlen,
156 (void **)&ptr, NULL);
157
158 if (soff_hi == eoff_hi || mtd->size == priv->asize) {
159
160
161 memset(ptr, 0xff, instr->len);
162 } else {
163
164
165 while (soff_hi != eoff_hi) {
166#ifdef CONFIG_MTD_PMC551_DEBUG
167 printk(KERN_DEBUG "pmc551_erase() soff_hi: %ld, "
168 "eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
169#endif
170 memset(ptr, 0xff, priv->asize);
171 if (soff_hi + priv->asize >= mtd->size) {
172 goto out;
173 }
174 soff_hi += priv->asize;
175 pmc551_point(mtd, (priv->base_map0 | soff_hi),
176 priv->asize, &retlen,
177 (void **)&ptr, NULL);
178 }
179 memset(ptr, 0xff, eoff_lo);
180 }
181
182 out:
183#ifdef CONFIG_MTD_PMC551_DEBUG
184 printk(KERN_DEBUG "pmc551_erase() done\n");
185#endif
186
187 return 0;
188}
189
190static int pmc551_point(struct mtd_info *mtd, loff_t from, size_t len,
191 size_t *retlen, void **virt, resource_size_t *phys)
192{
193 struct mypriv *priv = mtd->priv;
194 u32 soff_hi;
195 u32 soff_lo;
196
197#ifdef CONFIG_MTD_PMC551_DEBUG
198 printk(KERN_DEBUG "pmc551_point(%ld, %ld)\n", (long)from, (long)len);
199#endif
200
201 soff_hi = from & ~(priv->asize - 1);
202 soff_lo = from & (priv->asize - 1);
203
204
205 if (priv->curr_map0 != from) {
206 pci_write_config_dword(priv->dev, PMC551_PCI_MEM_MAP0,
207 (priv->base_map0 | soff_hi));
208 priv->curr_map0 = soff_hi;
209 }
210
211 *virt = priv->start + soff_lo;
212 *retlen = len;
213 return 0;
214}
215
216static int pmc551_unpoint(struct mtd_info *mtd, loff_t from, size_t len)
217{
218#ifdef CONFIG_MTD_PMC551_DEBUG
219 printk(KERN_DEBUG "pmc551_unpoint()\n");
220#endif
221 return 0;
222}
223
224static int pmc551_read(struct mtd_info *mtd, loff_t from, size_t len,
225 size_t * retlen, u_char * buf)
226{
227 struct mypriv *priv = mtd->priv;
228 u32 soff_hi, soff_lo;
229 u32 eoff_hi, eoff_lo;
230 unsigned long end;
231 u_char *ptr;
232 u_char *copyto = buf;
233
234#ifdef CONFIG_MTD_PMC551_DEBUG
235 printk(KERN_DEBUG "pmc551_read(pos:%ld, len:%ld) asize: %ld\n",
236 (long)from, (long)len, (long)priv->asize);
237#endif
238
239 end = from + len - 1;
240 soff_hi = from & ~(priv->asize - 1);
241 eoff_hi = end & ~(priv->asize - 1);
242 soff_lo = from & (priv->asize - 1);
243 eoff_lo = end & (priv->asize - 1);
244
245 pmc551_point(mtd, from, len, retlen, (void **)&ptr, NULL);
246
247 if (soff_hi == eoff_hi) {
248
249
250 memcpy(copyto, ptr, len);
251 copyto += len;
252 } else {
253
254
255 while (soff_hi != eoff_hi) {
256#ifdef CONFIG_MTD_PMC551_DEBUG
257 printk(KERN_DEBUG "pmc551_read() soff_hi: %ld, "
258 "eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
259#endif
260 memcpy(copyto, ptr, priv->asize);
261 copyto += priv->asize;
262 if (soff_hi + priv->asize >= mtd->size) {
263 goto out;
264 }
265 soff_hi += priv->asize;
266 pmc551_point(mtd, soff_hi, priv->asize, retlen,
267 (void **)&ptr, NULL);
268 }
269 memcpy(copyto, ptr, eoff_lo);
270 copyto += eoff_lo;
271 }
272
273 out:
274#ifdef CONFIG_MTD_PMC551_DEBUG
275 printk(KERN_DEBUG "pmc551_read() done\n");
276#endif
277 *retlen = copyto - buf;
278 return 0;
279}
280
281static int pmc551_write(struct mtd_info *mtd, loff_t to, size_t len,
282 size_t * retlen, const u_char * buf)
283{
284 struct mypriv *priv = mtd->priv;
285 u32 soff_hi, soff_lo;
286 u32 eoff_hi, eoff_lo;
287 unsigned long end;
288 u_char *ptr;
289 const u_char *copyfrom = buf;
290
291#ifdef CONFIG_MTD_PMC551_DEBUG
292 printk(KERN_DEBUG "pmc551_write(pos:%ld, len:%ld) asize:%ld\n",
293 (long)to, (long)len, (long)priv->asize);
294#endif
295
296 end = to + len - 1;
297 soff_hi = to & ~(priv->asize - 1);
298 eoff_hi = end & ~(priv->asize - 1);
299 soff_lo = to & (priv->asize - 1);
300 eoff_lo = end & (priv->asize - 1);
301
302 pmc551_point(mtd, to, len, retlen, (void **)&ptr, NULL);
303
304 if (soff_hi == eoff_hi) {
305
306
307 memcpy(ptr, copyfrom, len);
308 copyfrom += len;
309 } else {
310
311
312 while (soff_hi != eoff_hi) {
313#ifdef CONFIG_MTD_PMC551_DEBUG
314 printk(KERN_DEBUG "pmc551_write() soff_hi: %ld, "
315 "eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
316#endif
317 memcpy(ptr, copyfrom, priv->asize);
318 copyfrom += priv->asize;
319 if (soff_hi >= mtd->size) {
320 goto out;
321 }
322 soff_hi += priv->asize;
323 pmc551_point(mtd, soff_hi, priv->asize, retlen,
324 (void **)&ptr, NULL);
325 }
326 memcpy(ptr, copyfrom, eoff_lo);
327 copyfrom += eoff_lo;
328 }
329
330 out:
331#ifdef CONFIG_MTD_PMC551_DEBUG
332 printk(KERN_DEBUG "pmc551_write() done\n");
333#endif
334 *retlen = copyfrom - buf;
335 return 0;
336}
337
338
339
340
341
342
343
344
345
346
347
348
349
350static int __init fixup_pmc551(struct pci_dev *dev)
351{
352#ifdef CONFIG_MTD_PMC551_BUGFIX
353 u32 dram_data;
354#endif
355 u32 size, dcmd, cfg, dtmp;
356 u16 cmd, tmp, i;
357 u8 bcmd, counter;
358
359
360 if (!dev) {
361 return -ENODEV;
362 }
363
364
365
366
367
368 counter = 0;
369
370 pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, 0xA5);
371
372 pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd);
373
374 for (i = 0; i < 10; i++) {
375 counter = 0;
376 bcmd &= ~0x80;
377 while (counter++ < 100) {
378 pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
379 }
380 counter = 0;
381 bcmd |= 0x80;
382 while (counter++ < 100) {
383 pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
384 }
385 }
386 bcmd |= (0x40 | 0x20);
387 pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
388
389
390
391
392
393 pci_read_config_word(dev, PCI_COMMAND, &cmd);
394 tmp = cmd & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
395 pci_write_config_word(dev, PCI_COMMAND, tmp);
396
397
398
399
400 pci_read_config_dword(dev, PMC551_PCI_MEM_MAP0, &dcmd);
401 dtmp = (dcmd | PMC551_PCI_MEM_MAP_ENABLE | PMC551_PCI_MEM_MAP_REG_EN);
402 pci_write_config_dword(dev, PMC551_PCI_MEM_MAP0, dtmp);
403
404
405
406
407
408
409
410
411
412 pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &cfg);
413#ifndef CONFIG_MTD_PMC551_BUGFIX
414 pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, ~0);
415 pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &size);
416 size = (size & PCI_BASE_ADDRESS_MEM_MASK);
417 size &= ~(size - 1);
418 pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, cfg);
419#else
420
421
422
423
424
425
426
427
428 pci_read_config_dword(dev, PMC551_DRAM_BLK0, &dram_data);
429 size = PMC551_DRAM_BLK_GET_SIZE(dram_data);
430 dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
431 dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
432 pci_write_config_dword(dev, PMC551_DRAM_BLK0, dram_data);
433
434 pci_read_config_dword(dev, PMC551_DRAM_BLK1, &dram_data);
435 size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
436 dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
437 dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
438 pci_write_config_dword(dev, PMC551_DRAM_BLK1, dram_data);
439
440 pci_read_config_dword(dev, PMC551_DRAM_BLK2, &dram_data);
441 size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
442 dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
443 dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
444 pci_write_config_dword(dev, PMC551_DRAM_BLK2, dram_data);
445
446 pci_read_config_dword(dev, PMC551_DRAM_BLK3, &dram_data);
447 size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
448 dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
449 dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
450 pci_write_config_dword(dev, PMC551_DRAM_BLK3, dram_data);
451
452
453
454
455 if ((size &= PCI_BASE_ADDRESS_MEM_MASK) == 0) {
456 return -ENODEV;
457 }
458#endif
459
460 if ((cfg & PCI_BASE_ADDRESS_SPACE) != PCI_BASE_ADDRESS_SPACE_MEMORY) {
461 return -ENODEV;
462 }
463
464
465
466
467 pci_write_config_word(dev, PMC551_SDRAM_MA, 0x0400);
468 pci_write_config_word(dev, PMC551_SDRAM_CMD, 0x00bf);
469
470
471
472
473
474 do {
475 pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd);
476 if (counter++ > 100)
477 break;
478 } while ((PCI_COMMAND_IO) & cmd);
479
480
481
482
483
484
485
486 for (i = 1; i <= 8; i++) {
487 pci_write_config_word(dev, PMC551_SDRAM_CMD, 0x0df);
488
489
490
491
492
493 counter = 0;
494 do {
495 pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd);
496 if (counter++ > 100)
497 break;
498 } while ((PCI_COMMAND_IO) & cmd);
499 }
500
501 pci_write_config_word(dev, PMC551_SDRAM_MA, 0x0020);
502 pci_write_config_word(dev, PMC551_SDRAM_CMD, 0x0ff);
503
504
505
506
507
508 counter = 0;
509 do {
510 pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd);
511 if (counter++ > 100)
512 break;
513 } while ((PCI_COMMAND_IO) & cmd);
514
515 pci_read_config_dword(dev, PMC551_DRAM_CFG, &dcmd);
516 dcmd |= 0x02000000;
517 pci_write_config_dword(dev, PMC551_DRAM_CFG, dcmd);
518
519
520
521
522
523 pci_read_config_word(dev, PCI_STATUS, &cmd);
524 if ((cmd & PCI_COMMAND_FAST_BACK) == 0) {
525 cmd |= PCI_COMMAND_FAST_BACK;
526 pci_write_config_word(dev, PCI_STATUS, cmd);
527 }
528
529
530
531
532
533
534 if ((cmd & PCI_STATUS_DEVSEL_MASK) != 0x0) {
535 cmd &= ~PCI_STATUS_DEVSEL_MASK;
536 pci_write_config_word(dev, PCI_STATUS, cmd);
537 }
538
539
540
541
542
543
544
545
546
547
548
549
550
551 pci_write_config_word(dev, PCI_COMMAND,
552 PCI_COMMAND_MEMORY | PCI_COMMAND_IO);
553#ifdef CONFIG_MTD_PMC551_DEBUG
554
555
556
557 printk(KERN_DEBUG "pmc551: %d%sB (0x%x) of %sprefetchable memory at "
558 "0x%llx\n", (size < 1024) ? size : (size < 1048576) ?
559 size >> 10 : size >> 20,
560 (size < 1024) ? "" : (size < 1048576) ? "Ki" : "Mi", size,
561 ((dcmd & (0x1 << 3)) == 0) ? "non-" : "",
562 (unsigned long long)pci_resource_start(dev, 0));
563
564
565
566
567 pci_read_config_dword(dev, PMC551_DRAM_BLK0, &dcmd);
568 printk(KERN_DEBUG "pmc551: DRAM_BLK0 Flags: %s,%s\n"
569 "pmc551: DRAM_BLK0 Size: %d at %d\n"
570 "pmc551: DRAM_BLK0 Row MUX: %d, Col MUX: %d\n",
571 (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
572 (((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
573 PMC551_DRAM_BLK_GET_SIZE(dcmd),
574 ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
575 ((dcmd >> 9) & 0xF));
576
577 pci_read_config_dword(dev, PMC551_DRAM_BLK1, &dcmd);
578 printk(KERN_DEBUG "pmc551: DRAM_BLK1 Flags: %s,%s\n"
579 "pmc551: DRAM_BLK1 Size: %d at %d\n"
580 "pmc551: DRAM_BLK1 Row MUX: %d, Col MUX: %d\n",
581 (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
582 (((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
583 PMC551_DRAM_BLK_GET_SIZE(dcmd),
584 ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
585 ((dcmd >> 9) & 0xF));
586
587 pci_read_config_dword(dev, PMC551_DRAM_BLK2, &dcmd);
588 printk(KERN_DEBUG "pmc551: DRAM_BLK2 Flags: %s,%s\n"
589 "pmc551: DRAM_BLK2 Size: %d at %d\n"
590 "pmc551: DRAM_BLK2 Row MUX: %d, Col MUX: %d\n",
591 (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
592 (((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
593 PMC551_DRAM_BLK_GET_SIZE(dcmd),
594 ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
595 ((dcmd >> 9) & 0xF));
596
597 pci_read_config_dword(dev, PMC551_DRAM_BLK3, &dcmd);
598 printk(KERN_DEBUG "pmc551: DRAM_BLK3 Flags: %s,%s\n"
599 "pmc551: DRAM_BLK3 Size: %d at %d\n"
600 "pmc551: DRAM_BLK3 Row MUX: %d, Col MUX: %d\n",
601 (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
602 (((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
603 PMC551_DRAM_BLK_GET_SIZE(dcmd),
604 ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
605 ((dcmd >> 9) & 0xF));
606
607 pci_read_config_word(dev, PCI_COMMAND, &cmd);
608 printk(KERN_DEBUG "pmc551: Memory Access %s\n",
609 (((0x1 << 1) & cmd) == 0) ? "off" : "on");
610 printk(KERN_DEBUG "pmc551: I/O Access %s\n",
611 (((0x1 << 0) & cmd) == 0) ? "off" : "on");
612
613 pci_read_config_word(dev, PCI_STATUS, &cmd);
614 printk(KERN_DEBUG "pmc551: Devsel %s\n",
615 ((PCI_STATUS_DEVSEL_MASK & cmd) == 0x000) ? "Fast" :
616 ((PCI_STATUS_DEVSEL_MASK & cmd) == 0x200) ? "Medium" :
617 ((PCI_STATUS_DEVSEL_MASK & cmd) == 0x400) ? "Slow" : "Invalid");
618
619 printk(KERN_DEBUG "pmc551: %sFast Back-to-Back\n",
620 ((PCI_COMMAND_FAST_BACK & cmd) == 0) ? "Not " : "");
621
622 pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd);
623 printk(KERN_DEBUG "pmc551: EEPROM is under %s control\n"
624 "pmc551: System Control Register is %slocked to PCI access\n"
625 "pmc551: System Control Register is %slocked to EEPROM access\n",
626 (bcmd & 0x1) ? "software" : "hardware",
627 (bcmd & 0x20) ? "" : "un", (bcmd & 0x40) ? "" : "un");
628#endif
629 return size;
630}
631
632
633
634
635
636MODULE_LICENSE("GPL");
637MODULE_AUTHOR("Mark Ferrell <mferrell@mvista.com>");
638MODULE_DESCRIPTION(PMC551_VERSION);
639
640
641
642
643static int msize = 0;
644static int asize = 0;
645
646module_param(msize, int, 0);
647MODULE_PARM_DESC(msize, "memory size in MiB [1 - 1024]");
648module_param(asize, int, 0);
649MODULE_PARM_DESC(asize, "aperture size, must be <= memsize [1-1024]");
650
651
652
653
654static int __init init_pmc551(void)
655{
656 struct pci_dev *PCI_Device = NULL;
657 struct mypriv *priv;
658 int found = 0;
659 struct mtd_info *mtd;
660 int length = 0;
661
662 if (msize) {
663 msize = (1 << (ffs(msize) - 1)) << 20;
664 if (msize > (1 << 30)) {
665 printk(KERN_NOTICE "pmc551: Invalid memory size [%d]\n",
666 msize);
667 return -EINVAL;
668 }
669 }
670
671 if (asize) {
672 asize = (1 << (ffs(asize) - 1)) << 20;
673 if (asize > (1 << 30)) {
674 printk(KERN_NOTICE "pmc551: Invalid aperture size "
675 "[%d]\n", asize);
676 return -EINVAL;
677 }
678 }
679
680 printk(KERN_INFO PMC551_VERSION);
681
682
683
684
685 for (;;) {
686
687 if ((PCI_Device = pci_get_device(PCI_VENDOR_ID_V3_SEMI,
688 PCI_DEVICE_ID_V3_SEMI_V370PDC,
689 PCI_Device)) == NULL) {
690 break;
691 }
692
693 printk(KERN_NOTICE "pmc551: Found PCI V370PDC at 0x%llx\n",
694 (unsigned long long)pci_resource_start(PCI_Device, 0));
695
696
697
698
699
700
701
702
703
704 if ((length = fixup_pmc551(PCI_Device)) <= 0) {
705 printk(KERN_NOTICE "pmc551: Cannot init SDRAM\n");
706 break;
707 }
708
709
710
711
712
713 if (msize) {
714 length = msize;
715 printk(KERN_NOTICE "pmc551: Using specified memory "
716 "size 0x%x\n", length);
717 } else {
718 msize = length;
719 }
720
721 mtd = kzalloc(sizeof(struct mtd_info), GFP_KERNEL);
722 if (!mtd)
723 break;
724
725 priv = kzalloc(sizeof(struct mypriv), GFP_KERNEL);
726 if (!priv) {
727 kfree(mtd);
728 break;
729 }
730 mtd->priv = priv;
731 priv->dev = PCI_Device;
732
733 if (asize > length) {
734 printk(KERN_NOTICE "pmc551: reducing aperture size to "
735 "fit %dM\n", length >> 20);
736 priv->asize = asize = length;
737 } else if (asize == 0 || asize == length) {
738 printk(KERN_NOTICE "pmc551: Using existing aperture "
739 "size %dM\n", length >> 20);
740 priv->asize = asize = length;
741 } else {
742 printk(KERN_NOTICE "pmc551: Using specified aperture "
743 "size %dM\n", asize >> 20);
744 priv->asize = asize;
745 }
746 priv->start = pci_iomap(PCI_Device, 0, priv->asize);
747
748 if (!priv->start) {
749 printk(KERN_NOTICE "pmc551: Unable to map IO space\n");
750 kfree(mtd->priv);
751 kfree(mtd);
752 break;
753 }
754#ifdef CONFIG_MTD_PMC551_DEBUG
755 printk(KERN_DEBUG "pmc551: setting aperture to %d\n",
756 ffs(priv->asize >> 20) - 1);
757#endif
758
759 priv->base_map0 = (PMC551_PCI_MEM_MAP_REG_EN
760 | PMC551_PCI_MEM_MAP_ENABLE
761 | (ffs(priv->asize >> 20) - 1) << 4);
762 priv->curr_map0 = priv->base_map0;
763 pci_write_config_dword(priv->dev, PMC551_PCI_MEM_MAP0,
764 priv->curr_map0);
765
766#ifdef CONFIG_MTD_PMC551_DEBUG
767 printk(KERN_DEBUG "pmc551: aperture set to %d\n",
768 (priv->base_map0 & 0xF0) >> 4);
769#endif
770
771 mtd->size = msize;
772 mtd->flags = MTD_CAP_RAM;
773 mtd->_erase = pmc551_erase;
774 mtd->_read = pmc551_read;
775 mtd->_write = pmc551_write;
776 mtd->_point = pmc551_point;
777 mtd->_unpoint = pmc551_unpoint;
778 mtd->type = MTD_RAM;
779 mtd->name = "PMC551 RAM board";
780 mtd->erasesize = 0x10000;
781 mtd->writesize = 1;
782 mtd->owner = THIS_MODULE;
783
784 if (mtd_device_register(mtd, NULL, 0)) {
785 printk(KERN_NOTICE "pmc551: Failed to register new device\n");
786 pci_iounmap(PCI_Device, priv->start);
787 kfree(mtd->priv);
788 kfree(mtd);
789 break;
790 }
791
792
793 pci_dev_get(PCI_Device);
794
795 printk(KERN_NOTICE "Registered pmc551 memory device.\n");
796 printk(KERN_NOTICE "Mapped %dMiB of memory from 0x%p to 0x%p\n",
797 priv->asize >> 20,
798 priv->start, priv->start + priv->asize);
799 printk(KERN_NOTICE "Total memory is %d%sB\n",
800 (length < 1024) ? length :
801 (length < 1048576) ? length >> 10 : length >> 20,
802 (length < 1024) ? "" : (length < 1048576) ? "Ki" : "Mi");
803 priv->nextpmc551 = pmc551list;
804 pmc551list = mtd;
805 found++;
806 }
807
808
809 pci_dev_put(PCI_Device);
810
811 if (!pmc551list) {
812 printk(KERN_NOTICE "pmc551: not detected\n");
813 return -ENODEV;
814 } else {
815 printk(KERN_NOTICE "pmc551: %d pmc551 devices loaded\n", found);
816 return 0;
817 }
818}
819
820
821
822
823static void __exit cleanup_pmc551(void)
824{
825 int found = 0;
826 struct mtd_info *mtd;
827 struct mypriv *priv;
828
829 while ((mtd = pmc551list)) {
830 priv = mtd->priv;
831 pmc551list = priv->nextpmc551;
832
833 if (priv->start) {
834 printk(KERN_DEBUG "pmc551: unmapping %dMiB starting at "
835 "0x%p\n", priv->asize >> 20, priv->start);
836 pci_iounmap(priv->dev, priv->start);
837 }
838 pci_dev_put(priv->dev);
839
840 kfree(mtd->priv);
841 mtd_device_unregister(mtd);
842 kfree(mtd);
843 found++;
844 }
845
846 printk(KERN_NOTICE "pmc551: %d pmc551 devices unloaded\n", found);
847}
848
849module_init(init_pmc551);
850module_exit(cleanup_pmc551);
851