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8#ifndef _MV88E6XXX_CHIP_H
9#define _MV88E6XXX_CHIP_H
10
11#include <linux/if_vlan.h>
12#include <linux/irq.h>
13#include <linux/gpio/consumer.h>
14#include <linux/kthread.h>
15#include <linux/phy.h>
16#include <linux/ptp_clock_kernel.h>
17#include <linux/timecounter.h>
18#include <net/dsa.h>
19
20#define MV88E6XXX_N_FID 4096
21
22
23#define MV88E6XXX_MAX_PVT_SWITCHES 32
24#define MV88E6XXX_MAX_PVT_PORTS 16
25
26#define MV88E6XXX_MAX_GPIO 16
27
28enum mv88e6xxx_egress_mode {
29 MV88E6XXX_EGRESS_MODE_UNMODIFIED,
30 MV88E6XXX_EGRESS_MODE_UNTAGGED,
31 MV88E6XXX_EGRESS_MODE_TAGGED,
32 MV88E6XXX_EGRESS_MODE_ETHERTYPE,
33};
34
35enum mv88e6xxx_frame_mode {
36 MV88E6XXX_FRAME_MODE_NORMAL,
37 MV88E6XXX_FRAME_MODE_DSA,
38 MV88E6XXX_FRAME_MODE_PROVIDER,
39 MV88E6XXX_FRAME_MODE_ETHERTYPE,
40};
41
42
43enum mv88e6xxx_model {
44 MV88E6085,
45 MV88E6095,
46 MV88E6097,
47 MV88E6123,
48 MV88E6131,
49 MV88E6141,
50 MV88E6161,
51 MV88E6165,
52 MV88E6171,
53 MV88E6172,
54 MV88E6175,
55 MV88E6176,
56 MV88E6185,
57 MV88E6190,
58 MV88E6190X,
59 MV88E6191,
60 MV88E6240,
61 MV88E6250,
62 MV88E6290,
63 MV88E6320,
64 MV88E6321,
65 MV88E6341,
66 MV88E6350,
67 MV88E6351,
68 MV88E6352,
69 MV88E6390,
70 MV88E6390X,
71};
72
73enum mv88e6xxx_family {
74 MV88E6XXX_FAMILY_NONE,
75 MV88E6XXX_FAMILY_6065,
76 MV88E6XXX_FAMILY_6095,
77 MV88E6XXX_FAMILY_6097,
78 MV88E6XXX_FAMILY_6165,
79 MV88E6XXX_FAMILY_6185,
80 MV88E6XXX_FAMILY_6250,
81 MV88E6XXX_FAMILY_6320,
82 MV88E6XXX_FAMILY_6341,
83 MV88E6XXX_FAMILY_6351,
84 MV88E6XXX_FAMILY_6352,
85 MV88E6XXX_FAMILY_6390,
86};
87
88struct mv88e6xxx_ops;
89
90struct mv88e6xxx_info {
91 enum mv88e6xxx_family family;
92 u16 prod_num;
93 const char *name;
94 unsigned int num_databases;
95 unsigned int num_ports;
96 unsigned int num_internal_phys;
97 unsigned int num_gpio;
98 unsigned int max_vid;
99 unsigned int port_base_addr;
100 unsigned int phy_base_addr;
101 unsigned int global1_addr;
102 unsigned int global2_addr;
103 unsigned int age_time_coeff;
104 unsigned int g1_irqs;
105 unsigned int g2_irqs;
106 bool pvt;
107
108
109
110
111
112 bool multi_chip;
113
114
115
116
117 bool dual_chip;
118
119 enum dsa_tag_protocol tag_protocol;
120
121
122
123
124 u8 atu_move_port_mask;
125 const struct mv88e6xxx_ops *ops;
126
127
128 bool ptp_support;
129};
130
131struct mv88e6xxx_atu_entry {
132 u8 state;
133 bool trunk;
134 u16 portvec;
135 u8 mac[ETH_ALEN];
136};
137
138struct mv88e6xxx_vtu_entry {
139 u16 vid;
140 u16 fid;
141 u8 sid;
142 bool valid;
143 u8 member[DSA_MAX_PORTS];
144 u8 state[DSA_MAX_PORTS];
145};
146
147struct mv88e6xxx_bus_ops;
148struct mv88e6xxx_irq_ops;
149struct mv88e6xxx_gpio_ops;
150struct mv88e6xxx_avb_ops;
151struct mv88e6xxx_ptp_ops;
152
153struct mv88e6xxx_irq {
154 u16 masked;
155 struct irq_chip chip;
156 struct irq_domain *domain;
157 unsigned int nirqs;
158};
159
160
161enum {
162 MV88E6XXX_HWTSTAMP_ENABLED,
163 MV88E6XXX_HWTSTAMP_TX_IN_PROGRESS,
164};
165
166struct mv88e6xxx_port_hwtstamp {
167
168 int port_id;
169
170
171 unsigned long state;
172
173
174 struct sk_buff_head rx_queue;
175 struct sk_buff_head rx_queue2;
176
177
178 unsigned long tx_tstamp_start;
179 struct sk_buff *tx_skb;
180 u16 tx_seq_id;
181
182
183 struct hwtstamp_config tstamp_config;
184};
185
186struct mv88e6xxx_port {
187 struct mv88e6xxx_chip *chip;
188 int port;
189 u64 serdes_stats[2];
190 u64 atu_member_violation;
191 u64 atu_miss_violation;
192 u64 atu_full_violation;
193 u64 vtu_member_violation;
194 u64 vtu_miss_violation;
195 u8 cmode;
196 int serdes_irq;
197};
198
199struct mv88e6xxx_chip {
200 const struct mv88e6xxx_info *info;
201
202
203 struct dsa_switch *ds;
204
205
206 struct device *dev;
207
208
209 struct mutex reg_lock;
210
211
212
213
214 const struct mv88e6xxx_bus_ops *smi_ops;
215 struct mii_bus *bus;
216 int sw_addr;
217
218
219
220
221 const struct mv88e6xxx_bus_ops *phy_ops;
222 struct mutex ppu_mutex;
223 int ppu_disabled;
224 struct work_struct ppu_work;
225 struct timer_list ppu_timer;
226
227
228
229
230 struct mutex stats_mutex;
231
232
233
234
235
236 struct gpio_desc *reset;
237
238
239 u32 eeprom_len;
240
241
242 struct list_head mdios;
243
244
245
246
247 struct mv88e6xxx_irq g1_irq;
248 struct mv88e6xxx_irq g2_irq;
249 int irq;
250 int device_irq;
251 int watchdog_irq;
252
253 int atu_prob_irq;
254 int vtu_prob_irq;
255 struct kthread_worker *kworker;
256 struct kthread_delayed_work irq_poll_work;
257
258
259 u8 gpio_data[2];
260
261
262
263
264 struct cyclecounter tstamp_cc;
265 struct timecounter tstamp_tc;
266 struct delayed_work overflow_work;
267
268 struct ptp_clock *ptp_clock;
269 struct ptp_clock_info ptp_clock_info;
270 struct delayed_work tai_event_work;
271 struct ptp_pin_desc pin_config[MV88E6XXX_MAX_GPIO];
272 u16 trig_config;
273 u16 evcap_config;
274 u16 enable_count;
275
276
277 struct mv88e6xxx_port_hwtstamp port_hwtstamp[DSA_MAX_PORTS];
278
279
280 struct mv88e6xxx_port ports[DSA_MAX_PORTS];
281};
282
283struct mv88e6xxx_bus_ops {
284 int (*read)(struct mv88e6xxx_chip *chip, int addr, int reg, u16 *val);
285 int (*write)(struct mv88e6xxx_chip *chip, int addr, int reg, u16 val);
286};
287
288struct mv88e6xxx_mdio_bus {
289 struct mii_bus *bus;
290 struct mv88e6xxx_chip *chip;
291 struct list_head list;
292 bool external;
293};
294
295struct mv88e6xxx_ops {
296
297
298
299 int (*setup_errata)(struct mv88e6xxx_chip *chip);
300
301 int (*ieee_pri_map)(struct mv88e6xxx_chip *chip);
302 int (*ip_pri_map)(struct mv88e6xxx_chip *chip);
303
304
305 int (*irl_init_all)(struct mv88e6xxx_chip *chip, int port);
306
307 int (*get_eeprom)(struct mv88e6xxx_chip *chip,
308 struct ethtool_eeprom *eeprom, u8 *data);
309 int (*set_eeprom)(struct mv88e6xxx_chip *chip,
310 struct ethtool_eeprom *eeprom, u8 *data);
311
312 int (*set_switch_mac)(struct mv88e6xxx_chip *chip, u8 *addr);
313
314 int (*phy_read)(struct mv88e6xxx_chip *chip,
315 struct mii_bus *bus,
316 int addr, int reg, u16 *val);
317 int (*phy_write)(struct mv88e6xxx_chip *chip,
318 struct mii_bus *bus,
319 int addr, int reg, u16 val);
320
321
322 int (*pot_clear)(struct mv88e6xxx_chip *chip);
323
324
325 int (*ppu_enable)(struct mv88e6xxx_chip *chip);
326 int (*ppu_disable)(struct mv88e6xxx_chip *chip);
327
328
329 int (*reset)(struct mv88e6xxx_chip *chip);
330
331
332
333
334 int (*port_set_rgmii_delay)(struct mv88e6xxx_chip *chip, int port,
335 phy_interface_t mode);
336
337#define LINK_FORCED_DOWN 0
338#define LINK_FORCED_UP 1
339#define LINK_UNFORCED -2
340
341
342
343
344
345 int (*port_set_link)(struct mv88e6xxx_chip *chip, int port, int link);
346
347#define DUPLEX_UNFORCED -2
348
349
350
351
352
353
354 int (*port_set_duplex)(struct mv88e6xxx_chip *chip, int port, int dup);
355
356#define PAUSE_ON 1
357#define PAUSE_OFF 0
358
359
360 int (*port_set_pause)(struct mv88e6xxx_chip *chip, int port,
361 int pause);
362
363#define SPEED_MAX INT_MAX
364#define SPEED_UNFORCED -2
365
366
367
368
369
370
371 int (*port_set_speed)(struct mv88e6xxx_chip *chip, int port, int speed);
372
373
374 phy_interface_t (*port_max_speed_mode)(int port);
375
376 int (*port_tag_remap)(struct mv88e6xxx_chip *chip, int port);
377
378 int (*port_set_frame_mode)(struct mv88e6xxx_chip *chip, int port,
379 enum mv88e6xxx_frame_mode mode);
380 int (*port_set_egress_floods)(struct mv88e6xxx_chip *chip, int port,
381 bool unicast, bool multicast);
382 int (*port_set_ether_type)(struct mv88e6xxx_chip *chip, int port,
383 u16 etype);
384 int (*port_set_jumbo_size)(struct mv88e6xxx_chip *chip, int port,
385 size_t size);
386
387 int (*port_egress_rate_limiting)(struct mv88e6xxx_chip *chip, int port);
388 int (*port_pause_limit)(struct mv88e6xxx_chip *chip, int port, u8 in,
389 u8 out);
390 int (*port_disable_learn_limit)(struct mv88e6xxx_chip *chip, int port);
391 int (*port_disable_pri_override)(struct mv88e6xxx_chip *chip, int port);
392
393
394
395
396 int (*port_set_cmode)(struct mv88e6xxx_chip *chip, int port,
397 phy_interface_t mode);
398 int (*port_get_cmode)(struct mv88e6xxx_chip *chip, int port, u8 *cmode);
399
400
401
402
403 int (*port_set_upstream_port)(struct mv88e6xxx_chip *chip, int port,
404 int upstream_port);
405
406 int (*port_link_state)(struct mv88e6xxx_chip *chip, int port,
407 struct phylink_link_state *state);
408
409
410
411
412 int (*stats_snapshot)(struct mv88e6xxx_chip *chip, int port);
413
414
415
416
417 int (*stats_set_histogram)(struct mv88e6xxx_chip *chip);
418
419
420 int (*stats_get_sset_count)(struct mv88e6xxx_chip *chip);
421 int (*stats_get_strings)(struct mv88e6xxx_chip *chip, uint8_t *data);
422 int (*stats_get_stats)(struct mv88e6xxx_chip *chip, int port,
423 uint64_t *data);
424 int (*set_cpu_port)(struct mv88e6xxx_chip *chip, int port);
425 int (*set_egress_port)(struct mv88e6xxx_chip *chip, int port);
426
427#define MV88E6XXX_CASCADE_PORT_NONE 0xe
428#define MV88E6XXX_CASCADE_PORT_MULTIPLE 0xf
429
430 int (*set_cascade_port)(struct mv88e6xxx_chip *chip, int port);
431
432 const struct mv88e6xxx_irq_ops *watchdog_ops;
433
434 int (*mgmt_rsvd2cpu)(struct mv88e6xxx_chip *chip);
435
436
437 int (*serdes_power)(struct mv88e6xxx_chip *chip, int port, bool on);
438
439
440 int (*serdes_irq_setup)(struct mv88e6xxx_chip *chip, int port);
441 void (*serdes_irq_free)(struct mv88e6xxx_chip *chip, int port);
442
443
444 int (*serdes_get_sset_count)(struct mv88e6xxx_chip *chip, int port);
445 int (*serdes_get_strings)(struct mv88e6xxx_chip *chip, int port,
446 uint8_t *data);
447 int (*serdes_get_stats)(struct mv88e6xxx_chip *chip, int port,
448 uint64_t *data);
449
450
451 int (*vtu_getnext)(struct mv88e6xxx_chip *chip,
452 struct mv88e6xxx_vtu_entry *entry);
453 int (*vtu_loadpurge)(struct mv88e6xxx_chip *chip,
454 struct mv88e6xxx_vtu_entry *entry);
455
456
457 const struct mv88e6xxx_gpio_ops *gpio_ops;
458
459
460 const struct mv88e6xxx_avb_ops *avb_ops;
461
462
463 int (*rmu_disable)(struct mv88e6xxx_chip *chip);
464
465
466 const struct mv88e6xxx_ptp_ops *ptp_ops;
467
468
469 void (*phylink_validate)(struct mv88e6xxx_chip *chip, int port,
470 unsigned long *mask,
471 struct phylink_link_state *state);
472};
473
474struct mv88e6xxx_irq_ops {
475
476 int (*irq_action)(struct mv88e6xxx_chip *chip, int irq);
477
478 int (*irq_setup)(struct mv88e6xxx_chip *chip);
479
480 void (*irq_free)(struct mv88e6xxx_chip *chip);
481};
482
483struct mv88e6xxx_gpio_ops {
484
485 int (*get_data)(struct mv88e6xxx_chip *chip, unsigned int pin);
486 int (*set_data)(struct mv88e6xxx_chip *chip, unsigned int pin,
487 int value);
488
489
490 int (*get_dir)(struct mv88e6xxx_chip *chip, unsigned int pin);
491 int (*set_dir)(struct mv88e6xxx_chip *chip, unsigned int pin,
492 bool input);
493
494
495 int (*get_pctl)(struct mv88e6xxx_chip *chip, unsigned int pin,
496 int *func);
497 int (*set_pctl)(struct mv88e6xxx_chip *chip, unsigned int pin,
498 int func);
499};
500
501struct mv88e6xxx_avb_ops {
502
503 int (*port_ptp_read)(struct mv88e6xxx_chip *chip, int port, int addr,
504 u16 *data, int len);
505 int (*port_ptp_write)(struct mv88e6xxx_chip *chip, int port, int addr,
506 u16 data);
507
508
509 int (*ptp_read)(struct mv88e6xxx_chip *chip, int addr, u16 *data,
510 int len);
511 int (*ptp_write)(struct mv88e6xxx_chip *chip, int addr, u16 data);
512
513
514 int (*tai_read)(struct mv88e6xxx_chip *chip, int addr, u16 *data,
515 int len);
516 int (*tai_write)(struct mv88e6xxx_chip *chip, int addr, u16 data);
517};
518
519struct mv88e6xxx_ptp_ops {
520 u64 (*clock_read)(const struct cyclecounter *cc);
521 int (*ptp_enable)(struct ptp_clock_info *ptp,
522 struct ptp_clock_request *rq, int on);
523 int (*ptp_verify)(struct ptp_clock_info *ptp, unsigned int pin,
524 enum ptp_pin_function func, unsigned int chan);
525 void (*event_work)(struct work_struct *ugly);
526 int (*port_enable)(struct mv88e6xxx_chip *chip, int port);
527 int (*port_disable)(struct mv88e6xxx_chip *chip, int port);
528 int (*global_enable)(struct mv88e6xxx_chip *chip);
529 int (*global_disable)(struct mv88e6xxx_chip *chip);
530 int n_ext_ts;
531 int arr0_sts_reg;
532 int arr1_sts_reg;
533 int dep_sts_reg;
534 u32 rx_filters;
535};
536
537#define STATS_TYPE_PORT BIT(0)
538#define STATS_TYPE_BANK0 BIT(1)
539#define STATS_TYPE_BANK1 BIT(2)
540
541struct mv88e6xxx_hw_stat {
542 char string[ETH_GSTRING_LEN];
543 size_t size;
544 int reg;
545 int type;
546};
547
548static inline bool mv88e6xxx_has_pvt(struct mv88e6xxx_chip *chip)
549{
550 return chip->info->pvt;
551}
552
553static inline unsigned int mv88e6xxx_num_databases(struct mv88e6xxx_chip *chip)
554{
555 return chip->info->num_databases;
556}
557
558static inline unsigned int mv88e6xxx_num_ports(struct mv88e6xxx_chip *chip)
559{
560 return chip->info->num_ports;
561}
562
563static inline u16 mv88e6xxx_port_mask(struct mv88e6xxx_chip *chip)
564{
565 return GENMASK(mv88e6xxx_num_ports(chip) - 1, 0);
566}
567
568static inline unsigned int mv88e6xxx_num_gpio(struct mv88e6xxx_chip *chip)
569{
570 return chip->info->num_gpio;
571}
572
573int mv88e6xxx_read(struct mv88e6xxx_chip *chip, int addr, int reg, u16 *val);
574int mv88e6xxx_write(struct mv88e6xxx_chip *chip, int addr, int reg, u16 val);
575int mv88e6xxx_update(struct mv88e6xxx_chip *chip, int addr, int reg,
576 u16 update);
577int mv88e6xxx_wait(struct mv88e6xxx_chip *chip, int addr, int reg, u16 mask);
578int mv88e6xxx_port_setup_mac(struct mv88e6xxx_chip *chip, int port, int link,
579 int speed, int duplex, int pause,
580 phy_interface_t mode);
581struct mii_bus *mv88e6xxx_default_mdio_bus(struct mv88e6xxx_chip *chip);
582
583static inline void mv88e6xxx_reg_lock(struct mv88e6xxx_chip *chip)
584{
585 mutex_lock(&chip->reg_lock);
586}
587
588static inline void mv88e6xxx_reg_unlock(struct mv88e6xxx_chip *chip)
589{
590 mutex_unlock(&chip->reg_lock);
591}
592
593#endif
594