1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62#include <linux/kernel.h>
63#include <linux/string.h>
64#include <linux/errno.h>
65#include <linux/ioport.h>
66#include <linux/slab.h>
67#include <linux/interrupt.h>
68#include <linux/delay.h>
69#include <linux/init.h>
70#include <linux/netdevice.h>
71#include <linux/etherdevice.h>
72#include <linux/skbuff.h>
73#include <linux/module.h>
74#include <linux/bitops.h>
75
76#include <asm/io.h>
77#include <asm/dma.h>
78
79#include "ni65.h"
80
81
82
83
84
85
86
87
88#undef XMT_VIA_SKB
89#undef RCV_VIA_SKB
90#define RCV_PARANOIA_CHECK
91
92#define MID_PERFORMANCE
93
94#if defined( LOW_PERFORMANCE )
95 static int isa0=7,isa1=7,csr80=0x0c10;
96#elif defined( MID_PERFORMANCE )
97 static int isa0=5,isa1=5,csr80=0x2810;
98#else
99 static int isa0=4,isa1=4,csr80=0x0017;
100#endif
101
102
103
104
105#define NI65_ID0 0x00
106#define NI65_ID1 0x55
107#define NI65_EB_ID0 0x52
108#define NI65_EB_ID1 0x44
109#define NE2100_ID0 0x57
110#define NE2100_ID1 0x57
111
112#define PORT p->cmdr_addr
113
114
115
116
117#if 1
118#define RMDNUM 16
119#define RMDNUMMASK 0x80000000
120#else
121#define RMDNUM 8
122#define RMDNUMMASK 0x60000000
123#endif
124
125#if 0
126#define TMDNUM 1
127#define TMDNUMMASK 0x00000000
128#else
129#define TMDNUM 4
130#define TMDNUMMASK 0x40000000
131#endif
132
133
134#define R_BUF_SIZE 1544
135#define T_BUF_SIZE 1544
136
137
138
139
140#define L_DATAREG 0x00
141#define L_ADDRREG 0x02
142#define L_RESET 0x04
143#define L_CONFIG 0x05
144#define L_BUSIF 0x06
145
146
147
148
149
150#define CSR0 0x00
151#define CSR1 0x01
152#define CSR2 0x02
153#define CSR3 0x03
154
155#define INIT_RING_BEFORE_START 0x1
156#define FULL_RESET_ON_ERROR 0x2
157
158#if 0
159#define writereg(val,reg) {outw(reg,PORT+L_ADDRREG);inw(PORT+L_ADDRREG); \
160 outw(val,PORT+L_DATAREG);inw(PORT+L_DATAREG);}
161#define readreg(reg) (outw(reg,PORT+L_ADDRREG),inw(PORT+L_ADDRREG),\
162 inw(PORT+L_DATAREG))
163#if 0
164#define writedatareg(val) {outw(val,PORT+L_DATAREG);inw(PORT+L_DATAREG);}
165#else
166#define writedatareg(val) { writereg(val,CSR0); }
167#endif
168#else
169#define writereg(val,reg) {outw(reg,PORT+L_ADDRREG);outw(val,PORT+L_DATAREG);}
170#define readreg(reg) (outw(reg,PORT+L_ADDRREG),inw(PORT+L_DATAREG))
171#define writedatareg(val) { writereg(val,CSR0); }
172#endif
173
174static unsigned char ni_vendor[] = { 0x02,0x07,0x01 };
175
176static struct card {
177 unsigned char id0,id1;
178 short id_offset;
179 short total_size;
180 short cmd_offset;
181 short addr_offset;
182 unsigned char *vendor_id;
183 char *cardname;
184 unsigned long config;
185} cards[] = {
186 {
187 .id0 = NI65_ID0,
188 .id1 = NI65_ID1,
189 .id_offset = 0x0e,
190 .total_size = 0x10,
191 .cmd_offset = 0x0,
192 .addr_offset = 0x8,
193 .vendor_id = ni_vendor,
194 .cardname = "ni6510",
195 .config = 0x1,
196 },
197 {
198 .id0 = NI65_EB_ID0,
199 .id1 = NI65_EB_ID1,
200 .id_offset = 0x0e,
201 .total_size = 0x18,
202 .cmd_offset = 0x10,
203 .addr_offset = 0x0,
204 .vendor_id = ni_vendor,
205 .cardname = "ni6510 EtherBlaster",
206 .config = 0x2,
207 },
208 {
209 .id0 = NE2100_ID0,
210 .id1 = NE2100_ID1,
211 .id_offset = 0x0e,
212 .total_size = 0x18,
213 .cmd_offset = 0x10,
214 .addr_offset = 0x0,
215 .vendor_id = NULL,
216 .cardname = "generic NE2100",
217 .config = 0x0,
218 },
219};
220#define NUM_CARDS 3
221
222struct priv
223{
224 struct rmd rmdhead[RMDNUM];
225 struct tmd tmdhead[TMDNUM];
226 struct init_block ib;
227 int rmdnum;
228 int tmdnum,tmdlast;
229#ifdef RCV_VIA_SKB
230 struct sk_buff *recv_skb[RMDNUM];
231#else
232 void *recvbounce[RMDNUM];
233#endif
234#ifdef XMT_VIA_SKB
235 struct sk_buff *tmd_skb[TMDNUM];
236#endif
237 void *tmdbounce[TMDNUM];
238 int tmdbouncenum;
239 int lock,xmit_queued;
240
241 void *self;
242 int cmdr_addr;
243 int cardno;
244 int features;
245 spinlock_t ring_lock;
246};
247
248static int ni65_probe1(struct net_device *dev,int);
249static irqreturn_t ni65_interrupt(int irq, void * dev_id);
250static void ni65_recv_intr(struct net_device *dev,int);
251static void ni65_xmit_intr(struct net_device *dev,int);
252static int ni65_open(struct net_device *dev);
253static int ni65_lance_reinit(struct net_device *dev);
254static void ni65_init_lance(struct priv *p,unsigned char*,int,int);
255static netdev_tx_t ni65_send_packet(struct sk_buff *skb,
256 struct net_device *dev);
257static void ni65_timeout(struct net_device *dev);
258static int ni65_close(struct net_device *dev);
259static int ni65_alloc_buffer(struct net_device *dev);
260static void ni65_free_buffer(struct priv *p);
261static void set_multicast_list(struct net_device *dev);
262
263static int irqtab[] __initdata = { 9,12,15,5 };
264static int dmatab[] __initdata = { 0,3,5,6,7 };
265
266static int debuglevel = 1;
267
268
269
270
271static void ni65_set_performance(struct priv *p)
272{
273 writereg(CSR0_STOP | CSR0_CLRALL,CSR0);
274
275 if( !(cards[p->cardno].config & 0x02) )
276 return;
277
278 outw(80,PORT+L_ADDRREG);
279 if(inw(PORT+L_ADDRREG) != 80)
280 return;
281
282 writereg( (csr80 & 0x3fff) ,80);
283 outw(0,PORT+L_ADDRREG);
284 outw((short)isa0,PORT+L_BUSIF);
285 outw(1,PORT+L_ADDRREG);
286 outw((short)isa1,PORT+L_BUSIF);
287
288 outw(CSR0,PORT+L_ADDRREG);
289}
290
291
292
293
294static int ni65_open(struct net_device *dev)
295{
296 struct priv *p = dev->ml_priv;
297 int irqval = request_irq(dev->irq, ni65_interrupt,0,
298 cards[p->cardno].cardname,dev);
299 if (irqval) {
300 printk(KERN_ERR "%s: unable to get IRQ %d (irqval=%d).\n",
301 dev->name,dev->irq, irqval);
302 return -EAGAIN;
303 }
304
305 if(ni65_lance_reinit(dev))
306 {
307 netif_start_queue(dev);
308 return 0;
309 }
310 else
311 {
312 free_irq(dev->irq,dev);
313 return -EAGAIN;
314 }
315}
316
317
318
319
320static int ni65_close(struct net_device *dev)
321{
322 struct priv *p = dev->ml_priv;
323
324 netif_stop_queue(dev);
325
326 outw(inw(PORT+L_RESET),PORT+L_RESET);
327
328#ifdef XMT_VIA_SKB
329 {
330 int i;
331 for(i=0;i<TMDNUM;i++)
332 {
333 if(p->tmd_skb[i]) {
334 dev_kfree_skb(p->tmd_skb[i]);
335 p->tmd_skb[i] = NULL;
336 }
337 }
338 }
339#endif
340 free_irq(dev->irq,dev);
341 return 0;
342}
343
344static void cleanup_card(struct net_device *dev)
345{
346 struct priv *p = dev->ml_priv;
347 disable_dma(dev->dma);
348 free_dma(dev->dma);
349 release_region(dev->base_addr, cards[p->cardno].total_size);
350 ni65_free_buffer(p);
351}
352
353
354static int irq;
355static int io;
356static int dma;
357
358
359
360
361struct net_device * __init ni65_probe(int unit)
362{
363 struct net_device *dev = alloc_etherdev(0);
364 static const int ports[] = { 0x360, 0x300, 0x320, 0x340, 0 };
365 const int *port;
366 int err = 0;
367
368 if (!dev)
369 return ERR_PTR(-ENOMEM);
370
371 if (unit >= 0) {
372 sprintf(dev->name, "eth%d", unit);
373 netdev_boot_setup_check(dev);
374 irq = dev->irq;
375 dma = dev->dma;
376 } else {
377 dev->base_addr = io;
378 }
379
380 if (dev->base_addr > 0x1ff) {
381 err = ni65_probe1(dev, dev->base_addr);
382 } else if (dev->base_addr > 0) {
383 err = -ENXIO;
384 } else {
385 for (port = ports; *port && ni65_probe1(dev, *port); port++)
386 ;
387 if (!*port)
388 err = -ENODEV;
389 }
390 if (err)
391 goto out;
392
393 err = register_netdev(dev);
394 if (err)
395 goto out1;
396 return dev;
397out1:
398 cleanup_card(dev);
399out:
400 free_netdev(dev);
401 return ERR_PTR(err);
402}
403
404static const struct net_device_ops ni65_netdev_ops = {
405 .ndo_open = ni65_open,
406 .ndo_stop = ni65_close,
407 .ndo_start_xmit = ni65_send_packet,
408 .ndo_tx_timeout = ni65_timeout,
409 .ndo_set_rx_mode = set_multicast_list,
410 .ndo_set_mac_address = eth_mac_addr,
411 .ndo_validate_addr = eth_validate_addr,
412};
413
414
415
416
417static int __init ni65_probe1(struct net_device *dev,int ioaddr)
418{
419 int i,j;
420 struct priv *p;
421 unsigned long flags;
422
423 dev->irq = irq;
424 dev->dma = dma;
425
426 for(i=0;i<NUM_CARDS;i++) {
427 if(!request_region(ioaddr, cards[i].total_size, cards[i].cardname))
428 continue;
429 if(cards[i].id_offset >= 0) {
430 if(inb(ioaddr+cards[i].id_offset+0) != cards[i].id0 ||
431 inb(ioaddr+cards[i].id_offset+1) != cards[i].id1) {
432 release_region(ioaddr, cards[i].total_size);
433 continue;
434 }
435 }
436 if(cards[i].vendor_id) {
437 for(j=0;j<3;j++)
438 if(inb(ioaddr+cards[i].addr_offset+j) != cards[i].vendor_id[j])
439 release_region(ioaddr, cards[i].total_size);
440 }
441 break;
442 }
443 if(i == NUM_CARDS)
444 return -ENODEV;
445
446 for(j=0;j<6;j++)
447 dev->dev_addr[j] = inb(ioaddr+cards[i].addr_offset+j);
448
449 if( (j=ni65_alloc_buffer(dev)) < 0) {
450 release_region(ioaddr, cards[i].total_size);
451 return j;
452 }
453 p = dev->ml_priv;
454 p->cmdr_addr = ioaddr + cards[i].cmd_offset;
455 p->cardno = i;
456 spin_lock_init(&p->ring_lock);
457
458 printk(KERN_INFO "%s: %s found at %#3x, ", dev->name, cards[p->cardno].cardname , ioaddr);
459
460 outw(inw(PORT+L_RESET),PORT+L_RESET);
461 if( (j=readreg(CSR0)) != 0x4) {
462 printk("failed.\n");
463 printk(KERN_ERR "%s: Can't RESET card: %04x\n", dev->name, j);
464 ni65_free_buffer(p);
465 release_region(ioaddr, cards[p->cardno].total_size);
466 return -EAGAIN;
467 }
468
469 outw(88,PORT+L_ADDRREG);
470 if(inw(PORT+L_ADDRREG) == 88) {
471 unsigned long v;
472 v = inw(PORT+L_DATAREG);
473 v <<= 16;
474 outw(89,PORT+L_ADDRREG);
475 v |= inw(PORT+L_DATAREG);
476 printk("Version %#08lx, ",v);
477 p->features = INIT_RING_BEFORE_START;
478 }
479 else {
480 printk("ancient LANCE, ");
481 p->features = 0x0;
482 }
483
484 if(test_bit(0,&cards[i].config)) {
485 dev->irq = irqtab[(inw(ioaddr+L_CONFIG)>>2)&3];
486 dev->dma = dmatab[inw(ioaddr+L_CONFIG)&3];
487 printk("IRQ %d (from card), DMA %d (from card).\n",dev->irq,dev->dma);
488 }
489 else {
490 if(dev->dma == 0) {
491
492 unsigned long dma_channels =
493 ((inb(DMA1_STAT_REG) >> 4) & 0x0f)
494 | (inb(DMA2_STAT_REG) & 0xf0);
495 for(i=1;i<5;i++) {
496 int dma = dmatab[i];
497 if(test_bit(dma,&dma_channels) || request_dma(dma,"ni6510"))
498 continue;
499
500 flags=claim_dma_lock();
501 disable_dma(dma);
502 set_dma_mode(dma,DMA_MODE_CASCADE);
503 enable_dma(dma);
504 release_dma_lock(flags);
505
506 ni65_init_lance(p,dev->dev_addr,0,0);
507
508 flags=claim_dma_lock();
509 disable_dma(dma);
510 free_dma(dma);
511 release_dma_lock(flags);
512
513 if(readreg(CSR0) & CSR0_IDON)
514 break;
515 }
516 if(i == 5) {
517 printk("failed.\n");
518 printk(KERN_ERR "%s: Can't detect DMA channel!\n", dev->name);
519 ni65_free_buffer(p);
520 release_region(ioaddr, cards[p->cardno].total_size);
521 return -EAGAIN;
522 }
523 dev->dma = dmatab[i];
524 printk("DMA %d (autodetected), ",dev->dma);
525 }
526 else
527 printk("DMA %d (assigned), ",dev->dma);
528
529 if(dev->irq < 2)
530 {
531 unsigned long irq_mask;
532
533 ni65_init_lance(p,dev->dev_addr,0,0);
534 irq_mask = probe_irq_on();
535 writereg(CSR0_INIT|CSR0_INEA,CSR0);
536 msleep(20);
537 dev->irq = probe_irq_off(irq_mask);
538 if(!dev->irq)
539 {
540 printk("Failed to detect IRQ line!\n");
541 ni65_free_buffer(p);
542 release_region(ioaddr, cards[p->cardno].total_size);
543 return -EAGAIN;
544 }
545 printk("IRQ %d (autodetected).\n",dev->irq);
546 }
547 else
548 printk("IRQ %d (assigned).\n",dev->irq);
549 }
550
551 if(request_dma(dev->dma, cards[p->cardno].cardname ) != 0)
552 {
553 printk(KERN_ERR "%s: Can't request dma-channel %d\n",dev->name,(int) dev->dma);
554 ni65_free_buffer(p);
555 release_region(ioaddr, cards[p->cardno].total_size);
556 return -EAGAIN;
557 }
558
559 dev->base_addr = ioaddr;
560 dev->netdev_ops = &ni65_netdev_ops;
561 dev->watchdog_timeo = HZ/2;
562
563 return 0;
564}
565
566
567
568
569static void ni65_init_lance(struct priv *p,unsigned char *daddr,int filter,int mode)
570{
571 int i;
572 u32 pib;
573
574 writereg(CSR0_CLRALL|CSR0_STOP,CSR0);
575
576 for(i=0;i<6;i++)
577 p->ib.eaddr[i] = daddr[i];
578
579 for(i=0;i<8;i++)
580 p->ib.filter[i] = filter;
581 p->ib.mode = mode;
582
583 p->ib.trp = (u32) isa_virt_to_bus(p->tmdhead) | TMDNUMMASK;
584 p->ib.rrp = (u32) isa_virt_to_bus(p->rmdhead) | RMDNUMMASK;
585 writereg(0,CSR3);
586 pib = (u32) isa_virt_to_bus(&p->ib);
587 writereg(pib & 0xffff,CSR1);
588 writereg(pib >> 16,CSR2);
589
590 writereg(CSR0_INIT,CSR0);
591
592 for(i=0;i<32;i++)
593 {
594 mdelay(4);
595 if(inw(PORT+L_DATAREG) & (CSR0_IDON | CSR0_MERR) )
596 break;
597 }
598}
599
600
601
602
603static void *ni65_alloc_mem(struct net_device *dev,char *what,int size,int type)
604{
605 struct sk_buff *skb=NULL;
606 unsigned char *ptr;
607 void *ret;
608
609 if(type) {
610 ret = skb = alloc_skb(2+16+size,GFP_KERNEL|GFP_DMA);
611 if(!skb) {
612 printk(KERN_WARNING "%s: unable to allocate %s memory.\n",dev->name,what);
613 return NULL;
614 }
615 skb_reserve(skb,2+16);
616 skb_put(skb,R_BUF_SIZE);
617 ptr = skb->data;
618 }
619 else {
620 ret = ptr = kmalloc(T_BUF_SIZE,GFP_KERNEL | GFP_DMA);
621 if(!ret)
622 return NULL;
623 }
624 if( (u32) virt_to_phys(ptr+size) > 0x1000000) {
625 printk(KERN_WARNING "%s: unable to allocate %s memory in lower 16MB!\n",dev->name,what);
626 if(type)
627 kfree_skb(skb);
628 else
629 kfree(ptr);
630 return NULL;
631 }
632 return ret;
633}
634
635
636
637
638static int ni65_alloc_buffer(struct net_device *dev)
639{
640 unsigned char *ptr;
641 struct priv *p;
642 int i;
643
644
645
646
647 ptr = ni65_alloc_mem(dev,"BUFFER",sizeof(struct priv)+8,0);
648 if(!ptr)
649 return -ENOMEM;
650
651 p = dev->ml_priv = (struct priv *) (((unsigned long) ptr + 7) & ~0x7);
652 memset((char *)p, 0, sizeof(struct priv));
653 p->self = ptr;
654
655 for(i=0;i<TMDNUM;i++)
656 {
657#ifdef XMT_VIA_SKB
658 p->tmd_skb[i] = NULL;
659#endif
660 p->tmdbounce[i] = ni65_alloc_mem(dev,"XMIT",T_BUF_SIZE,0);
661 if(!p->tmdbounce[i]) {
662 ni65_free_buffer(p);
663 return -ENOMEM;
664 }
665 }
666
667 for(i=0;i<RMDNUM;i++)
668 {
669#ifdef RCV_VIA_SKB
670 p->recv_skb[i] = ni65_alloc_mem(dev,"RECV",R_BUF_SIZE,1);
671 if(!p->recv_skb[i]) {
672 ni65_free_buffer(p);
673 return -ENOMEM;
674 }
675#else
676 p->recvbounce[i] = ni65_alloc_mem(dev,"RECV",R_BUF_SIZE,0);
677 if(!p->recvbounce[i]) {
678 ni65_free_buffer(p);
679 return -ENOMEM;
680 }
681#endif
682 }
683
684 return 0;
685}
686
687
688
689
690static void ni65_free_buffer(struct priv *p)
691{
692 int i;
693
694 if(!p)
695 return;
696
697 for(i=0;i<TMDNUM;i++) {
698 kfree(p->tmdbounce[i]);
699#ifdef XMT_VIA_SKB
700 if(p->tmd_skb[i])
701 dev_kfree_skb(p->tmd_skb[i]);
702#endif
703 }
704
705 for(i=0;i<RMDNUM;i++)
706 {
707#ifdef RCV_VIA_SKB
708 if(p->recv_skb[i])
709 dev_kfree_skb(p->recv_skb[i]);
710#else
711 kfree(p->recvbounce[i]);
712#endif
713 }
714 kfree(p->self);
715}
716
717
718
719
720
721static void ni65_stop_start(struct net_device *dev,struct priv *p)
722{
723 int csr0 = CSR0_INEA;
724
725 writedatareg(CSR0_STOP);
726
727 if(debuglevel > 1)
728 printk(KERN_DEBUG "ni65_stop_start\n");
729
730 if(p->features & INIT_RING_BEFORE_START) {
731 int i;
732#ifdef XMT_VIA_SKB
733 struct sk_buff *skb_save[TMDNUM];
734#endif
735 unsigned long buffer[TMDNUM];
736 short blen[TMDNUM];
737
738 if(p->xmit_queued) {
739 while(1) {
740 if((p->tmdhead[p->tmdlast].u.s.status & XMIT_OWN))
741 break;
742 p->tmdlast = (p->tmdlast + 1) & (TMDNUM-1);
743 if(p->tmdlast == p->tmdnum)
744 break;
745 }
746 }
747
748 for(i=0;i<TMDNUM;i++) {
749 struct tmd *tmdp = p->tmdhead + i;
750#ifdef XMT_VIA_SKB
751 skb_save[i] = p->tmd_skb[i];
752#endif
753 buffer[i] = (u32) isa_bus_to_virt(tmdp->u.buffer);
754 blen[i] = tmdp->blen;
755 tmdp->u.s.status = 0x0;
756 }
757
758 for(i=0;i<RMDNUM;i++) {
759 struct rmd *rmdp = p->rmdhead + i;
760 rmdp->u.s.status = RCV_OWN;
761 }
762 p->tmdnum = p->xmit_queued = 0;
763 writedatareg(CSR0_STRT | csr0);
764
765 for(i=0;i<TMDNUM;i++) {
766 int num = (i + p->tmdlast) & (TMDNUM-1);
767 p->tmdhead[i].u.buffer = (u32) isa_virt_to_bus((char *)buffer[num]);
768 p->tmdhead[i].blen = blen[num];
769 if(p->tmdhead[i].u.s.status & XMIT_OWN) {
770 p->tmdnum = (p->tmdnum + 1) & (TMDNUM-1);
771 p->xmit_queued = 1;
772 writedatareg(CSR0_TDMD | CSR0_INEA | csr0);
773 }
774#ifdef XMT_VIA_SKB
775 p->tmd_skb[i] = skb_save[num];
776#endif
777 }
778 p->rmdnum = p->tmdlast = 0;
779 if(!p->lock)
780 if (p->tmdnum || !p->xmit_queued)
781 netif_wake_queue(dev);
782 netif_trans_update(dev);
783 }
784 else
785 writedatareg(CSR0_STRT | csr0);
786}
787
788
789
790
791static int ni65_lance_reinit(struct net_device *dev)
792{
793 int i;
794 struct priv *p = dev->ml_priv;
795 unsigned long flags;
796
797 p->lock = 0;
798 p->xmit_queued = 0;
799
800 flags=claim_dma_lock();
801 disable_dma(dev->dma);
802 set_dma_mode(dev->dma,DMA_MODE_CASCADE);
803 enable_dma(dev->dma);
804 release_dma_lock(flags);
805
806 outw(inw(PORT+L_RESET),PORT+L_RESET);
807 if( (i=readreg(CSR0) ) != 0x4)
808 {
809 printk(KERN_ERR "%s: can't RESET %s card: %04x\n",dev->name,
810 cards[p->cardno].cardname,(int) i);
811 flags=claim_dma_lock();
812 disable_dma(dev->dma);
813 release_dma_lock(flags);
814 return 0;
815 }
816
817 p->rmdnum = p->tmdnum = p->tmdlast = p->tmdbouncenum = 0;
818 for(i=0;i<TMDNUM;i++)
819 {
820 struct tmd *tmdp = p->tmdhead + i;
821#ifdef XMT_VIA_SKB
822 if(p->tmd_skb[i]) {
823 dev_kfree_skb(p->tmd_skb[i]);
824 p->tmd_skb[i] = NULL;
825 }
826#endif
827 tmdp->u.buffer = 0x0;
828 tmdp->u.s.status = XMIT_START | XMIT_END;
829 tmdp->blen = tmdp->status2 = 0;
830 }
831
832 for(i=0;i<RMDNUM;i++)
833 {
834 struct rmd *rmdp = p->rmdhead + i;
835#ifdef RCV_VIA_SKB
836 rmdp->u.buffer = (u32) isa_virt_to_bus(p->recv_skb[i]->data);
837#else
838 rmdp->u.buffer = (u32) isa_virt_to_bus(p->recvbounce[i]);
839#endif
840 rmdp->blen = -(R_BUF_SIZE-8);
841 rmdp->mlen = 0;
842 rmdp->u.s.status = RCV_OWN;
843 }
844
845 if(dev->flags & IFF_PROMISC)
846 ni65_init_lance(p,dev->dev_addr,0x00,M_PROM);
847 else if (netdev_mc_count(dev) || dev->flags & IFF_ALLMULTI)
848 ni65_init_lance(p,dev->dev_addr,0xff,0x0);
849 else
850 ni65_init_lance(p,dev->dev_addr,0x00,0x00);
851
852
853
854
855
856
857 if(inw(PORT+L_DATAREG) & CSR0_IDON) {
858 ni65_set_performance(p);
859
860 writedatareg(CSR0_CLRALL | CSR0_INEA | CSR0_STRT);
861 return 1;
862 }
863 printk(KERN_ERR "%s: can't init lance, status: %04x\n",dev->name,(int) inw(PORT+L_DATAREG));
864 flags=claim_dma_lock();
865 disable_dma(dev->dma);
866 release_dma_lock(flags);
867 return 0;
868}
869
870
871
872
873static irqreturn_t ni65_interrupt(int irq, void * dev_id)
874{
875 int csr0 = 0;
876 struct net_device *dev = dev_id;
877 struct priv *p;
878 int bcnt = 32;
879
880 p = dev->ml_priv;
881
882 spin_lock(&p->ring_lock);
883
884 while(--bcnt) {
885 csr0 = inw(PORT+L_DATAREG);
886
887#if 0
888 writedatareg( (csr0 & CSR0_CLRALL) );
889#else
890 writedatareg( (csr0 & CSR0_CLRALL) | CSR0_INEA );
891#endif
892
893 if(!(csr0 & (CSR0_ERR | CSR0_RINT | CSR0_TINT)))
894 break;
895
896 if(csr0 & CSR0_RINT)
897 ni65_recv_intr(dev,csr0);
898 if(csr0 & CSR0_TINT)
899 ni65_xmit_intr(dev,csr0);
900
901 if(csr0 & CSR0_ERR)
902 {
903 if(debuglevel > 1)
904 printk(KERN_ERR "%s: general error: %04x.\n",dev->name,csr0);
905 if(csr0 & CSR0_BABL)
906 dev->stats.tx_errors++;
907 if(csr0 & CSR0_MISS) {
908 int i;
909 for(i=0;i<RMDNUM;i++)
910 printk("%02x ",p->rmdhead[i].u.s.status);
911 printk("\n");
912 dev->stats.rx_errors++;
913 }
914 if(csr0 & CSR0_MERR) {
915 if(debuglevel > 1)
916 printk(KERN_ERR "%s: Ooops .. memory error: %04x.\n",dev->name,csr0);
917 ni65_stop_start(dev,p);
918 }
919 }
920 }
921
922#ifdef RCV_PARANOIA_CHECK
923{
924 int j;
925 for(j=0;j<RMDNUM;j++)
926 {
927 int i, num2;
928 for(i=RMDNUM-1;i>0;i--) {
929 num2 = (p->rmdnum + i) & (RMDNUM-1);
930 if(!(p->rmdhead[num2].u.s.status & RCV_OWN))
931 break;
932 }
933
934 if(i) {
935 int k, num1;
936 for(k=0;k<RMDNUM;k++) {
937 num1 = (p->rmdnum + k) & (RMDNUM-1);
938 if(!(p->rmdhead[num1].u.s.status & RCV_OWN))
939 break;
940 }
941 if(!k)
942 break;
943
944 if(debuglevel > 0)
945 {
946 char buf[256],*buf1;
947 buf1 = buf;
948 for(k=0;k<RMDNUM;k++) {
949 sprintf(buf1,"%02x ",(p->rmdhead[k].u.s.status));
950 buf1 += 3;
951 }
952 *buf1 = 0;
953 printk(KERN_ERR "%s: Ooops, receive ring corrupted %2d %2d | %s\n",dev->name,p->rmdnum,i,buf);
954 }
955
956 p->rmdnum = num1;
957 ni65_recv_intr(dev,csr0);
958 if((p->rmdhead[num2].u.s.status & RCV_OWN))
959 break;
960 }
961 else
962 break;
963 }
964}
965#endif
966
967 if( (csr0 & (CSR0_RXON | CSR0_TXON)) != (CSR0_RXON | CSR0_TXON) ) {
968 printk(KERN_DEBUG "%s: RX or TX was offline -> restart\n",dev->name);
969 ni65_stop_start(dev,p);
970 }
971 else
972 writedatareg(CSR0_INEA);
973
974 spin_unlock(&p->ring_lock);
975 return IRQ_HANDLED;
976}
977
978
979
980
981
982static void ni65_xmit_intr(struct net_device *dev,int csr0)
983{
984 struct priv *p = dev->ml_priv;
985
986 while(p->xmit_queued)
987 {
988 struct tmd *tmdp = p->tmdhead + p->tmdlast;
989 int tmdstat = tmdp->u.s.status;
990
991 if(tmdstat & XMIT_OWN)
992 break;
993
994 if(tmdstat & XMIT_ERR)
995 {
996#if 0
997 if(tmdp->status2 & XMIT_TDRMASK && debuglevel > 3)
998 printk(KERN_ERR "%s: tdr-problems (e.g. no resistor)\n",dev->name);
999#endif
1000
1001 if(tmdp->status2 & XMIT_RTRY)
1002 dev->stats.tx_aborted_errors++;
1003 if(tmdp->status2 & XMIT_LCAR)
1004 dev->stats.tx_carrier_errors++;
1005 if(tmdp->status2 & (XMIT_BUFF | XMIT_UFLO )) {
1006
1007 dev->stats.tx_fifo_errors++;
1008 if(debuglevel > 0)
1009 printk(KERN_ERR "%s: Xmit FIFO/BUFF error\n",dev->name);
1010 if(p->features & INIT_RING_BEFORE_START) {
1011 tmdp->u.s.status = XMIT_OWN | XMIT_START | XMIT_END;
1012 ni65_stop_start(dev,p);
1013 break;
1014 }
1015 else
1016 ni65_stop_start(dev,p);
1017 }
1018 if(debuglevel > 2)
1019 printk(KERN_ERR "%s: xmit-error: %04x %02x-%04x\n",dev->name,csr0,(int) tmdstat,(int) tmdp->status2);
1020 if(!(csr0 & CSR0_BABL))
1021 dev->stats.tx_errors++;
1022 tmdp->status2 = 0;
1023 }
1024 else {
1025 dev->stats.tx_bytes -= (short)(tmdp->blen);
1026 dev->stats.tx_packets++;
1027 }
1028
1029#ifdef XMT_VIA_SKB
1030 if(p->tmd_skb[p->tmdlast]) {
1031 dev_consume_skb_irq(p->tmd_skb[p->tmdlast]);
1032 p->tmd_skb[p->tmdlast] = NULL;
1033 }
1034#endif
1035
1036 p->tmdlast = (p->tmdlast + 1) & (TMDNUM-1);
1037 if(p->tmdlast == p->tmdnum)
1038 p->xmit_queued = 0;
1039 }
1040 netif_wake_queue(dev);
1041}
1042
1043
1044
1045
1046static void ni65_recv_intr(struct net_device *dev,int csr0)
1047{
1048 struct rmd *rmdp;
1049 int rmdstat,len;
1050 int cnt=0;
1051 struct priv *p = dev->ml_priv;
1052
1053 rmdp = p->rmdhead + p->rmdnum;
1054 while(!( (rmdstat = rmdp->u.s.status) & RCV_OWN))
1055 {
1056 cnt++;
1057 if( (rmdstat & (RCV_START | RCV_END | RCV_ERR)) != (RCV_START | RCV_END) )
1058 {
1059 if(!(rmdstat & RCV_ERR)) {
1060 if(rmdstat & RCV_START)
1061 {
1062 dev->stats.rx_length_errors++;
1063 printk(KERN_ERR "%s: recv, packet too long: %d\n",dev->name,rmdp->mlen & 0x0fff);
1064 }
1065 }
1066 else {
1067 if(debuglevel > 2)
1068 printk(KERN_ERR "%s: receive-error: %04x, lance-status: %04x/%04x\n",
1069 dev->name,(int) rmdstat,csr0,(int) inw(PORT+L_DATAREG) );
1070 if(rmdstat & RCV_FRAM)
1071 dev->stats.rx_frame_errors++;
1072 if(rmdstat & RCV_OFLO)
1073 dev->stats.rx_over_errors++;
1074 if(rmdstat & RCV_CRC)
1075 dev->stats.rx_crc_errors++;
1076 if(rmdstat & RCV_BUF_ERR)
1077 dev->stats.rx_fifo_errors++;
1078 }
1079 if(!(csr0 & CSR0_MISS))
1080 dev->stats.rx_errors++;
1081 }
1082 else if( (len = (rmdp->mlen & 0x0fff) - 4) >= 60)
1083 {
1084#ifdef RCV_VIA_SKB
1085 struct sk_buff *skb = alloc_skb(R_BUF_SIZE+2+16,GFP_ATOMIC);
1086 if (skb)
1087 skb_reserve(skb,16);
1088#else
1089 struct sk_buff *skb = netdev_alloc_skb(dev, len + 2);
1090#endif
1091 if(skb)
1092 {
1093 skb_reserve(skb,2);
1094#ifdef RCV_VIA_SKB
1095 if( (unsigned long) (skb->data + R_BUF_SIZE) > 0x1000000) {
1096 skb_put(skb,len);
1097 skb_copy_to_linear_data(skb, (unsigned char *)(p->recv_skb[p->rmdnum]->data),len);
1098 }
1099 else {
1100 struct sk_buff *skb1 = p->recv_skb[p->rmdnum];
1101 skb_put(skb,R_BUF_SIZE);
1102 p->recv_skb[p->rmdnum] = skb;
1103 rmdp->u.buffer = (u32) isa_virt_to_bus(skb->data);
1104 skb = skb1;
1105 skb_trim(skb,len);
1106 }
1107#else
1108 skb_put(skb,len);
1109 skb_copy_to_linear_data(skb, (unsigned char *) p->recvbounce[p->rmdnum],len);
1110#endif
1111 dev->stats.rx_packets++;
1112 dev->stats.rx_bytes += len;
1113 skb->protocol=eth_type_trans(skb,dev);
1114 netif_rx(skb);
1115 }
1116 else
1117 {
1118 printk(KERN_ERR "%s: can't alloc new sk_buff\n",dev->name);
1119 dev->stats.rx_dropped++;
1120 }
1121 }
1122 else {
1123 printk(KERN_INFO "%s: received runt packet\n",dev->name);
1124 dev->stats.rx_errors++;
1125 }
1126 rmdp->blen = -(R_BUF_SIZE-8);
1127 rmdp->mlen = 0;
1128 rmdp->u.s.status = RCV_OWN;
1129 p->rmdnum = (p->rmdnum + 1) & (RMDNUM-1);
1130 rmdp = p->rmdhead + p->rmdnum;
1131 }
1132}
1133
1134
1135
1136
1137
1138static void ni65_timeout(struct net_device *dev)
1139{
1140 int i;
1141 struct priv *p = dev->ml_priv;
1142
1143 printk(KERN_ERR "%s: xmitter timed out, try to restart!\n",dev->name);
1144 for(i=0;i<TMDNUM;i++)
1145 printk("%02x ",p->tmdhead[i].u.s.status);
1146 printk("\n");
1147 ni65_lance_reinit(dev);
1148 netif_trans_update(dev);
1149 netif_wake_queue(dev);
1150}
1151
1152
1153
1154
1155
1156static netdev_tx_t ni65_send_packet(struct sk_buff *skb,
1157 struct net_device *dev)
1158{
1159 struct priv *p = dev->ml_priv;
1160
1161 netif_stop_queue(dev);
1162
1163 if (test_and_set_bit(0, (void*)&p->lock)) {
1164 printk(KERN_ERR "%s: Queue was locked.\n", dev->name);
1165 return NETDEV_TX_BUSY;
1166 }
1167
1168 {
1169 short len = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN;
1170 struct tmd *tmdp;
1171 unsigned long flags;
1172
1173#ifdef XMT_VIA_SKB
1174 if( (unsigned long) (skb->data + skb->len) > 0x1000000) {
1175#endif
1176
1177 skb_copy_from_linear_data(skb, p->tmdbounce[p->tmdbouncenum],
1178 skb->len > T_BUF_SIZE ? T_BUF_SIZE :
1179 skb->len);
1180 if (len > skb->len)
1181 memset((char *)p->tmdbounce[p->tmdbouncenum]+skb->len, 0, len-skb->len);
1182 dev_kfree_skb (skb);
1183
1184 spin_lock_irqsave(&p->ring_lock, flags);
1185 tmdp = p->tmdhead + p->tmdnum;
1186 tmdp->u.buffer = (u32) isa_virt_to_bus(p->tmdbounce[p->tmdbouncenum]);
1187 p->tmdbouncenum = (p->tmdbouncenum + 1) & (TMDNUM - 1);
1188
1189#ifdef XMT_VIA_SKB
1190 }
1191 else {
1192 spin_lock_irqsave(&p->ring_lock, flags);
1193
1194 tmdp = p->tmdhead + p->tmdnum;
1195 tmdp->u.buffer = (u32) isa_virt_to_bus(skb->data);
1196 p->tmd_skb[p->tmdnum] = skb;
1197 }
1198#endif
1199 tmdp->blen = -len;
1200
1201 tmdp->u.s.status = XMIT_OWN | XMIT_START | XMIT_END;
1202 writedatareg(CSR0_TDMD | CSR0_INEA);
1203
1204 p->xmit_queued = 1;
1205 p->tmdnum = (p->tmdnum + 1) & (TMDNUM-1);
1206
1207 if(p->tmdnum != p->tmdlast)
1208 netif_wake_queue(dev);
1209
1210 p->lock = 0;
1211
1212 spin_unlock_irqrestore(&p->ring_lock, flags);
1213 }
1214
1215 return NETDEV_TX_OK;
1216}
1217
1218static void set_multicast_list(struct net_device *dev)
1219{
1220 if(!ni65_lance_reinit(dev))
1221 printk(KERN_ERR "%s: Can't switch card into MC mode!\n",dev->name);
1222 netif_wake_queue(dev);
1223}
1224
1225#ifdef MODULE
1226static struct net_device *dev_ni65;
1227
1228module_param_hw(irq, int, irq, 0);
1229module_param_hw(io, int, ioport, 0);
1230module_param_hw(dma, int, dma, 0);
1231MODULE_PARM_DESC(irq, "ni6510 IRQ number (ignored for some cards)");
1232MODULE_PARM_DESC(io, "ni6510 I/O base address");
1233MODULE_PARM_DESC(dma, "ni6510 ISA DMA channel (ignored for some cards)");
1234
1235int __init init_module(void)
1236{
1237 dev_ni65 = ni65_probe(-1);
1238 return PTR_ERR_OR_ZERO(dev_ni65);
1239}
1240
1241void __exit cleanup_module(void)
1242{
1243 unregister_netdev(dev_ni65);
1244 cleanup_card(dev_ni65);
1245 free_netdev(dev_ni65);
1246}
1247#endif
1248
1249MODULE_LICENSE("GPL");
1250
