LXR linux/drivers/net/ethernet/apm/xgene-v2/ring.h

   1/* SPDX-License-Identifier: GPL-2.0-or-later */
   2/*
   3 * Applied Micro X-Gene SoC Ethernet v2 Driver
   4 *
   5 * Copyright (c) 2017, Applied Micro Circuits Corporation
   6 * Author(s): Iyappan Subramanian <isubramanian@apm.com>
   7 *            Keyur Chudgar <kchudgar@apm.com>
   8 */
   9
  10#ifndef __XGENE_ENET_V2_RING_H__
  11#define __XGENE_ENET_V2_RING_H__
  12
  13#define XGENE_ENET_DESC_SIZE    64
  14#define XGENE_ENET_NUM_DESC     256
  15#define NUM_BUFS                8
  16#define SLOT_EMPTY              0xfff
  17
  18#define DMATXCTRL               0xa180
  19#define DMATXDESCL              0xa184
  20#define DMATXDESCH              0xa1a0
  21#define DMATXSTATUS             0xa188
  22#define DMARXCTRL               0xa18c
  23#define DMARXDESCL              0xa190
  24#define DMARXDESCH              0xa1a4
  25#define DMARXSTATUS             0xa194
  26#define DMAINTRMASK             0xa198
  27#define DMAINTERRUPT            0xa19c
  28
  29#define D_POS                   62
  30#define D_LEN                   2
  31#define E_POS                   63
  32#define E_LEN                   1
  33#define PKT_ADDRL_POS           0
  34#define PKT_ADDRL_LEN           32
  35#define PKT_ADDRH_POS           32
  36#define PKT_ADDRH_LEN           10
  37#define PKT_SIZE_POS            32
  38#define PKT_SIZE_LEN            12
  39#define NEXT_DESC_ADDRL_POS     0
  40#define NEXT_DESC_ADDRL_LEN     32
  41#define NEXT_DESC_ADDRH_POS     48
  42#define NEXT_DESC_ADDRH_LEN     10
  43
  44#define TXPKTCOUNT_POS          16
  45#define TXPKTCOUNT_LEN          8
  46#define RXPKTCOUNT_POS          16
  47#define RXPKTCOUNT_LEN          8
  48
  49#define TX_PKT_SENT             BIT(0)
  50#define TX_BUS_ERROR            BIT(3)
  51#define RX_PKT_RCVD             BIT(4)
  52#define RX_BUS_ERROR            BIT(7)
  53#define RXSTATUS_RXPKTRCVD      BIT(0)
  54
  55struct xge_raw_desc {
  56        __le64 m0;
  57        __le64 m1;
  58        __le64 m2;
  59        __le64 m3;
  60        __le64 m4;
  61        __le64 m5;
  62        __le64 m6;
  63        __le64 m7;
  64};
  65
  66struct pkt_info {
  67        struct sk_buff *skb;
  68        dma_addr_t dma_addr;
  69        void *pkt_buf;
  70};
  71
  72/* software context of a descriptor ring */
  73struct xge_desc_ring {
  74        struct net_device *ndev;
  75        dma_addr_t dma_addr;
  76        u8 head;
  77        u8 tail;
  78        union {
  79                void *desc_addr;
  80                struct xge_raw_desc *raw_desc;
  81        };
  82        struct pkt_info (*pkt_info);
  83};
  84
  85static inline u64 xge_set_desc_bits(int pos, int len, u64 val)
  86{
  87        return (val & ((1ULL << len) - 1)) << pos;
  88}
  89
  90static inline u64 xge_get_desc_bits(int pos, int len, u64 src)
  91{
  92        return (src >> pos) & ((1ULL << len) - 1);
  93}
  94
  95#define SET_BITS(field, val) \
  96                xge_set_desc_bits(field ## _POS, field ## _LEN, val)
  97
  98#define GET_BITS(field, src) \
  99                xge_get_desc_bits(field ## _POS, field ## _LEN, src)
 100
 101void xge_setup_desc(struct xge_desc_ring *ring);
 102void xge_update_tx_desc_addr(struct xge_pdata *pdata);
 103void xge_update_rx_desc_addr(struct xge_pdata *pdata);
 104void xge_intr_enable(struct xge_pdata *pdata);
 105void xge_intr_disable(struct xge_pdata *pdata);
 106
 107#endif  /* __XGENE_ENET_V2_RING_H__ */
 108