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2
3
4#ifndef _ICE_LAN_TX_RX_H_
5#define _ICE_LAN_TX_RX_H_
6
7union ice_32byte_rx_desc {
8 struct {
9 __le64 pkt_addr;
10 __le64 hdr_addr;
11
12 __le64 rsvd1;
13 __le64 rsvd2;
14 } read;
15 struct {
16 struct {
17 struct {
18 __le16 mirroring_status;
19 __le16 l2tag1;
20 } lo_dword;
21 union {
22 __le32 rss;
23 __le32 fd_id;
24 } hi_dword;
25 } qword0;
26 struct {
27
28 __le64 status_error_len;
29 } qword1;
30 struct {
31 __le16 ext_status;
32 __le16 rsvd;
33 __le16 l2tag2_1;
34 __le16 l2tag2_2;
35 } qword2;
36 struct {
37 __le32 reserved;
38 __le32 fd_id;
39 } qword3;
40 } wb;
41};
42
43struct ice_rx_ptype_decoded {
44 u32 ptype:10;
45 u32 known:1;
46 u32 outer_ip:1;
47 u32 outer_ip_ver:2;
48 u32 outer_frag:1;
49 u32 tunnel_type:3;
50 u32 tunnel_end_prot:2;
51 u32 tunnel_end_frag:1;
52 u32 inner_prot:4;
53 u32 payload_layer:3;
54};
55
56enum ice_rx_ptype_outer_ip {
57 ICE_RX_PTYPE_OUTER_L2 = 0,
58 ICE_RX_PTYPE_OUTER_IP = 1,
59};
60
61enum ice_rx_ptype_outer_ip_ver {
62 ICE_RX_PTYPE_OUTER_NONE = 0,
63 ICE_RX_PTYPE_OUTER_IPV4 = 1,
64 ICE_RX_PTYPE_OUTER_IPV6 = 2,
65};
66
67enum ice_rx_ptype_outer_fragmented {
68 ICE_RX_PTYPE_NOT_FRAG = 0,
69 ICE_RX_PTYPE_FRAG = 1,
70};
71
72enum ice_rx_ptype_tunnel_type {
73 ICE_RX_PTYPE_TUNNEL_NONE = 0,
74 ICE_RX_PTYPE_TUNNEL_IP_IP = 1,
75 ICE_RX_PTYPE_TUNNEL_IP_GRENAT = 2,
76 ICE_RX_PTYPE_TUNNEL_IP_GRENAT_MAC = 3,
77 ICE_RX_PTYPE_TUNNEL_IP_GRENAT_MAC_VLAN = 4,
78};
79
80enum ice_rx_ptype_tunnel_end_prot {
81 ICE_RX_PTYPE_TUNNEL_END_NONE = 0,
82 ICE_RX_PTYPE_TUNNEL_END_IPV4 = 1,
83 ICE_RX_PTYPE_TUNNEL_END_IPV6 = 2,
84};
85
86enum ice_rx_ptype_inner_prot {
87 ICE_RX_PTYPE_INNER_PROT_NONE = 0,
88 ICE_RX_PTYPE_INNER_PROT_UDP = 1,
89 ICE_RX_PTYPE_INNER_PROT_TCP = 2,
90 ICE_RX_PTYPE_INNER_PROT_SCTP = 3,
91 ICE_RX_PTYPE_INNER_PROT_ICMP = 4,
92 ICE_RX_PTYPE_INNER_PROT_TIMESYNC = 5,
93};
94
95enum ice_rx_ptype_payload_layer {
96 ICE_RX_PTYPE_PAYLOAD_LAYER_NONE = 0,
97 ICE_RX_PTYPE_PAYLOAD_LAYER_PAY2 = 1,
98 ICE_RX_PTYPE_PAYLOAD_LAYER_PAY3 = 2,
99 ICE_RX_PTYPE_PAYLOAD_LAYER_PAY4 = 3,
100};
101
102
103
104
105
106union ice_32b_rx_flex_desc {
107 struct {
108 __le64 pkt_addr;
109 __le64 hdr_addr;
110
111 __le64 rsvd1;
112 __le64 rsvd2;
113 } read;
114 struct {
115
116 u8 rxdid;
117 u8 mir_id_umb_cast;
118 __le16 ptype_flex_flags0;
119 __le16 pkt_len;
120 __le16 hdr_len_sph_flex_flags1;
121
122
123
124
125 __le16 status_error0;
126 __le16 l2tag1;
127 __le16 flex_meta0;
128 __le16 flex_meta1;
129
130
131 __le16 status_error1;
132 u8 flex_flags2;
133 u8 time_stamp_low;
134 __le16 l2tag2_1st;
135 __le16 l2tag2_2nd;
136
137
138 __le16 flex_meta2;
139 __le16 flex_meta3;
140 union {
141 struct {
142 __le16 flex_meta4;
143 __le16 flex_meta5;
144 } flex;
145 __le32 ts_high;
146 } flex_ts;
147 } wb;
148};
149
150
151
152
153
154struct ice_32b_rx_flex_desc_nic {
155
156 u8 rxdid;
157 u8 mir_id_umb_cast;
158 __le16 ptype_flexi_flags0;
159 __le16 pkt_len;
160 __le16 hdr_len_sph_flex_flags1;
161
162
163 __le16 status_error0;
164 __le16 l2tag1;
165 __le32 rss_hash;
166
167
168 __le16 status_error1;
169 u8 flexi_flags2;
170 u8 ts_low;
171 __le16 l2tag2_1st;
172 __le16 l2tag2_2nd;
173
174
175 __le32 flow_id;
176 union {
177 struct {
178 __le16 vlan_id;
179 __le16 flow_id_ipv6;
180 } flex;
181 __le32 ts_high;
182 } flex_ts;
183};
184
185
186
187
188
189
190enum ice_rxdid {
191 ICE_RXDID_LEGACY_0 = 0,
192 ICE_RXDID_LEGACY_1 = 1,
193 ICE_RXDID_FLEX_NIC = 2,
194 ICE_RXDID_FLEX_NIC_2 = 6,
195 ICE_RXDID_HW = 7,
196 ICE_RXDID_LAST = 63,
197};
198
199
200#define ICE_RX_OPC_MDID 0x01
201
202
203enum ice_flex_rx_mdid {
204 ICE_RX_MDID_FLOW_ID_LOWER = 5,
205 ICE_RX_MDID_FLOW_ID_HIGH,
206 ICE_RX_MDID_SRC_VSI = 19,
207 ICE_RX_MDID_HASH_LOW = 56,
208 ICE_RX_MDID_HASH_HIGH,
209};
210
211
212enum ice_flg64_bits {
213 ICE_FLG_PKT_DSI = 0,
214 ICE_FLG_EVLAN_x8100 = 15,
215 ICE_FLG_EVLAN_x9100,
216 ICE_FLG_VLAN_x8100,
217 ICE_FLG_TNL_MAC = 22,
218 ICE_FLG_TNL_VLAN,
219 ICE_FLG_PKT_FRG,
220 ICE_FLG_FIN = 32,
221 ICE_FLG_SYN,
222 ICE_FLG_RST,
223 ICE_FLG_TNL0 = 38,
224 ICE_FLG_TNL1,
225 ICE_FLG_TNL2,
226 ICE_FLG_UDP_GRE,
227 ICE_FLG_RSVD = 63
228};
229
230
231#define ICE_RX_FLEX_DESC_PTYPE_M (0x3FF)
232
233
234#define ICE_RX_FLX_DESC_PKT_LEN_M (0x3FFF)
235
236enum ice_rx_flex_desc_status_error_0_bits {
237
238 ICE_RX_FLEX_DESC_STATUS0_DD_S = 0,
239 ICE_RX_FLEX_DESC_STATUS0_EOF_S,
240 ICE_RX_FLEX_DESC_STATUS0_HBO_S,
241 ICE_RX_FLEX_DESC_STATUS0_L3L4P_S,
242 ICE_RX_FLEX_DESC_STATUS0_XSUM_IPE_S,
243 ICE_RX_FLEX_DESC_STATUS0_XSUM_L4E_S,
244 ICE_RX_FLEX_DESC_STATUS0_XSUM_EIPE_S,
245 ICE_RX_FLEX_DESC_STATUS0_XSUM_EUDPE_S,
246 ICE_RX_FLEX_DESC_STATUS0_LPBK_S,
247 ICE_RX_FLEX_DESC_STATUS0_IPV6EXADD_S,
248 ICE_RX_FLEX_DESC_STATUS0_RXE_S,
249 ICE_RX_FLEX_DESC_STATUS0_CRCP_S,
250 ICE_RX_FLEX_DESC_STATUS0_RSS_VALID_S,
251 ICE_RX_FLEX_DESC_STATUS0_L2TAG1P_S,
252 ICE_RX_FLEX_DESC_STATUS0_XTRMD0_VALID_S,
253 ICE_RX_FLEX_DESC_STATUS0_XTRMD1_VALID_S,
254 ICE_RX_FLEX_DESC_STATUS0_LAST
255};
256
257#define ICE_RXQ_CTX_SIZE_DWORDS 8
258#define ICE_RXQ_CTX_SZ (ICE_RXQ_CTX_SIZE_DWORDS * sizeof(u32))
259#define ICE_TX_CMPLTNQ_CTX_SIZE_DWORDS 22
260#define ICE_TX_DRBELL_Q_CTX_SIZE_DWORDS 5
261#define GLTCLAN_CQ_CNTX(i, CQ) (GLTCLAN_CQ_CNTX0(CQ) + ((i) * 0x0800))
262
263
264
265
266
267
268
269
270struct ice_rlan_ctx {
271 u16 head;
272 u16 cpuid;
273#define ICE_RLAN_BASE_S 7
274 u64 base;
275 u16 qlen;
276#define ICE_RLAN_CTX_DBUF_S 7
277 u16 dbuf;
278#define ICE_RLAN_CTX_HBUF_S 6
279 u16 hbuf;
280 u8 dtype;
281 u8 dsize;
282 u8 crcstrip;
283 u8 l2tsel;
284 u8 hsplit_0;
285 u8 hsplit_1;
286 u8 showiv;
287 u32 rxmax;
288 u8 tphrdesc_ena;
289 u8 tphwdesc_ena;
290 u8 tphdata_ena;
291 u8 tphhead_ena;
292 u16 lrxqthresh;
293};
294
295struct ice_ctx_ele {
296 u16 offset;
297 u16 size_of;
298 u16 width;
299 u16 lsb;
300};
301
302#define ICE_CTX_STORE(_struct, _ele, _width, _lsb) { \
303 .offset = offsetof(struct _struct, _ele), \
304 .size_of = FIELD_SIZEOF(struct _struct, _ele), \
305 .width = _width, \
306 .lsb = _lsb, \
307}
308
309
310enum ice_rlan_ctx_rx_hsplit_0 {
311 ICE_RLAN_RX_HSPLIT_0_NO_SPLIT = 0,
312 ICE_RLAN_RX_HSPLIT_0_SPLIT_L2 = 1,
313 ICE_RLAN_RX_HSPLIT_0_SPLIT_IP = 2,
314 ICE_RLAN_RX_HSPLIT_0_SPLIT_TCP_UDP = 4,
315 ICE_RLAN_RX_HSPLIT_0_SPLIT_SCTP = 8,
316};
317
318
319enum ice_rlan_ctx_rx_hsplit_1 {
320 ICE_RLAN_RX_HSPLIT_1_NO_SPLIT = 0,
321 ICE_RLAN_RX_HSPLIT_1_SPLIT_L2 = 1,
322 ICE_RLAN_RX_HSPLIT_1_SPLIT_ALWAYS = 2,
323};
324
325
326struct ice_tx_desc {
327 __le64 buf_addr;
328 __le64 cmd_type_offset_bsz;
329};
330
331enum ice_tx_desc_dtype_value {
332 ICE_TX_DESC_DTYPE_DATA = 0x0,
333 ICE_TX_DESC_DTYPE_CTX = 0x1,
334
335 ICE_TX_DESC_DTYPE_DESC_DONE = 0xF,
336};
337
338#define ICE_TXD_QW1_CMD_S 4
339#define ICE_TXD_QW1_CMD_M (0xFFFUL << ICE_TXD_QW1_CMD_S)
340
341enum ice_tx_desc_cmd_bits {
342 ICE_TX_DESC_CMD_EOP = 0x0001,
343 ICE_TX_DESC_CMD_RS = 0x0002,
344 ICE_TX_DESC_CMD_IL2TAG1 = 0x0008,
345 ICE_TX_DESC_CMD_IIPT_IPV6 = 0x0020,
346 ICE_TX_DESC_CMD_IIPT_IPV4 = 0x0040,
347 ICE_TX_DESC_CMD_IIPT_IPV4_CSUM = 0x0060,
348 ICE_TX_DESC_CMD_L4T_EOFT_TCP = 0x0100,
349 ICE_TX_DESC_CMD_L4T_EOFT_SCTP = 0x0200,
350 ICE_TX_DESC_CMD_L4T_EOFT_UDP = 0x0300,
351};
352
353#define ICE_TXD_QW1_OFFSET_S 16
354#define ICE_TXD_QW1_OFFSET_M (0x3FFFFULL << ICE_TXD_QW1_OFFSET_S)
355
356enum ice_tx_desc_len_fields {
357
358 ICE_TX_DESC_LEN_MACLEN_S = 0,
359 ICE_TX_DESC_LEN_IPLEN_S = 7,
360 ICE_TX_DESC_LEN_L4_LEN_S = 14
361};
362
363#define ICE_TXD_QW1_MACLEN_M (0x7FUL << ICE_TX_DESC_LEN_MACLEN_S)
364#define ICE_TXD_QW1_IPLEN_M (0x7FUL << ICE_TX_DESC_LEN_IPLEN_S)
365#define ICE_TXD_QW1_L4LEN_M (0xFUL << ICE_TX_DESC_LEN_L4_LEN_S)
366
367
368#define ICE_TXD_MACLEN_MAX ((ICE_TXD_QW1_MACLEN_M >> \
369 ICE_TX_DESC_LEN_MACLEN_S) * ICE_BYTES_PER_WORD)
370#define ICE_TXD_IPLEN_MAX ((ICE_TXD_QW1_IPLEN_M >> \
371 ICE_TX_DESC_LEN_IPLEN_S) * ICE_BYTES_PER_DWORD)
372#define ICE_TXD_L4LEN_MAX ((ICE_TXD_QW1_L4LEN_M >> \
373 ICE_TX_DESC_LEN_L4_LEN_S) * ICE_BYTES_PER_DWORD)
374
375#define ICE_TXD_QW1_TX_BUF_SZ_S 34
376#define ICE_TXD_QW1_L2TAG1_S 48
377
378
379struct ice_tx_ctx_desc {
380 __le32 tunneling_params;
381 __le16 l2tag2;
382 __le16 rsvd;
383 __le64 qw1;
384};
385
386#define ICE_TXD_CTX_QW1_CMD_S 4
387#define ICE_TXD_CTX_QW1_CMD_M (0x7FUL << ICE_TXD_CTX_QW1_CMD_S)
388
389#define ICE_TXD_CTX_QW1_TSO_LEN_S 30
390#define ICE_TXD_CTX_QW1_TSO_LEN_M \
391 (0x3FFFFULL << ICE_TXD_CTX_QW1_TSO_LEN_S)
392
393#define ICE_TXD_CTX_QW1_MSS_S 50
394
395enum ice_tx_ctx_desc_cmd_bits {
396 ICE_TX_CTX_DESC_TSO = 0x01,
397 ICE_TX_CTX_DESC_TSYN = 0x02,
398 ICE_TX_CTX_DESC_IL2TAG2 = 0x04,
399 ICE_TX_CTX_DESC_IL2TAG2_IL2H = 0x08,
400 ICE_TX_CTX_DESC_SWTCH_NOTAG = 0x00,
401 ICE_TX_CTX_DESC_SWTCH_UPLINK = 0x10,
402 ICE_TX_CTX_DESC_SWTCH_LOCAL = 0x20,
403 ICE_TX_CTX_DESC_SWTCH_VSI = 0x30,
404 ICE_TX_CTX_DESC_RESERVED = 0x40
405};
406
407#define ICE_LAN_TXQ_MAX_QGRPS 127
408#define ICE_LAN_TXQ_MAX_QDIS 1023
409
410
411
412
413
414
415
416
417struct ice_tlan_ctx {
418#define ICE_TLAN_CTX_BASE_S 7
419 u64 base;
420 u8 port_num;
421 u16 cgd_num;
422 u8 pf_num;
423 u16 vmvf_num;
424 u8 vmvf_type;
425#define ICE_TLAN_CTX_VMVF_TYPE_VF 0
426#define ICE_TLAN_CTX_VMVF_TYPE_VMQ 1
427#define ICE_TLAN_CTX_VMVF_TYPE_PF 2
428 u16 src_vsi;
429 u8 tsyn_ena;
430 u8 alt_vlan;
431 u16 cpuid;
432 u8 wb_mode;
433 u8 tphrd_desc;
434 u8 tphrd;
435 u8 tphwr_desc;
436 u16 cmpq_id;
437 u16 qnum_in_func;
438 u8 itr_notification_mode;
439 u8 adjust_prof_id;
440 u32 qlen;
441 u8 quanta_prof_idx;
442 u8 tso_ena;
443 u16 tso_qnum;
444 u8 legacy_int;
445 u8 drop_ena;
446 u8 cache_prof_idx;
447 u8 pkt_shaper_prof_idx;
448 u8 int_q_state;
449};
450
451
452#define ICE_PTT(PTYPE, OUTER_IP, OUTER_IP_VER, OUTER_FRAG, T, TE, TEF, I, PL)\
453 { PTYPE, \
454 1, \
455 ICE_RX_PTYPE_OUTER_##OUTER_IP, \
456 ICE_RX_PTYPE_OUTER_##OUTER_IP_VER, \
457 ICE_RX_PTYPE_##OUTER_FRAG, \
458 ICE_RX_PTYPE_TUNNEL_##T, \
459 ICE_RX_PTYPE_TUNNEL_END_##TE, \
460 ICE_RX_PTYPE_##TEF, \
461 ICE_RX_PTYPE_INNER_PROT_##I, \
462 ICE_RX_PTYPE_PAYLOAD_LAYER_##PL }
463
464#define ICE_PTT_UNUSED_ENTRY(PTYPE) { PTYPE, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
465
466
467#define ICE_RX_PTYPE_NOF ICE_RX_PTYPE_NOT_FRAG
468
469
470static const struct ice_rx_ptype_decoded ice_ptype_lkup[] = {
471
472 ICE_PTT_UNUSED_ENTRY(0),
473 ICE_PTT(1, L2, NONE, NOF, NONE, NONE, NOF, NONE, PAY2),
474 ICE_PTT(2, L2, NONE, NOF, NONE, NONE, NOF, NONE, NONE),
475};
476
477static inline struct ice_rx_ptype_decoded ice_decode_rx_desc_ptype(u16 ptype)
478{
479 return ice_ptype_lkup[ptype];
480}
481
482#define ICE_LINK_SPEED_UNKNOWN 0
483#define ICE_LINK_SPEED_10MBPS 10
484#define ICE_LINK_SPEED_100MBPS 100
485#define ICE_LINK_SPEED_1000MBPS 1000
486#define ICE_LINK_SPEED_2500MBPS 2500
487#define ICE_LINK_SPEED_5000MBPS 5000
488#define ICE_LINK_SPEED_10000MBPS 10000
489#define ICE_LINK_SPEED_20000MBPS 20000
490#define ICE_LINK_SPEED_25000MBPS 25000
491#define ICE_LINK_SPEED_40000MBPS 40000
492#define ICE_LINK_SPEED_50000MBPS 50000
493#define ICE_LINK_SPEED_100000MBPS 100000
494
495#endif
496