LXR linux/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec

   1/*
   2 * Copyright (c) 2017 Mellanox Technologies. All rights reserved.
   3 *
   4 * This software is available to you under a choice of one of two
   5 * licenses.  You may choose to be licensed under the terms of the GNU
   6 * General Public License (GPL) Version 2, available from the file
   7 * COPYING in the main directory of this source tree, or the
   8 * OpenIB.org BSD license below:
   9 *
  10 *     Redistribution and use in source and binary forms, with or
  11 *     without modification, are permitted provided that the following
  12 *     conditions are met:
  13 *
  14 *      - Redistributions of source code must retain the above
  15 *        copyright notice, this list of conditions and the following
  16 *        disclaimer.
  17 *
  18 *      - Redistributions in binary form must reproduce the above
  19 *        copyright notice, this list of conditions and the following
  20 *        disclaimer in the documentation and/or other materials
  21 *        provided with the distribution.
  22 *
  23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30 * SOFTWARE.
  31 *
  32 */
  33
  34#include <linux/ethtool.h>
  35#include <net/sock.h>
  36
  37#include "en.h"
  38#include "accel/ipsec.h"
  39#include "fpga/sdk.h"
  40#include "en_accel/ipsec.h"
  41
  42static const struct counter_desc mlx5e_ipsec_hw_stats_desc[] = {
  43        { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_dec_in_packets) },
  44        { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_dec_out_packets) },
  45        { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_dec_bypass_packets) },
  46        { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_enc_in_packets) },
  47        { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_enc_out_packets) },
  48        { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_enc_bypass_packets) },
  49        { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_dec_drop_packets) },
  50        { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_dec_auth_fail_packets) },
  51        { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_enc_drop_packets) },
  52        { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_add_sa_success) },
  53        { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_add_sa_fail) },
  54        { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_del_sa_success) },
  55        { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_del_sa_fail) },
  56        { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_stats, ipsec_cmd_drop) },
  57};
  58
  59static const struct counter_desc mlx5e_ipsec_sw_stats_desc[] = {
  60        { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_sw_stats, ipsec_rx_drop_sp_alloc) },
  61        { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_sw_stats, ipsec_rx_drop_sadb_miss) },
  62        { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_sw_stats, ipsec_rx_drop_syndrome) },
  63        { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_sw_stats, ipsec_tx_drop_bundle) },
  64        { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_sw_stats, ipsec_tx_drop_no_state) },
  65        { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_sw_stats, ipsec_tx_drop_not_ip) },
  66        { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_sw_stats, ipsec_tx_drop_trailer) },
  67        { MLX5E_DECLARE_STAT(struct mlx5e_ipsec_sw_stats, ipsec_tx_drop_metadata) },
  68};
  69
  70#define MLX5E_READ_CTR_ATOMIC64(ptr, dsc, i) \
  71        atomic64_read((atomic64_t *)((char *)(ptr) + (dsc)[i].offset))
  72
  73#define NUM_IPSEC_HW_COUNTERS ARRAY_SIZE(mlx5e_ipsec_hw_stats_desc)
  74#define NUM_IPSEC_SW_COUNTERS ARRAY_SIZE(mlx5e_ipsec_sw_stats_desc)
  75
  76#define NUM_IPSEC_COUNTERS (NUM_IPSEC_HW_COUNTERS + NUM_IPSEC_SW_COUNTERS)
  77
  78int mlx5e_ipsec_get_count(struct mlx5e_priv *priv)
  79{
  80        if (!priv->ipsec)
  81                return 0;
  82
  83        return NUM_IPSEC_COUNTERS;
  84}
  85
  86int mlx5e_ipsec_get_strings(struct mlx5e_priv *priv, uint8_t *data)
  87{
  88        unsigned int i, idx = 0;
  89
  90        if (!priv->ipsec)
  91                return 0;
  92
  93        for (i = 0; i < NUM_IPSEC_HW_COUNTERS; i++)
  94                strcpy(data + (idx++) * ETH_GSTRING_LEN,
  95                       mlx5e_ipsec_hw_stats_desc[i].format);
  96
  97        for (i = 0; i < NUM_IPSEC_SW_COUNTERS; i++)
  98                strcpy(data + (idx++) * ETH_GSTRING_LEN,
  99                       mlx5e_ipsec_sw_stats_desc[i].format);
 100
 101        return NUM_IPSEC_COUNTERS;
 102}
 103
 104void mlx5e_ipsec_update_stats(struct mlx5e_priv *priv)
 105{
 106        int ret;
 107
 108        if (!priv->ipsec)
 109                return;
 110
 111        ret = mlx5_accel_ipsec_counters_read(priv->mdev, (u64 *)&priv->ipsec->stats,
 112                                             NUM_IPSEC_HW_COUNTERS);
 113        if (ret)
 114                memset(&priv->ipsec->stats, 0, sizeof(priv->ipsec->stats));
 115}
 116
 117int mlx5e_ipsec_get_stats(struct mlx5e_priv *priv, u64 *data)
 118{
 119        int i, idx = 0;
 120
 121        if (!priv->ipsec)
 122                return 0;
 123
 124        for (i = 0; i < NUM_IPSEC_HW_COUNTERS; i++)
 125                data[idx++] = MLX5E_READ_CTR64_CPU(&priv->ipsec->stats,
 126                                                   mlx5e_ipsec_hw_stats_desc, i);
 127
 128        for (i = 0; i < NUM_IPSEC_SW_COUNTERS; i++)
 129                data[idx++] = MLX5E_READ_CTR_ATOMIC64(&priv->ipsec->sw_stats,
 130                                                      mlx5e_ipsec_sw_stats_desc, i);
 131
 132        return NUM_IPSEC_COUNTERS;
 133}
 134