linux/drivers/net/ethernet/qlogic/qed/qed_mcp.h
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   1/* QLogic qed NIC Driver
   2 * Copyright (c) 2015-2017  QLogic Corporation
   3 *
   4 * This software is available to you under a choice of one of two
   5 * licenses.  You may choose to be licensed under the terms of the GNU
   6 * General Public License (GPL) Version 2, available from the file
   7 * COPYING in the main directory of this source tree, or the
   8 * OpenIB.org BSD license below:
   9 *
  10 *     Redistribution and use in source and binary forms, with or
  11 *     without modification, are permitted provided that the following
  12 *     conditions are met:
  13 *
  14 *      - Redistributions of source code must retain the above
  15 *        copyright notice, this list of conditions and the following
  16 *        disclaimer.
  17 *
  18 *      - Redistributions in binary form must reproduce the above
  19 *        copyright notice, this list of conditions and the following
  20 *        disclaimer in the documentation and /or other materials
  21 *        provided with the distribution.
  22 *
  23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30 * SOFTWARE.
  31 */
  32
  33#ifndef _QED_MCP_H
  34#define _QED_MCP_H
  35
  36#include <linux/types.h>
  37#include <linux/delay.h>
  38#include <linux/slab.h>
  39#include <linux/spinlock.h>
  40#include <linux/qed/qed_fcoe_if.h>
  41#include "qed_hsi.h"
  42#include "qed_dev_api.h"
  43
  44struct qed_mcp_link_speed_params {
  45        bool    autoneg;
  46        u32     advertised_speeds;      /* bitmask of DRV_SPEED_CAPABILITY */
  47        u32     forced_speed;      /* In Mb/s */
  48};
  49
  50struct qed_mcp_link_pause_params {
  51        bool    autoneg;
  52        bool    forced_rx;
  53        bool    forced_tx;
  54};
  55
  56enum qed_mcp_eee_mode {
  57        QED_MCP_EEE_DISABLED,
  58        QED_MCP_EEE_ENABLED,
  59        QED_MCP_EEE_UNSUPPORTED
  60};
  61
  62struct qed_mcp_link_params {
  63        struct qed_mcp_link_speed_params speed;
  64        struct qed_mcp_link_pause_params pause;
  65        u32 loopback_mode;
  66        struct qed_link_eee_params eee;
  67};
  68
  69struct qed_mcp_link_capabilities {
  70        u32 speed_capabilities;
  71        bool default_speed_autoneg;
  72        enum qed_mcp_eee_mode default_eee;
  73        u32 eee_lpi_timer;
  74        u8 eee_speed_caps;
  75};
  76
  77struct qed_mcp_link_state {
  78        bool    link_up;
  79
  80        u32     min_pf_rate;
  81
  82        /* Actual link speed in Mb/s */
  83        u32     line_speed;
  84
  85        /* PF max speed in Mb/s, deduced from line_speed
  86         * according to PF max bandwidth configuration.
  87         */
  88        u32     speed;
  89        bool    full_duplex;
  90
  91        bool    an;
  92        bool    an_complete;
  93        bool    parallel_detection;
  94        bool    pfc_enabled;
  95
  96#define QED_LINK_PARTNER_SPEED_1G_HD    BIT(0)
  97#define QED_LINK_PARTNER_SPEED_1G_FD    BIT(1)
  98#define QED_LINK_PARTNER_SPEED_10G      BIT(2)
  99#define QED_LINK_PARTNER_SPEED_20G      BIT(3)
 100#define QED_LINK_PARTNER_SPEED_25G      BIT(4)
 101#define QED_LINK_PARTNER_SPEED_40G      BIT(5)
 102#define QED_LINK_PARTNER_SPEED_50G      BIT(6)
 103#define QED_LINK_PARTNER_SPEED_100G     BIT(7)
 104        u32     partner_adv_speed;
 105
 106        bool    partner_tx_flow_ctrl_en;
 107        bool    partner_rx_flow_ctrl_en;
 108
 109#define QED_LINK_PARTNER_SYMMETRIC_PAUSE (1)
 110#define QED_LINK_PARTNER_ASYMMETRIC_PAUSE (2)
 111#define QED_LINK_PARTNER_BOTH_PAUSE (3)
 112        u8      partner_adv_pause;
 113
 114        bool    sfp_tx_fault;
 115        bool    eee_active;
 116        u8      eee_adv_caps;
 117        u8      eee_lp_adv_caps;
 118};
 119
 120struct qed_mcp_function_info {
 121        u8                              pause_on_host;
 122
 123        enum qed_pci_personality        protocol;
 124
 125        u8                              bandwidth_min;
 126        u8                              bandwidth_max;
 127
 128        u8                              mac[ETH_ALEN];
 129
 130        u64                             wwn_port;
 131        u64                             wwn_node;
 132
 133#define QED_MCP_VLAN_UNSET              (0xffff)
 134        u16                             ovlan;
 135
 136        u16                             mtu;
 137};
 138
 139struct qed_mcp_nvm_common {
 140        u32     offset;
 141        u32     param;
 142        u32     resp;
 143        u32     cmd;
 144};
 145
 146struct qed_mcp_drv_version {
 147        u32     version;
 148        u8      name[MCP_DRV_VER_STR_SIZE - 4];
 149};
 150
 151struct qed_mcp_lan_stats {
 152        u64 ucast_rx_pkts;
 153        u64 ucast_tx_pkts;
 154        u32 fcs_err;
 155};
 156
 157struct qed_mcp_fcoe_stats {
 158        u64 rx_pkts;
 159        u64 tx_pkts;
 160        u32 fcs_err;
 161        u32 login_failure;
 162};
 163
 164struct qed_mcp_iscsi_stats {
 165        u64 rx_pdus;
 166        u64 tx_pdus;
 167        u64 rx_bytes;
 168        u64 tx_bytes;
 169};
 170
 171struct qed_mcp_rdma_stats {
 172        u64 rx_pkts;
 173        u64 tx_pkts;
 174        u64 rx_bytes;
 175        u64 tx_byts;
 176};
 177
 178enum qed_mcp_protocol_type {
 179        QED_MCP_LAN_STATS,
 180        QED_MCP_FCOE_STATS,
 181        QED_MCP_ISCSI_STATS,
 182        QED_MCP_RDMA_STATS
 183};
 184
 185union qed_mcp_protocol_stats {
 186        struct qed_mcp_lan_stats lan_stats;
 187        struct qed_mcp_fcoe_stats fcoe_stats;
 188        struct qed_mcp_iscsi_stats iscsi_stats;
 189        struct qed_mcp_rdma_stats rdma_stats;
 190};
 191
 192enum qed_ov_eswitch {
 193        QED_OV_ESWITCH_NONE,
 194        QED_OV_ESWITCH_VEB,
 195        QED_OV_ESWITCH_VEPA
 196};
 197
 198enum qed_ov_client {
 199        QED_OV_CLIENT_DRV,
 200        QED_OV_CLIENT_USER,
 201        QED_OV_CLIENT_VENDOR_SPEC
 202};
 203
 204enum qed_ov_driver_state {
 205        QED_OV_DRIVER_STATE_NOT_LOADED,
 206        QED_OV_DRIVER_STATE_DISABLED,
 207        QED_OV_DRIVER_STATE_ACTIVE
 208};
 209
 210enum qed_ov_wol {
 211        QED_OV_WOL_DEFAULT,
 212        QED_OV_WOL_DISABLED,
 213        QED_OV_WOL_ENABLED
 214};
 215
 216enum qed_mfw_tlv_type {
 217        QED_MFW_TLV_GENERIC = 0x1,      /* Core driver TLVs */
 218        QED_MFW_TLV_ETH = 0x2,          /* L2 driver TLVs */
 219        QED_MFW_TLV_FCOE = 0x4,         /* FCoE protocol TLVs */
 220        QED_MFW_TLV_ISCSI = 0x8,        /* SCSI protocol TLVs */
 221        QED_MFW_TLV_MAX = 0x16,
 222};
 223
 224struct qed_mfw_tlv_generic {
 225#define QED_MFW_TLV_FLAGS_SIZE  2
 226        struct {
 227                u8 ipv4_csum_offload;
 228                u8 lso_supported;
 229                bool b_set;
 230        } flags;
 231
 232#define QED_MFW_TLV_MAC_COUNT 3
 233        /* First entry for primary MAC, 2 secondary MACs possible */
 234        u8 mac[QED_MFW_TLV_MAC_COUNT][6];
 235        bool mac_set[QED_MFW_TLV_MAC_COUNT];
 236
 237        u64 rx_frames;
 238        bool rx_frames_set;
 239        u64 rx_bytes;
 240        bool rx_bytes_set;
 241        u64 tx_frames;
 242        bool tx_frames_set;
 243        u64 tx_bytes;
 244        bool tx_bytes_set;
 245};
 246
 247union qed_mfw_tlv_data {
 248        struct qed_mfw_tlv_generic generic;
 249        struct qed_mfw_tlv_eth eth;
 250        struct qed_mfw_tlv_fcoe fcoe;
 251        struct qed_mfw_tlv_iscsi iscsi;
 252};
 253
 254/**
 255 * @brief - returns the link params of the hw function
 256 *
 257 * @param p_hwfn
 258 *
 259 * @returns pointer to link params
 260 */
 261struct qed_mcp_link_params *qed_mcp_get_link_params(struct qed_hwfn *);
 262
 263/**
 264 * @brief - return the link state of the hw function
 265 *
 266 * @param p_hwfn
 267 *
 268 * @returns pointer to link state
 269 */
 270struct qed_mcp_link_state *qed_mcp_get_link_state(struct qed_hwfn *);
 271
 272/**
 273 * @brief - return the link capabilities of the hw function
 274 *
 275 * @param p_hwfn
 276 *
 277 * @returns pointer to link capabilities
 278 */
 279struct qed_mcp_link_capabilities
 280        *qed_mcp_get_link_capabilities(struct qed_hwfn *p_hwfn);
 281
 282/**
 283 * @brief Request the MFW to set the the link according to 'link_input'.
 284 *
 285 * @param p_hwfn
 286 * @param p_ptt
 287 * @param b_up - raise link if `true'. Reset link if `false'.
 288 *
 289 * @return int
 290 */
 291int qed_mcp_set_link(struct qed_hwfn   *p_hwfn,
 292                     struct qed_ptt     *p_ptt,
 293                     bool               b_up);
 294
 295/**
 296 * @brief Get the management firmware version value
 297 *
 298 * @param p_hwfn
 299 * @param p_ptt
 300 * @param p_mfw_ver    - mfw version value
 301 * @param p_running_bundle_id   - image id in nvram; Optional.
 302 *
 303 * @return int - 0 - operation was successful.
 304 */
 305int qed_mcp_get_mfw_ver(struct qed_hwfn *p_hwfn,
 306                        struct qed_ptt *p_ptt,
 307                        u32 *p_mfw_ver, u32 *p_running_bundle_id);
 308
 309/**
 310 * @brief Get the MBI version value
 311 *
 312 * @param p_hwfn
 313 * @param p_ptt
 314 * @param p_mbi_ver - A pointer to a variable to be filled with the MBI version.
 315 *
 316 * @return int - 0 - operation was successful.
 317 */
 318int qed_mcp_get_mbi_ver(struct qed_hwfn *p_hwfn,
 319                        struct qed_ptt *p_ptt, u32 *p_mbi_ver);
 320
 321/**
 322 * @brief Get media type value of the port.
 323 *
 324 * @param cdev      - qed dev pointer
 325 * @param p_ptt
 326 * @param mfw_ver    - media type value
 327 *
 328 * @return int -
 329 *      0 - Operation was successul.
 330 *      -EBUSY - Operation failed
 331 */
 332int qed_mcp_get_media_type(struct qed_hwfn *p_hwfn,
 333                           struct qed_ptt *p_ptt, u32 *media_type);
 334
 335/**
 336 * @brief Get transceiver data of the port.
 337 *
 338 * @param cdev      - qed dev pointer
 339 * @param p_ptt
 340 * @param p_transceiver_state - transceiver state.
 341 * @param p_transceiver_type - media type value
 342 *
 343 * @return int -
 344 *      0 - Operation was successful.
 345 *      -EBUSY - Operation failed
 346 */
 347int qed_mcp_get_transceiver_data(struct qed_hwfn *p_hwfn,
 348                                 struct qed_ptt *p_ptt,
 349                                 u32 *p_transceiver_state,
 350                                 u32 *p_tranceiver_type);
 351
 352/**
 353 * @brief Get transceiver supported speed mask.
 354 *
 355 * @param cdev      - qed dev pointer
 356 * @param p_ptt
 357 * @param p_speed_mask - Bit mask of all supported speeds.
 358 *
 359 * @return int -
 360 *      0 - Operation was successful.
 361 *      -EBUSY - Operation failed
 362 */
 363
 364int qed_mcp_trans_speed_mask(struct qed_hwfn *p_hwfn,
 365                             struct qed_ptt *p_ptt, u32 *p_speed_mask);
 366
 367/**
 368 * @brief Get board configuration.
 369 *
 370 * @param cdev      - qed dev pointer
 371 * @param p_ptt
 372 * @param p_board_config - Board config.
 373 *
 374 * @return int -
 375 *      0 - Operation was successful.
 376 *      -EBUSY - Operation failed
 377 */
 378int qed_mcp_get_board_config(struct qed_hwfn *p_hwfn,
 379                             struct qed_ptt *p_ptt, u32 *p_board_config);
 380
 381/**
 382 * @brief General function for sending commands to the MCP
 383 *        mailbox. It acquire mutex lock for the entire
 384 *        operation, from sending the request until the MCP
 385 *        response. Waiting for MCP response will be checked up
 386 *        to 5 seconds every 5ms.
 387 *
 388 * @param p_hwfn     - hw function
 389 * @param p_ptt      - PTT required for register access
 390 * @param cmd        - command to be sent to the MCP.
 391 * @param param      - Optional param
 392 * @param o_mcp_resp - The MCP response code (exclude sequence).
 393 * @param o_mcp_param- Optional parameter provided by the MCP
 394 *                     response
 395 * @return int - 0 - operation
 396 * was successul.
 397 */
 398int qed_mcp_cmd(struct qed_hwfn *p_hwfn,
 399                struct qed_ptt *p_ptt,
 400                u32 cmd,
 401                u32 param,
 402                u32 *o_mcp_resp,
 403                u32 *o_mcp_param);
 404
 405/**
 406 * @brief - drains the nig, allowing completion to pass in case of pauses.
 407 *          (Should be called only from sleepable context)
 408 *
 409 * @param p_hwfn
 410 * @param p_ptt
 411 */
 412int qed_mcp_drain(struct qed_hwfn *p_hwfn,
 413                  struct qed_ptt *p_ptt);
 414
 415/**
 416 * @brief Get the flash size value
 417 *
 418 * @param p_hwfn
 419 * @param p_ptt
 420 * @param p_flash_size  - flash size in bytes to be filled.
 421 *
 422 * @return int - 0 - operation was successul.
 423 */
 424int qed_mcp_get_flash_size(struct qed_hwfn     *p_hwfn,
 425                           struct qed_ptt       *p_ptt,
 426                           u32 *p_flash_size);
 427
 428/**
 429 * @brief Send driver version to MFW
 430 *
 431 * @param p_hwfn
 432 * @param p_ptt
 433 * @param version - Version value
 434 * @param name - Protocol driver name
 435 *
 436 * @return int - 0 - operation was successul.
 437 */
 438int
 439qed_mcp_send_drv_version(struct qed_hwfn *p_hwfn,
 440                         struct qed_ptt *p_ptt,
 441                         struct qed_mcp_drv_version *p_ver);
 442
 443/**
 444 * @brief Read the MFW process kill counter
 445 *
 446 * @param p_hwfn
 447 * @param p_ptt
 448 *
 449 * @return u32
 450 */
 451u32 qed_get_process_kill_counter(struct qed_hwfn *p_hwfn,
 452                                 struct qed_ptt *p_ptt);
 453
 454/**
 455 * @brief Trigger a recovery process
 456 *
 457 *  @param p_hwfn
 458 *  @param p_ptt
 459 *
 460 * @return int
 461 */
 462int qed_start_recovery_process(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
 463
 464/**
 465 * @brief A recovery handler must call this function as its first step.
 466 *        It is assumed that the handler is not run from an interrupt context.
 467 *
 468 *  @param cdev
 469 *  @param p_ptt
 470 *
 471 * @return int
 472 */
 473int qed_recovery_prolog(struct qed_dev *cdev);
 474
 475/**
 476 * @brief Notify MFW about the change in base device properties
 477 *
 478 *  @param p_hwfn
 479 *  @param p_ptt
 480 *  @param client - qed client type
 481 *
 482 * @return int - 0 - operation was successful.
 483 */
 484int qed_mcp_ov_update_current_config(struct qed_hwfn *p_hwfn,
 485                                     struct qed_ptt *p_ptt,
 486                                     enum qed_ov_client client);
 487
 488/**
 489 * @brief Notify MFW about the driver state
 490 *
 491 *  @param p_hwfn
 492 *  @param p_ptt
 493 *  @param drv_state - Driver state
 494 *
 495 * @return int - 0 - operation was successful.
 496 */
 497int qed_mcp_ov_update_driver_state(struct qed_hwfn *p_hwfn,
 498                                   struct qed_ptt *p_ptt,
 499                                   enum qed_ov_driver_state drv_state);
 500
 501/**
 502 * @brief Send MTU size to MFW
 503 *
 504 *  @param p_hwfn
 505 *  @param p_ptt
 506 *  @param mtu - MTU size
 507 *
 508 * @return int - 0 - operation was successful.
 509 */
 510int qed_mcp_ov_update_mtu(struct qed_hwfn *p_hwfn,
 511                          struct qed_ptt *p_ptt, u16 mtu);
 512
 513/**
 514 * @brief Send MAC address to MFW
 515 *
 516 *  @param p_hwfn
 517 *  @param p_ptt
 518 *  @param mac - MAC address
 519 *
 520 * @return int - 0 - operation was successful.
 521 */
 522int qed_mcp_ov_update_mac(struct qed_hwfn *p_hwfn,
 523                          struct qed_ptt *p_ptt, u8 *mac);
 524
 525/**
 526 * @brief Send WOL mode to MFW
 527 *
 528 *  @param p_hwfn
 529 *  @param p_ptt
 530 *  @param wol - WOL mode
 531 *
 532 * @return int - 0 - operation was successful.
 533 */
 534int qed_mcp_ov_update_wol(struct qed_hwfn *p_hwfn,
 535                          struct qed_ptt *p_ptt,
 536                          enum qed_ov_wol wol);
 537
 538/**
 539 * @brief Set LED status
 540 *
 541 *  @param p_hwfn
 542 *  @param p_ptt
 543 *  @param mode - LED mode
 544 *
 545 * @return int - 0 - operation was successful.
 546 */
 547int qed_mcp_set_led(struct qed_hwfn *p_hwfn,
 548                    struct qed_ptt *p_ptt,
 549                    enum qed_led_mode mode);
 550
 551/**
 552 * @brief Read from nvm
 553 *
 554 *  @param cdev
 555 *  @param addr - nvm offset
 556 *  @param p_buf - nvm read buffer
 557 *  @param len - buffer len
 558 *
 559 * @return int - 0 - operation was successful.
 560 */
 561int qed_mcp_nvm_read(struct qed_dev *cdev, u32 addr, u8 *p_buf, u32 len);
 562
 563/**
 564 * @brief Write to nvm
 565 *
 566 *  @param cdev
 567 *  @param addr - nvm offset
 568 *  @param cmd - nvm command
 569 *  @param p_buf - nvm write buffer
 570 *  @param len - buffer len
 571 *
 572 * @return int - 0 - operation was successful.
 573 */
 574int qed_mcp_nvm_write(struct qed_dev *cdev,
 575                      u32 cmd, u32 addr, u8 *p_buf, u32 len);
 576
 577/**
 578 * @brief Check latest response
 579 *
 580 *  @param cdev
 581 *  @param p_buf - nvm write buffer
 582 *
 583 * @return int - 0 - operation was successful.
 584 */
 585int qed_mcp_nvm_resp(struct qed_dev *cdev, u8 *p_buf);
 586
 587struct qed_nvm_image_att {
 588        u32 start_addr;
 589        u32 length;
 590};
 591
 592/**
 593 * @brief Allows reading a whole nvram image
 594 *
 595 * @param p_hwfn
 596 * @param image_id - image to get attributes for
 597 * @param p_image_att - image attributes structure into which to fill data
 598 *
 599 * @return int - 0 - operation was successful.
 600 */
 601int
 602qed_mcp_get_nvm_image_att(struct qed_hwfn *p_hwfn,
 603                          enum qed_nvm_images image_id,
 604                          struct qed_nvm_image_att *p_image_att);
 605
 606/**
 607 * @brief Allows reading a whole nvram image
 608 *
 609 * @param p_hwfn
 610 * @param image_id - image requested for reading
 611 * @param p_buffer - allocated buffer into which to fill data
 612 * @param buffer_len - length of the allocated buffer.
 613 *
 614 * @return 0 iff p_buffer now contains the nvram image.
 615 */
 616int qed_mcp_get_nvm_image(struct qed_hwfn *p_hwfn,
 617                          enum qed_nvm_images image_id,
 618                          u8 *p_buffer, u32 buffer_len);
 619
 620/**
 621 * @brief Bist register test
 622 *
 623 *  @param p_hwfn    - hw function
 624 *  @param p_ptt     - PTT required for register access
 625 *
 626 * @return int - 0 - operation was successful.
 627 */
 628int qed_mcp_bist_register_test(struct qed_hwfn *p_hwfn,
 629                               struct qed_ptt *p_ptt);
 630
 631/**
 632 * @brief Bist clock test
 633 *
 634 *  @param p_hwfn    - hw function
 635 *  @param p_ptt     - PTT required for register access
 636 *
 637 * @return int - 0 - operation was successful.
 638 */
 639int qed_mcp_bist_clock_test(struct qed_hwfn *p_hwfn,
 640                            struct qed_ptt *p_ptt);
 641
 642/**
 643 * @brief Bist nvm test - get number of images
 644 *
 645 *  @param p_hwfn       - hw function
 646 *  @param p_ptt        - PTT required for register access
 647 *  @param num_images   - number of images if operation was
 648 *                        successful. 0 if not.
 649 *
 650 * @return int - 0 - operation was successful.
 651 */
 652int qed_mcp_bist_nvm_get_num_images(struct qed_hwfn *p_hwfn,
 653                                    struct qed_ptt *p_ptt,
 654                                    u32 *num_images);
 655
 656/**
 657 * @brief Bist nvm test - get image attributes by index
 658 *
 659 *  @param p_hwfn      - hw function
 660 *  @param p_ptt       - PTT required for register access
 661 *  @param p_image_att - Attributes of image
 662 *  @param image_index - Index of image to get information for
 663 *
 664 * @return int - 0 - operation was successful.
 665 */
 666int qed_mcp_bist_nvm_get_image_att(struct qed_hwfn *p_hwfn,
 667                                   struct qed_ptt *p_ptt,
 668                                   struct bist_nvm_image_att *p_image_att,
 669                                   u32 image_index);
 670
 671/**
 672 * @brief - Processes the TLV request from MFW i.e., get the required TLV info
 673 *          from the qed client and send it to the MFW.
 674 *
 675 * @param p_hwfn
 676 * @param p_ptt
 677 *
 678 * @param return 0 upon success.
 679 */
 680int qed_mfw_process_tlv_req(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
 681
 682/* Using hwfn number (and not pf_num) is required since in CMT mode,
 683 * same pf_num may be used by two different hwfn
 684 * TODO - this shouldn't really be in .h file, but until all fields
 685 * required during hw-init will be placed in their correct place in shmem
 686 * we need it in qed_dev.c [for readin the nvram reflection in shmem].
 687 */
 688#define MCP_PF_ID_BY_REL(p_hwfn, rel_pfid) (QED_IS_BB((p_hwfn)->cdev) ?        \
 689                                            ((rel_pfid) |                      \
 690                                             ((p_hwfn)->abs_pf_id & 1) << 3) : \
 691                                            rel_pfid)
 692#define MCP_PF_ID(p_hwfn) MCP_PF_ID_BY_REL(p_hwfn, (p_hwfn)->rel_pf_id)
 693
 694struct qed_mcp_info {
 695        /* List for mailbox commands which were sent and wait for a response */
 696        struct list_head                        cmd_list;
 697
 698        /* Spinlock used for protecting the access to the mailbox commands list
 699         * and the sending of the commands.
 700         */
 701        spinlock_t                              cmd_lock;
 702
 703        /* Flag to indicate whether sending a MFW mailbox command is blocked */
 704        bool                                    b_block_cmd;
 705
 706        /* Spinlock used for syncing SW link-changes and link-changes
 707         * originating from attention context.
 708         */
 709        spinlock_t                              link_lock;
 710
 711        u32                                     public_base;
 712        u32                                     drv_mb_addr;
 713        u32                                     mfw_mb_addr;
 714        u32                                     port_addr;
 715        u16                                     drv_mb_seq;
 716        u16                                     drv_pulse_seq;
 717        struct qed_mcp_link_params              link_input;
 718        struct qed_mcp_link_state               link_output;
 719        struct qed_mcp_link_capabilities        link_capabilities;
 720        struct qed_mcp_function_info            func_info;
 721        u8                                      *mfw_mb_cur;
 722        u8                                      *mfw_mb_shadow;
 723        u16                                     mfw_mb_length;
 724        u32                                     mcp_hist;
 725
 726        /* Capabilties negotiated with the MFW */
 727        u32                                     capabilities;
 728};
 729
 730struct qed_mcp_mb_params {
 731        u32 cmd;
 732        u32 param;
 733        void *p_data_src;
 734        void *p_data_dst;
 735        u8 data_src_size;
 736        u8 data_dst_size;
 737        u32 mcp_resp;
 738        u32 mcp_param;
 739        u32 flags;
 740#define QED_MB_FLAG_CAN_SLEEP   (0x1 << 0)
 741#define QED_MB_FLAG_AVOID_BLOCK (0x1 << 1)
 742#define QED_MB_FLAGS_IS_SET(params, flag) \
 743        ({ typeof(params) __params = (params); \
 744           (__params && (__params->flags & QED_MB_FLAG_ ## flag)); })
 745};
 746
 747struct qed_drv_tlv_hdr {
 748        u8 tlv_type;
 749        u8 tlv_length;  /* In dwords - not including this header */
 750        u8 tlv_reserved;
 751#define QED_DRV_TLV_FLAGS_CHANGED 0x01
 752        u8 tlv_flags;
 753};
 754
 755/**
 756 * @brief Initialize the interface with the MCP
 757 *
 758 * @param p_hwfn - HW func
 759 * @param p_ptt - PTT required for register access
 760 *
 761 * @return int
 762 */
 763int qed_mcp_cmd_init(struct qed_hwfn *p_hwfn,
 764                     struct qed_ptt *p_ptt);
 765
 766/**
 767 * @brief Initialize the port interface with the MCP
 768 *
 769 * @param p_hwfn
 770 * @param p_ptt
 771 * Can only be called after `num_ports_in_engines' is set
 772 */
 773void qed_mcp_cmd_port_init(struct qed_hwfn *p_hwfn,
 774                           struct qed_ptt *p_ptt);
 775/**
 776 * @brief Releases resources allocated during the init process.
 777 *
 778 * @param p_hwfn - HW func
 779 * @param p_ptt - PTT required for register access
 780 *
 781 * @return int
 782 */
 783
 784int qed_mcp_free(struct qed_hwfn *p_hwfn);
 785
 786/**
 787 * @brief This function is called from the DPC context. After
 788 * pointing PTT to the mfw mb, check for events sent by the MCP
 789 * to the driver and ack them. In case a critical event
 790 * detected, it will be handled here, otherwise the work will be
 791 * queued to a sleepable work-queue.
 792 *
 793 * @param p_hwfn - HW function
 794 * @param p_ptt - PTT required for register access
 795 * @return int - 0 - operation
 796 * was successul.
 797 */
 798int qed_mcp_handle_events(struct qed_hwfn *p_hwfn,
 799                          struct qed_ptt *p_ptt);
 800
 801enum qed_drv_role {
 802        QED_DRV_ROLE_OS,
 803        QED_DRV_ROLE_KDUMP,
 804};
 805
 806struct qed_load_req_params {
 807        /* Input params */
 808        enum qed_drv_role drv_role;
 809        u8 timeout_val;
 810        bool avoid_eng_reset;
 811        enum qed_override_force_load override_force_load;
 812
 813        /* Output params */
 814        u32 load_code;
 815};
 816
 817/**
 818 * @brief Sends a LOAD_REQ to the MFW, and in case the operation succeeds,
 819 *        returns whether this PF is the first on the engine/port or function.
 820 *
 821 * @param p_hwfn
 822 * @param p_ptt
 823 * @param p_params
 824 *
 825 * @return int - 0 - Operation was successful.
 826 */
 827int qed_mcp_load_req(struct qed_hwfn *p_hwfn,
 828                     struct qed_ptt *p_ptt,
 829                     struct qed_load_req_params *p_params);
 830
 831/**
 832 * @brief Sends a LOAD_DONE message to the MFW
 833 *
 834 * @param p_hwfn
 835 * @param p_ptt
 836 *
 837 * @return int - 0 - Operation was successful.
 838 */
 839int qed_mcp_load_done(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
 840
 841/**
 842 * @brief Sends a UNLOAD_REQ message to the MFW
 843 *
 844 * @param p_hwfn
 845 * @param p_ptt
 846 *
 847 * @return int - 0 - Operation was successful.
 848 */
 849int qed_mcp_unload_req(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
 850
 851/**
 852 * @brief Sends a UNLOAD_DONE message to the MFW
 853 *
 854 * @param p_hwfn
 855 * @param p_ptt
 856 *
 857 * @return int - 0 - Operation was successful.
 858 */
 859int qed_mcp_unload_done(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
 860
 861/**
 862 * @brief Read the MFW mailbox into Current buffer.
 863 *
 864 * @param p_hwfn
 865 * @param p_ptt
 866 */
 867void qed_mcp_read_mb(struct qed_hwfn *p_hwfn,
 868                     struct qed_ptt *p_ptt);
 869
 870/**
 871 * @brief Ack to mfw that driver finished FLR process for VFs
 872 *
 873 * @param p_hwfn
 874 * @param p_ptt
 875 * @param vfs_to_ack - bit mask of all engine VFs for which the PF acks.
 876 *
 877 * @param return int - 0 upon success.
 878 */
 879int qed_mcp_ack_vf_flr(struct qed_hwfn *p_hwfn,
 880                       struct qed_ptt *p_ptt, u32 *vfs_to_ack);
 881
 882/**
 883 * @brief - calls during init to read shmem of all function-related info.
 884 *
 885 * @param p_hwfn
 886 *
 887 * @param return 0 upon success.
 888 */
 889int qed_mcp_fill_shmem_func_info(struct qed_hwfn *p_hwfn,
 890                                 struct qed_ptt *p_ptt);
 891
 892/**
 893 * @brief - Reset the MCP using mailbox command.
 894 *
 895 * @param p_hwfn
 896 * @param p_ptt
 897 *
 898 * @param return 0 upon success.
 899 */
 900int qed_mcp_reset(struct qed_hwfn *p_hwfn,
 901                  struct qed_ptt *p_ptt);
 902
 903/**
 904 * @brief - Sends an NVM read command request to the MFW to get
 905 *        a buffer.
 906 *
 907 * @param p_hwfn
 908 * @param p_ptt
 909 * @param cmd - Command: DRV_MSG_CODE_NVM_GET_FILE_DATA or
 910 *            DRV_MSG_CODE_NVM_READ_NVRAM commands
 911 * @param param - [0:23] - Offset [24:31] - Size
 912 * @param o_mcp_resp - MCP response
 913 * @param o_mcp_param - MCP response param
 914 * @param o_txn_size -  Buffer size output
 915 * @param o_buf - Pointer to the buffer returned by the MFW.
 916 *
 917 * @param return 0 upon success.
 918 */
 919int qed_mcp_nvm_rd_cmd(struct qed_hwfn *p_hwfn,
 920                       struct qed_ptt *p_ptt,
 921                       u32 cmd,
 922                       u32 param,
 923                       u32 *o_mcp_resp,
 924                       u32 *o_mcp_param, u32 *o_txn_size, u32 *o_buf);
 925
 926/**
 927 * @brief Read from sfp
 928 *
 929 *  @param p_hwfn - hw function
 930 *  @param p_ptt  - PTT required for register access
 931 *  @param port   - transceiver port
 932 *  @param addr   - I2C address
 933 *  @param offset - offset in sfp
 934 *  @param len    - buffer length
 935 *  @param p_buf  - buffer to read into
 936 *
 937 * @return int - 0 - operation was successful.
 938 */
 939int qed_mcp_phy_sfp_read(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
 940                         u32 port, u32 addr, u32 offset, u32 len, u8 *p_buf);
 941
 942/**
 943 * @brief indicates whether the MFW objects [under mcp_info] are accessible
 944 *
 945 * @param p_hwfn
 946 *
 947 * @return true iff MFW is running and mcp_info is initialized
 948 */
 949bool qed_mcp_is_init(struct qed_hwfn *p_hwfn);
 950
 951/**
 952 * @brief request MFW to configure MSI-X for a VF
 953 *
 954 * @param p_hwfn
 955 * @param p_ptt
 956 * @param vf_id - absolute inside engine
 957 * @param num_sbs - number of entries to request
 958 *
 959 * @return int
 960 */
 961int qed_mcp_config_vf_msix(struct qed_hwfn *p_hwfn,
 962                           struct qed_ptt *p_ptt, u8 vf_id, u8 num);
 963
 964/**
 965 * @brief - Halt the MCP.
 966 *
 967 * @param p_hwfn
 968 * @param p_ptt
 969 *
 970 * @param return 0 upon success.
 971 */
 972int qed_mcp_halt(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
 973
 974/**
 975 * @brief - Wake up the MCP.
 976 *
 977 * @param p_hwfn
 978 * @param p_ptt
 979 *
 980 * @param return 0 upon success.
 981 */
 982int qed_mcp_resume(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
 983
 984int qed_configure_pf_min_bandwidth(struct qed_dev *cdev, u8 min_bw);
 985int qed_configure_pf_max_bandwidth(struct qed_dev *cdev, u8 max_bw);
 986int __qed_configure_pf_max_bandwidth(struct qed_hwfn *p_hwfn,
 987                                     struct qed_ptt *p_ptt,
 988                                     struct qed_mcp_link_state *p_link,
 989                                     u8 max_bw);
 990int __qed_configure_pf_min_bandwidth(struct qed_hwfn *p_hwfn,
 991                                     struct qed_ptt *p_ptt,
 992                                     struct qed_mcp_link_state *p_link,
 993                                     u8 min_bw);
 994
 995int qed_mcp_mask_parities(struct qed_hwfn *p_hwfn,
 996                          struct qed_ptt *p_ptt, u32 mask_parities);
 997
 998/**
 999 * @brief - Sets the MFW's max value for the given resource
1000 *
1001 *  @param p_hwfn
1002 *  @param p_ptt
1003 *  @param res_id
1004 *  @param resc_max_val
1005 *  @param p_mcp_resp
1006 *
1007 * @return int - 0 - operation was successful.
1008 */
1009int
1010qed_mcp_set_resc_max_val(struct qed_hwfn *p_hwfn,
1011                         struct qed_ptt *p_ptt,
1012                         enum qed_resources res_id,
1013                         u32 resc_max_val, u32 *p_mcp_resp);
1014
1015/**
1016 * @brief - Gets the MFW allocation info for the given resource
1017 *
1018 *  @param p_hwfn
1019 *  @param p_ptt
1020 *  @param res_id
1021 *  @param p_mcp_resp
1022 *  @param p_resc_num
1023 *  @param p_resc_start
1024 *
1025 * @return int - 0 - operation was successful.
1026 */
1027int
1028qed_mcp_get_resc_info(struct qed_hwfn *p_hwfn,
1029                      struct qed_ptt *p_ptt,
1030                      enum qed_resources res_id,
1031                      u32 *p_mcp_resp, u32 *p_resc_num, u32 *p_resc_start);
1032
1033/**
1034 * @brief Send eswitch mode to MFW
1035 *
1036 *  @param p_hwfn
1037 *  @param p_ptt
1038 *  @param eswitch - eswitch mode
1039 *
1040 * @return int - 0 - operation was successful.
1041 */
1042int qed_mcp_ov_update_eswitch(struct qed_hwfn *p_hwfn,
1043                              struct qed_ptt *p_ptt,
1044                              enum qed_ov_eswitch eswitch);
1045
1046#define QED_MCP_RESC_LOCK_MIN_VAL       RESOURCE_DUMP
1047#define QED_MCP_RESC_LOCK_MAX_VAL       31
1048
1049enum qed_resc_lock {
1050        QED_RESC_LOCK_DBG_DUMP = QED_MCP_RESC_LOCK_MIN_VAL,
1051        QED_RESC_LOCK_PTP_PORT0,
1052        QED_RESC_LOCK_PTP_PORT1,
1053        QED_RESC_LOCK_PTP_PORT2,
1054        QED_RESC_LOCK_PTP_PORT3,
1055        QED_RESC_LOCK_RESC_ALLOC = QED_MCP_RESC_LOCK_MAX_VAL,
1056        QED_RESC_LOCK_RESC_INVALID
1057};
1058
1059/**
1060 * @brief - Initiates PF FLR
1061 *
1062 *  @param p_hwfn
1063 *  @param p_ptt
1064 *
1065 * @return int - 0 - operation was successful.
1066 */
1067int qed_mcp_initiate_pf_flr(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
1068struct qed_resc_lock_params {
1069        /* Resource number [valid values are 0..31] */
1070        u8 resource;
1071
1072        /* Lock timeout value in seconds [default, none or 1..254] */
1073        u8 timeout;
1074#define QED_MCP_RESC_LOCK_TO_DEFAULT    0
1075#define QED_MCP_RESC_LOCK_TO_NONE       255
1076
1077        /* Number of times to retry locking */
1078        u8 retry_num;
1079#define QED_MCP_RESC_LOCK_RETRY_CNT_DFLT        10
1080
1081        /* The interval in usec between retries */
1082        u16 retry_interval;
1083#define QED_MCP_RESC_LOCK_RETRY_VAL_DFLT        10000
1084
1085        /* Use sleep or delay between retries */
1086        bool sleep_b4_retry;
1087
1088        /* Will be set as true if the resource is free and granted */
1089        bool b_granted;
1090
1091        /* Will be filled with the resource owner.
1092         * [0..15 = PF0-15, 16 = MFW]
1093         */
1094        u8 owner;
1095};
1096
1097/**
1098 * @brief Acquires MFW generic resource lock
1099 *
1100 *  @param p_hwfn
1101 *  @param p_ptt
1102 *  @param p_params
1103 *
1104 * @return int - 0 - operation was successful.
1105 */
1106int
1107qed_mcp_resc_lock(struct qed_hwfn *p_hwfn,
1108                  struct qed_ptt *p_ptt, struct qed_resc_lock_params *p_params);
1109
1110struct qed_resc_unlock_params {
1111        /* Resource number [valid values are 0..31] */
1112        u8 resource;
1113
1114        /* Allow to release a resource even if belongs to another PF */
1115        bool b_force;
1116
1117        /* Will be set as true if the resource is released */
1118        bool b_released;
1119};
1120
1121/**
1122 * @brief Releases MFW generic resource lock
1123 *
1124 *  @param p_hwfn
1125 *  @param p_ptt
1126 *  @param p_params
1127 *
1128 * @return int - 0 - operation was successful.
1129 */
1130int
1131qed_mcp_resc_unlock(struct qed_hwfn *p_hwfn,
1132                    struct qed_ptt *p_ptt,
1133                    struct qed_resc_unlock_params *p_params);
1134
1135/**
1136 * @brief - default initialization for lock/unlock resource structs
1137 *
1138 * @param p_lock - lock params struct to be initialized; Can be NULL
1139 * @param p_unlock - unlock params struct to be initialized; Can be NULL
1140 * @param resource - the requested resource
1141 * @paral b_is_permanent - disable retries & aging when set
1142 */
1143void qed_mcp_resc_lock_default_init(struct qed_resc_lock_params *p_lock,
1144                                    struct qed_resc_unlock_params *p_unlock,
1145                                    enum qed_resc_lock
1146                                    resource, bool b_is_permanent);
1147
1148/**
1149 * @brief - Return whether management firmware support smart AN
1150 *
1151 * @param p_hwfn
1152 *
1153 * @return bool - true if feature is supported.
1154 */
1155bool qed_mcp_is_smart_an_supported(struct qed_hwfn *p_hwfn);
1156
1157/**
1158 * @brief Learn of supported MFW features; To be done during early init
1159 *
1160 * @param p_hwfn
1161 * @param p_ptt
1162 */
1163int qed_mcp_get_capabilities(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
1164
1165/**
1166 * @brief Inform MFW of set of features supported by driver. Should be done
1167 * inside the content of the LOAD_REQ.
1168 *
1169 * @param p_hwfn
1170 * @param p_ptt
1171 */
1172int qed_mcp_set_capabilities(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
1173
1174/**
1175 * @brief Read ufp config from the shared memory.
1176 *
1177 * @param p_hwfn
1178 * @param p_ptt
1179 */
1180void qed_mcp_read_ufp_config(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
1181
1182/**
1183 * @brief Populate the nvm info shadow in the given hardware function
1184 *
1185 * @param p_hwfn
1186 */
1187int qed_mcp_nvm_info_populate(struct qed_hwfn *p_hwfn);
1188
1189/**
1190 * @brief Get the engine affinity configuration.
1191 *
1192 * @param p_hwfn
1193 * @param p_ptt
1194 */
1195int qed_mcp_get_engine_config(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
1196
1197/**
1198 * @brief Get the PPFID bitmap.
1199 *
1200 * @param p_hwfn
1201 * @param p_ptt
1202 */
1203int qed_mcp_get_ppfid_bitmap(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
1204
1205#endif
1206