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6#include <linux/delay.h>
7#include <linux/io.h>
8#include <linux/kernel.h>
9#include <linux/module.h>
10#include <linux/of.h>
11#include <linux/of_platform.h>
12#include <linux/of_mdio.h>
13#include <linux/phy.h>
14#include <linux/platform_device.h>
15#include <linux/sched.h>
16
17#define IPROC_GPHY_MDCDIV 0x1a
18
19#define MII_CTRL_OFFSET 0x000
20
21#define MII_CTRL_DIV_SHIFT 0
22#define MII_CTRL_PRE_SHIFT 7
23#define MII_CTRL_BUSY_SHIFT 8
24
25#define MII_DATA_OFFSET 0x004
26#define MII_DATA_MASK 0xffff
27#define MII_DATA_TA_SHIFT 16
28#define MII_DATA_TA_VAL 2
29#define MII_DATA_RA_SHIFT 18
30#define MII_DATA_PA_SHIFT 23
31#define MII_DATA_OP_SHIFT 28
32#define MII_DATA_OP_WRITE 1
33#define MII_DATA_OP_READ 2
34#define MII_DATA_SB_SHIFT 30
35
36struct iproc_mdio_priv {
37 struct mii_bus *mii_bus;
38 void __iomem *base;
39};
40
41static inline int iproc_mdio_wait_for_idle(void __iomem *base)
42{
43 u32 val;
44 unsigned int timeout = 1000;
45
46 do {
47 val = readl(base + MII_CTRL_OFFSET);
48 if ((val & BIT(MII_CTRL_BUSY_SHIFT)) == 0)
49 return 0;
50
51 usleep_range(1000, 2000);
52 } while (timeout--);
53
54 return -ETIMEDOUT;
55}
56
57static inline void iproc_mdio_config_clk(void __iomem *base)
58{
59 u32 val;
60
61 val = (IPROC_GPHY_MDCDIV << MII_CTRL_DIV_SHIFT) |
62 BIT(MII_CTRL_PRE_SHIFT);
63 writel(val, base + MII_CTRL_OFFSET);
64}
65
66static int iproc_mdio_read(struct mii_bus *bus, int phy_id, int reg)
67{
68 struct iproc_mdio_priv *priv = bus->priv;
69 u32 cmd;
70 int rc;
71
72 rc = iproc_mdio_wait_for_idle(priv->base);
73 if (rc)
74 return rc;
75
76
77 cmd = (MII_DATA_TA_VAL << MII_DATA_TA_SHIFT) |
78 (reg << MII_DATA_RA_SHIFT) |
79 (phy_id << MII_DATA_PA_SHIFT) |
80 BIT(MII_DATA_SB_SHIFT) |
81 (MII_DATA_OP_READ << MII_DATA_OP_SHIFT);
82
83 writel(cmd, priv->base + MII_DATA_OFFSET);
84
85 rc = iproc_mdio_wait_for_idle(priv->base);
86 if (rc)
87 return rc;
88
89 cmd = readl(priv->base + MII_DATA_OFFSET) & MII_DATA_MASK;
90
91 return cmd;
92}
93
94static int iproc_mdio_write(struct mii_bus *bus, int phy_id,
95 int reg, u16 val)
96{
97 struct iproc_mdio_priv *priv = bus->priv;
98 u32 cmd;
99 int rc;
100
101 rc = iproc_mdio_wait_for_idle(priv->base);
102 if (rc)
103 return rc;
104
105
106 cmd = (MII_DATA_TA_VAL << MII_DATA_TA_SHIFT) |
107 (reg << MII_DATA_RA_SHIFT) |
108 (phy_id << MII_DATA_PA_SHIFT) |
109 BIT(MII_DATA_SB_SHIFT) |
110 (MII_DATA_OP_WRITE << MII_DATA_OP_SHIFT) |
111 ((u32)(val) & MII_DATA_MASK);
112
113 writel(cmd, priv->base + MII_DATA_OFFSET);
114
115 rc = iproc_mdio_wait_for_idle(priv->base);
116 if (rc)
117 return rc;
118
119 return 0;
120}
121
122static int iproc_mdio_probe(struct platform_device *pdev)
123{
124 struct iproc_mdio_priv *priv;
125 struct mii_bus *bus;
126 struct resource *res;
127 int rc;
128
129 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
130 if (!priv)
131 return -ENOMEM;
132
133 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
134 priv->base = devm_ioremap_resource(&pdev->dev, res);
135 if (IS_ERR(priv->base)) {
136 dev_err(&pdev->dev, "failed to ioremap register\n");
137 return PTR_ERR(priv->base);
138 }
139
140 priv->mii_bus = mdiobus_alloc();
141 if (!priv->mii_bus) {
142 dev_err(&pdev->dev, "MDIO bus alloc failed\n");
143 return -ENOMEM;
144 }
145
146 bus = priv->mii_bus;
147 bus->priv = priv;
148 bus->name = "iProc MDIO bus";
149 snprintf(bus->id, MII_BUS_ID_SIZE, "%s-%d", pdev->name, pdev->id);
150 bus->parent = &pdev->dev;
151 bus->read = iproc_mdio_read;
152 bus->write = iproc_mdio_write;
153
154 iproc_mdio_config_clk(priv->base);
155
156 rc = of_mdiobus_register(bus, pdev->dev.of_node);
157 if (rc) {
158 dev_err(&pdev->dev, "MDIO bus registration failed\n");
159 goto err_iproc_mdio;
160 }
161
162 platform_set_drvdata(pdev, priv);
163
164 dev_info(&pdev->dev, "Broadcom iProc MDIO bus at 0x%p\n", priv->base);
165
166 return 0;
167
168err_iproc_mdio:
169 mdiobus_free(bus);
170 return rc;
171}
172
173static int iproc_mdio_remove(struct platform_device *pdev)
174{
175 struct iproc_mdio_priv *priv = platform_get_drvdata(pdev);
176
177 mdiobus_unregister(priv->mii_bus);
178 mdiobus_free(priv->mii_bus);
179
180 return 0;
181}
182
183static const struct of_device_id iproc_mdio_of_match[] = {
184 { .compatible = "brcm,iproc-mdio", },
185 { },
186};
187MODULE_DEVICE_TABLE(of, iproc_mdio_of_match);
188
189static struct platform_driver iproc_mdio_driver = {
190 .driver = {
191 .name = "iproc-mdio",
192 .of_match_table = iproc_mdio_of_match,
193 },
194 .probe = iproc_mdio_probe,
195 .remove = iproc_mdio_remove,
196};
197
198module_platform_driver(iproc_mdio_driver);
199
200MODULE_AUTHOR("Broadcom Corporation");
201MODULE_DESCRIPTION("Broadcom iProc MDIO bus controller");
202MODULE_LICENSE("GPL v2");
203MODULE_ALIAS("platform:iproc-mdio");
204
