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8#include <linux/clk.h>
9#include <linux/iopoll.h>
10#include <linux/kernel.h>
11#include <linux/module.h>
12#include <linux/of_address.h>
13#include <linux/of_mdio.h>
14#include <linux/platform_device.h>
15
16#define MDIO_RWCTRL 0x00
17#define MDIO_RO_DATA 0x04
18#define MDIO_WRITE BIT(13)
19#define MDIO_RW_FINISH BIT(15)
20#define BIT_PHY_ADDR_OFFSET 8
21#define BIT_WR_DATA_OFFSET 16
22
23struct hisi_femac_mdio_data {
24 struct clk *clk;
25 void __iomem *membase;
26};
27
28static int hisi_femac_mdio_wait_ready(struct hisi_femac_mdio_data *data)
29{
30 u32 val;
31
32 return readl_poll_timeout(data->membase + MDIO_RWCTRL,
33 val, val & MDIO_RW_FINISH, 20, 10000);
34}
35
36static int hisi_femac_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
37{
38 struct hisi_femac_mdio_data *data = bus->priv;
39 int ret;
40
41 ret = hisi_femac_mdio_wait_ready(data);
42 if (ret)
43 return ret;
44
45 writel((mii_id << BIT_PHY_ADDR_OFFSET) | regnum,
46 data->membase + MDIO_RWCTRL);
47
48 ret = hisi_femac_mdio_wait_ready(data);
49 if (ret)
50 return ret;
51
52 return readl(data->membase + MDIO_RO_DATA) & 0xFFFF;
53}
54
55static int hisi_femac_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
56 u16 value)
57{
58 struct hisi_femac_mdio_data *data = bus->priv;
59 int ret;
60
61 ret = hisi_femac_mdio_wait_ready(data);
62 if (ret)
63 return ret;
64
65 writel(MDIO_WRITE | (value << BIT_WR_DATA_OFFSET) |
66 (mii_id << BIT_PHY_ADDR_OFFSET) | regnum,
67 data->membase + MDIO_RWCTRL);
68
69 return hisi_femac_mdio_wait_ready(data);
70}
71
72static int hisi_femac_mdio_probe(struct platform_device *pdev)
73{
74 struct device_node *np = pdev->dev.of_node;
75 struct mii_bus *bus;
76 struct hisi_femac_mdio_data *data;
77 struct resource *res;
78 int ret;
79
80 bus = mdiobus_alloc_size(sizeof(*data));
81 if (!bus)
82 return -ENOMEM;
83
84 bus->name = "hisi_femac_mii_bus";
85 bus->read = &hisi_femac_mdio_read;
86 bus->write = &hisi_femac_mdio_write;
87 snprintf(bus->id, MII_BUS_ID_SIZE, "%s", pdev->name);
88 bus->parent = &pdev->dev;
89
90 data = bus->priv;
91 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
92 data->membase = devm_ioremap_resource(&pdev->dev, res);
93 if (IS_ERR(data->membase)) {
94 ret = PTR_ERR(data->membase);
95 goto err_out_free_mdiobus;
96 }
97
98 data->clk = devm_clk_get(&pdev->dev, NULL);
99 if (IS_ERR(data->clk)) {
100 ret = PTR_ERR(data->clk);
101 goto err_out_free_mdiobus;
102 }
103
104 ret = clk_prepare_enable(data->clk);
105 if (ret)
106 goto err_out_free_mdiobus;
107
108 ret = of_mdiobus_register(bus, np);
109 if (ret)
110 goto err_out_disable_clk;
111
112 platform_set_drvdata(pdev, bus);
113
114 return 0;
115
116err_out_disable_clk:
117 clk_disable_unprepare(data->clk);
118err_out_free_mdiobus:
119 mdiobus_free(bus);
120 return ret;
121}
122
123static int hisi_femac_mdio_remove(struct platform_device *pdev)
124{
125 struct mii_bus *bus = platform_get_drvdata(pdev);
126 struct hisi_femac_mdio_data *data = bus->priv;
127
128 mdiobus_unregister(bus);
129 clk_disable_unprepare(data->clk);
130 mdiobus_free(bus);
131
132 return 0;
133}
134
135static const struct of_device_id hisi_femac_mdio_dt_ids[] = {
136 { .compatible = "hisilicon,hisi-femac-mdio" },
137 { }
138};
139MODULE_DEVICE_TABLE(of, hisi_femac_mdio_dt_ids);
140
141static struct platform_driver hisi_femac_mdio_driver = {
142 .probe = hisi_femac_mdio_probe,
143 .remove = hisi_femac_mdio_remove,
144 .driver = {
145 .name = "hisi-femac-mdio",
146 .of_match_table = hisi_femac_mdio_dt_ids,
147 },
148};
149
150module_platform_driver(hisi_femac_mdio_driver);
151
152MODULE_DESCRIPTION("Hisilicon Fast Ethernet MAC MDIO interface driver");
153MODULE_AUTHOR("Dongpo Li <lidongpo@hisilicon.com>");
154MODULE_LICENSE("GPL");
155
