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17#include "ath9k.h"
18
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20
21
22
23#ifdef CONFIG_MAC80211_LEDS
24
25static void ath_fill_led_pin(struct ath_softc *sc)
26{
27 struct ath_hw *ah = sc->sc_ah;
28
29
30 if (ah->led_pin < 0) {
31 if (AR_SREV_9287(ah))
32 ah->led_pin = ATH_LED_PIN_9287;
33 else if (AR_SREV_9485(ah))
34 ah->led_pin = ATH_LED_PIN_9485;
35 else if (AR_SREV_9300(ah))
36 ah->led_pin = ATH_LED_PIN_9300;
37 else if (AR_SREV_9462(ah) || AR_SREV_9565(ah))
38 ah->led_pin = ATH_LED_PIN_9462;
39 else
40 ah->led_pin = ATH_LED_PIN_DEF;
41 }
42
43
44 ath9k_hw_gpio_request_out(ah, ah->led_pin, "ath9k-led",
45 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
46
47
48 ath9k_hw_set_gpio(ah, ah->led_pin, ah->config.led_active_high ? 0 : 1);
49}
50
51static void ath_led_brightness(struct led_classdev *led_cdev,
52 enum led_brightness brightness)
53{
54 struct ath_softc *sc = container_of(led_cdev, struct ath_softc, led_cdev);
55 u32 val = (brightness == LED_OFF);
56
57 if (sc->sc_ah->config.led_active_high)
58 val = !val;
59
60 ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, val);
61}
62
63void ath_deinit_leds(struct ath_softc *sc)
64{
65 if (!sc->led_registered)
66 return;
67
68 ath_led_brightness(&sc->led_cdev, LED_OFF);
69 led_classdev_unregister(&sc->led_cdev);
70
71 ath9k_hw_gpio_free(sc->sc_ah, sc->sc_ah->led_pin);
72}
73
74void ath_init_leds(struct ath_softc *sc)
75{
76 int ret;
77
78 if (AR_SREV_9100(sc->sc_ah))
79 return;
80
81 ath_fill_led_pin(sc);
82
83 if (!ath9k_led_blink)
84 sc->led_cdev.default_trigger =
85 ieee80211_get_radio_led_name(sc->hw);
86
87 snprintf(sc->led_name, sizeof(sc->led_name),
88 "ath9k-%s", wiphy_name(sc->hw->wiphy));
89 sc->led_cdev.name = sc->led_name;
90 sc->led_cdev.brightness_set = ath_led_brightness;
91
92 ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &sc->led_cdev);
93 if (ret < 0)
94 return;
95
96 sc->led_registered = true;
97}
98#endif
99
100
101
102
103
104static bool ath_is_rfkill_set(struct ath_softc *sc)
105{
106 struct ath_hw *ah = sc->sc_ah;
107 bool is_blocked;
108
109 ath9k_ps_wakeup(sc);
110 is_blocked = ath9k_hw_gpio_get(ah, ah->rfkill_gpio) ==
111 ah->rfkill_polarity;
112 ath9k_ps_restore(sc);
113
114 return is_blocked;
115}
116
117void ath9k_rfkill_poll_state(struct ieee80211_hw *hw)
118{
119 struct ath_softc *sc = hw->priv;
120 bool blocked = !!ath_is_rfkill_set(sc);
121
122 wiphy_rfkill_set_hw_state(hw->wiphy, blocked);
123}
124
125void ath_start_rfkill_poll(struct ath_softc *sc)
126{
127 struct ath_hw *ah = sc->sc_ah;
128
129 if (ah->caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
130 wiphy_rfkill_start_polling(sc->hw->wiphy);
131}
132
133#ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
134
135
136
137
138
139
140
141
142static void ath_detect_bt_priority(struct ath_softc *sc)
143{
144 struct ath_btcoex *btcoex = &sc->btcoex;
145 struct ath_hw *ah = sc->sc_ah;
146
147 if (ath9k_hw_gpio_get(sc->sc_ah, ah->btcoex_hw.btpriority_gpio))
148 btcoex->bt_priority_cnt++;
149
150 if (time_after(jiffies, btcoex->bt_priority_time +
151 msecs_to_jiffies(ATH_BT_PRIORITY_TIME_THRESHOLD))) {
152 clear_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags);
153 clear_bit(BT_OP_SCAN, &btcoex->op_flags);
154
155 if (btcoex->bt_priority_cnt >= ATH_BT_CNT_SCAN_THRESHOLD) {
156 ath_dbg(ath9k_hw_common(sc->sc_ah), BTCOEX,
157 "BT scan detected\n");
158 set_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags);
159 set_bit(BT_OP_SCAN, &btcoex->op_flags);
160 } else if (btcoex->bt_priority_cnt >= ATH_BT_CNT_THRESHOLD) {
161 ath_dbg(ath9k_hw_common(sc->sc_ah), BTCOEX,
162 "BT priority traffic detected\n");
163 set_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags);
164 }
165
166 btcoex->bt_priority_cnt = 0;
167 btcoex->bt_priority_time = jiffies;
168 }
169}
170
171static void ath_mci_ftp_adjust(struct ath_softc *sc)
172{
173 struct ath_btcoex *btcoex = &sc->btcoex;
174 struct ath_mci_profile *mci = &btcoex->mci;
175 struct ath_hw *ah = sc->sc_ah;
176
177 if (btcoex->bt_wait_time > ATH_BTCOEX_RX_WAIT_TIME) {
178 if (ar9003_mci_state(ah, MCI_STATE_NEED_FTP_STOMP) &&
179 (mci->num_pan || mci->num_other_acl))
180 ah->btcoex_hw.mci.stomp_ftp =
181 (sc->rx.num_pkts < ATH_BTCOEX_STOMP_FTP_THRESH);
182 else
183 ah->btcoex_hw.mci.stomp_ftp = false;
184 btcoex->bt_wait_time = 0;
185 sc->rx.num_pkts = 0;
186 }
187}
188
189
190
191
192
193
194static void ath_btcoex_period_timer(struct timer_list *t)
195{
196 struct ath_softc *sc = from_timer(sc, t, btcoex.period_timer);
197 struct ath_hw *ah = sc->sc_ah;
198 struct ath_btcoex *btcoex = &sc->btcoex;
199 enum ath_stomp_type stomp_type;
200 u32 timer_period;
201 unsigned long flags;
202
203 spin_lock_irqsave(&sc->sc_pm_lock, flags);
204 if (sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP) {
205 btcoex->bt_wait_time += btcoex->btcoex_period;
206 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
207 goto skip_hw_wakeup;
208 }
209 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
210
211 ath9k_ps_wakeup(sc);
212 spin_lock_bh(&btcoex->btcoex_lock);
213
214 if (ah->caps.hw_caps & ATH9K_HW_CAP_MCI) {
215 ath9k_mci_update_rssi(sc);
216 ath_mci_ftp_adjust(sc);
217 }
218
219 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_MCI))
220 ath_detect_bt_priority(sc);
221
222 stomp_type = btcoex->bt_stomp_type;
223 timer_period = btcoex->btcoex_no_stomp;
224
225 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_MCI)) {
226 if (test_bit(BT_OP_SCAN, &btcoex->op_flags)) {
227 stomp_type = ATH_BTCOEX_STOMP_ALL;
228 timer_period = btcoex->btscan_no_stomp;
229 }
230 } else if (btcoex->stomp_audio >= 5) {
231 stomp_type = ATH_BTCOEX_STOMP_AUDIO;
232 btcoex->stomp_audio = 0;
233 }
234
235 ath9k_hw_btcoex_bt_stomp(ah, stomp_type);
236 ath9k_hw_btcoex_enable(ah);
237
238 spin_unlock_bh(&btcoex->btcoex_lock);
239
240 if (btcoex->btcoex_period != btcoex->btcoex_no_stomp)
241 mod_timer(&btcoex->no_stomp_timer,
242 jiffies + msecs_to_jiffies(timer_period));
243
244 ath9k_ps_restore(sc);
245
246skip_hw_wakeup:
247 mod_timer(&btcoex->period_timer,
248 jiffies + msecs_to_jiffies(btcoex->btcoex_period));
249}
250
251
252
253
254
255static void ath_btcoex_no_stomp_timer(struct timer_list *t)
256{
257 struct ath_softc *sc = from_timer(sc, t, btcoex.no_stomp_timer);
258 struct ath_hw *ah = sc->sc_ah;
259 struct ath_btcoex *btcoex = &sc->btcoex;
260
261 ath9k_ps_wakeup(sc);
262 spin_lock_bh(&btcoex->btcoex_lock);
263
264 if (btcoex->bt_stomp_type == ATH_BTCOEX_STOMP_LOW ||
265 (!(ah->caps.hw_caps & ATH9K_HW_CAP_MCI) &&
266 test_bit(BT_OP_SCAN, &btcoex->op_flags)))
267 ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_NONE);
268 else if (btcoex->bt_stomp_type == ATH_BTCOEX_STOMP_ALL)
269 ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_LOW);
270
271 ath9k_hw_btcoex_enable(ah);
272 spin_unlock_bh(&btcoex->btcoex_lock);
273 ath9k_ps_restore(sc);
274}
275
276static void ath_init_btcoex_timer(struct ath_softc *sc)
277{
278 struct ath_btcoex *btcoex = &sc->btcoex;
279
280 btcoex->btcoex_period = ATH_BTCOEX_DEF_BT_PERIOD;
281 btcoex->btcoex_no_stomp = (100 - ATH_BTCOEX_DEF_DUTY_CYCLE) *
282 btcoex->btcoex_period / 100;
283 btcoex->btscan_no_stomp = (100 - ATH_BTCOEX_BTSCAN_DUTY_CYCLE) *
284 btcoex->btcoex_period / 100;
285 btcoex->bt_stomp_type = ATH_BTCOEX_STOMP_LOW;
286
287 timer_setup(&btcoex->period_timer, ath_btcoex_period_timer, 0);
288 timer_setup(&btcoex->no_stomp_timer, ath_btcoex_no_stomp_timer, 0);
289
290 spin_lock_init(&btcoex->btcoex_lock);
291}
292
293
294
295
296void ath9k_btcoex_timer_resume(struct ath_softc *sc)
297{
298 struct ath_btcoex *btcoex = &sc->btcoex;
299 struct ath_hw *ah = sc->sc_ah;
300
301 if (ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_3WIRE &&
302 ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_MCI)
303 return;
304
305 ath_dbg(ath9k_hw_common(ah), BTCOEX, "Starting btcoex timers\n");
306
307
308 del_timer_sync(&btcoex->no_stomp_timer);
309
310 btcoex->bt_priority_cnt = 0;
311 btcoex->bt_priority_time = jiffies;
312 clear_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags);
313 clear_bit(BT_OP_SCAN, &btcoex->op_flags);
314
315 mod_timer(&btcoex->period_timer, jiffies);
316}
317
318
319
320
321void ath9k_btcoex_timer_pause(struct ath_softc *sc)
322{
323 struct ath_btcoex *btcoex = &sc->btcoex;
324 struct ath_hw *ah = sc->sc_ah;
325
326 if (ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_3WIRE &&
327 ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_MCI)
328 return;
329
330 ath_dbg(ath9k_hw_common(ah), BTCOEX, "Stopping btcoex timers\n");
331
332 del_timer_sync(&btcoex->period_timer);
333 del_timer_sync(&btcoex->no_stomp_timer);
334}
335
336void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc)
337{
338 struct ath_btcoex *btcoex = &sc->btcoex;
339
340 del_timer_sync(&btcoex->no_stomp_timer);
341}
342
343u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, u32 max_4ms_framelen)
344{
345 struct ath_btcoex *btcoex = &sc->btcoex;
346 struct ath_mci_profile *mci = &sc->btcoex.mci;
347 u16 aggr_limit = 0;
348
349 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_MCI) && mci->aggr_limit)
350 aggr_limit = (max_4ms_framelen * mci->aggr_limit) >> 4;
351 else if (test_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags))
352 aggr_limit = min((max_4ms_framelen * 3) / 8,
353 (u32)ATH_AMPDU_LIMIT_MAX);
354
355 return aggr_limit;
356}
357
358void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, u32 status)
359{
360 if (status & ATH9K_INT_MCI)
361 ath_mci_intr(sc);
362}
363
364void ath9k_start_btcoex(struct ath_softc *sc)
365{
366 struct ath_hw *ah = sc->sc_ah;
367
368 if (ah->btcoex_hw.enabled ||
369 ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_NONE)
370 return;
371
372 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_MCI))
373 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
374 AR_STOMP_LOW_WLAN_WGHT, 0);
375 else
376 ath9k_hw_btcoex_set_weight(ah, 0, 0,
377 ATH_BTCOEX_STOMP_NONE);
378 ath9k_hw_btcoex_enable(ah);
379 ath9k_btcoex_timer_resume(sc);
380}
381
382void ath9k_stop_btcoex(struct ath_softc *sc)
383{
384 struct ath_hw *ah = sc->sc_ah;
385
386 if (!ah->btcoex_hw.enabled ||
387 ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_NONE)
388 return;
389
390 ath9k_btcoex_timer_pause(sc);
391 ath9k_hw_btcoex_disable(ah);
392
393 if (ah->caps.hw_caps & ATH9K_HW_CAP_MCI)
394 ath_mci_flush_profile(&sc->btcoex.mci);
395}
396
397void ath9k_deinit_btcoex(struct ath_softc *sc)
398{
399 struct ath_hw *ah = sc->sc_ah;
400
401 if (ath9k_hw_mci_is_enabled(ah))
402 ath_mci_cleanup(sc);
403 else {
404 enum ath_btcoex_scheme scheme = ath9k_hw_get_btcoex_scheme(ah);
405
406 if (scheme == ATH_BTCOEX_CFG_2WIRE ||
407 scheme == ATH_BTCOEX_CFG_3WIRE)
408 ath9k_hw_btcoex_deinit(sc->sc_ah);
409 }
410}
411
412int ath9k_init_btcoex(struct ath_softc *sc)
413{
414 struct ath_txq *txq;
415 struct ath_hw *ah = sc->sc_ah;
416 int r;
417
418 ath9k_hw_btcoex_init_scheme(ah);
419
420 switch (ath9k_hw_get_btcoex_scheme(sc->sc_ah)) {
421 case ATH_BTCOEX_CFG_NONE:
422 break;
423 case ATH_BTCOEX_CFG_2WIRE:
424 ath9k_hw_btcoex_init_2wire(sc->sc_ah);
425 break;
426 case ATH_BTCOEX_CFG_3WIRE:
427 ath9k_hw_btcoex_init_3wire(sc->sc_ah);
428 ath_init_btcoex_timer(sc);
429 txq = sc->tx.txq_map[IEEE80211_AC_BE];
430 ath9k_hw_init_btcoex_hw(sc->sc_ah, txq->axq_qnum);
431 break;
432 case ATH_BTCOEX_CFG_MCI:
433 ath_init_btcoex_timer(sc);
434
435 sc->btcoex.duty_cycle = ATH_BTCOEX_DEF_DUTY_CYCLE;
436 INIT_LIST_HEAD(&sc->btcoex.mci.info);
437 ath9k_hw_btcoex_init_mci(ah);
438
439 r = ath_mci_setup(sc);
440 if (r)
441 return r;
442
443 break;
444 default:
445 WARN_ON(1);
446 break;
447 }
448
449 return 0;
450}
451
452static int ath9k_dump_mci_btcoex(struct ath_softc *sc, u8 *buf, u32 size)
453{
454 struct ath_btcoex *btcoex = &sc->btcoex;
455 struct ath_mci_profile *mci = &btcoex->mci;
456 struct ath_hw *ah = sc->sc_ah;
457 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
458 u32 len = 0;
459 int i;
460
461 ATH_DUMP_BTCOEX("Total BT profiles", NUM_PROF(mci));
462 ATH_DUMP_BTCOEX("MGMT", mci->num_mgmt);
463 ATH_DUMP_BTCOEX("SCO", mci->num_sco);
464 ATH_DUMP_BTCOEX("A2DP", mci->num_a2dp);
465 ATH_DUMP_BTCOEX("HID", mci->num_hid);
466 ATH_DUMP_BTCOEX("PAN", mci->num_pan);
467 ATH_DUMP_BTCOEX("ACL", mci->num_other_acl);
468 ATH_DUMP_BTCOEX("BDR", mci->num_bdr);
469 ATH_DUMP_BTCOEX("Aggr. Limit", mci->aggr_limit);
470 ATH_DUMP_BTCOEX("Stomp Type", btcoex->bt_stomp_type);
471 ATH_DUMP_BTCOEX("BTCoex Period (msec)", btcoex->btcoex_period);
472 ATH_DUMP_BTCOEX("Duty Cycle", btcoex->duty_cycle);
473 ATH_DUMP_BTCOEX("BT Wait time", btcoex->bt_wait_time);
474 ATH_DUMP_BTCOEX("Concurrent Tx", btcoex_hw->mci.concur_tx);
475 ATH_DUMP_BTCOEX("Concurrent RSSI cnt", btcoex->rssi_count);
476
477 len += scnprintf(buf + len, size - len, "BT Weights: ");
478 for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
479 len += scnprintf(buf + len, size - len, "%08x ",
480 btcoex_hw->bt_weight[i]);
481 len += scnprintf(buf + len, size - len, "\n");
482 len += scnprintf(buf + len, size - len, "WLAN Weights: ");
483 for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
484 len += scnprintf(buf + len, size - len, "%08x ",
485 btcoex_hw->wlan_weight[i]);
486 len += scnprintf(buf + len, size - len, "\n");
487 len += scnprintf(buf + len, size - len, "Tx Priorities: ");
488 for (i = 0; i < ATH_BTCOEX_STOMP_MAX; i++)
489 len += scnprintf(buf + len, size - len, "%08x ",
490 btcoex_hw->tx_prio[i]);
491
492 len += scnprintf(buf + len, size - len, "\n");
493
494 return len;
495}
496
497static int ath9k_dump_legacy_btcoex(struct ath_softc *sc, u8 *buf, u32 size)
498{
499
500 struct ath_btcoex *btcoex = &sc->btcoex;
501 u32 len = 0;
502
503 ATH_DUMP_BTCOEX("Stomp Type", btcoex->bt_stomp_type);
504 ATH_DUMP_BTCOEX("BTCoex Period (msec)", btcoex->btcoex_period);
505 ATH_DUMP_BTCOEX("Duty Cycle", btcoex->duty_cycle);
506 ATH_DUMP_BTCOEX("BT Wait time", btcoex->bt_wait_time);
507
508 return len;
509}
510
511int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size)
512{
513 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
514 return ath9k_dump_mci_btcoex(sc, buf, size);
515 else
516 return ath9k_dump_legacy_btcoex(sc, buf, size);
517}
518
519#endif
520
