linux/drivers/net/wireless/broadcom/b43legacy/main.c
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   1// SPDX-License-Identifier: GPL-2.0-or-later
   2/*
   3 *
   4 *  Broadcom B43legacy wireless driver
   5 *
   6 *  Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
   7 *  Copyright (c) 2005-2008 Stefano Brivio <stefano.brivio@polimi.it>
   8 *  Copyright (c) 2005, 2006 Michael Buesch <m@bues.ch>
   9 *  Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
  10 *  Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
  11 *  Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
  12 *
  13 *  Some parts of the code in this file are derived from the ipw2200
  14 *  driver  Copyright(c) 2003 - 2004 Intel Corporation.
  15
  16 */
  17
  18#include <linux/delay.h>
  19#include <linux/init.h>
  20#include <linux/module.h>
  21#include <linux/if_arp.h>
  22#include <linux/etherdevice.h>
  23#include <linux/firmware.h>
  24#include <linux/workqueue.h>
  25#include <linux/sched/signal.h>
  26#include <linux/skbuff.h>
  27#include <linux/dma-mapping.h>
  28#include <linux/slab.h>
  29#include <net/dst.h>
  30#include <asm/unaligned.h>
  31
  32#include "b43legacy.h"
  33#include "main.h"
  34#include "debugfs.h"
  35#include "phy.h"
  36#include "dma.h"
  37#include "pio.h"
  38#include "sysfs.h"
  39#include "xmit.h"
  40#include "radio.h"
  41
  42
  43MODULE_DESCRIPTION("Broadcom B43legacy wireless driver");
  44MODULE_AUTHOR("Martin Langer");
  45MODULE_AUTHOR("Stefano Brivio");
  46MODULE_AUTHOR("Michael Buesch");
  47MODULE_LICENSE("GPL");
  48
  49MODULE_FIRMWARE("b43legacy/ucode2.fw");
  50MODULE_FIRMWARE("b43legacy/ucode4.fw");
  51
  52#if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
  53static int modparam_pio;
  54module_param_named(pio, modparam_pio, int, 0444);
  55MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode");
  56#elif defined(CONFIG_B43LEGACY_DMA)
  57# define modparam_pio   0
  58#elif defined(CONFIG_B43LEGACY_PIO)
  59# define modparam_pio   1
  60#endif
  61
  62static int modparam_bad_frames_preempt;
  63module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
  64MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames"
  65                 " Preemption");
  66
  67static char modparam_fwpostfix[16];
  68module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444);
  69MODULE_PARM_DESC(fwpostfix, "Postfix for the firmware files to load.");
  70
  71/* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */
  72static const struct ssb_device_id b43legacy_ssb_tbl[] = {
  73        SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 2),
  74        SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 4),
  75        {},
  76};
  77MODULE_DEVICE_TABLE(ssb, b43legacy_ssb_tbl);
  78
  79
  80/* Channel and ratetables are shared for all devices.
  81 * They can't be const, because ieee80211 puts some precalculated
  82 * data in there. This data is the same for all devices, so we don't
  83 * get concurrency issues */
  84#define RATETAB_ENT(_rateid, _flags) \
  85        {                                                               \
  86                .bitrate        = B43legacy_RATE_TO_100KBPS(_rateid),   \
  87                .hw_value       = (_rateid),                            \
  88                .flags          = (_flags),                             \
  89        }
  90/*
  91 * NOTE: When changing this, sync with xmit.c's
  92 *       b43legacy_plcp_get_bitrate_idx_* functions!
  93 */
  94static struct ieee80211_rate __b43legacy_ratetable[] = {
  95        RATETAB_ENT(B43legacy_CCK_RATE_1MB, 0),
  96        RATETAB_ENT(B43legacy_CCK_RATE_2MB, IEEE80211_RATE_SHORT_PREAMBLE),
  97        RATETAB_ENT(B43legacy_CCK_RATE_5MB, IEEE80211_RATE_SHORT_PREAMBLE),
  98        RATETAB_ENT(B43legacy_CCK_RATE_11MB, IEEE80211_RATE_SHORT_PREAMBLE),
  99        RATETAB_ENT(B43legacy_OFDM_RATE_6MB, 0),
 100        RATETAB_ENT(B43legacy_OFDM_RATE_9MB, 0),
 101        RATETAB_ENT(B43legacy_OFDM_RATE_12MB, 0),
 102        RATETAB_ENT(B43legacy_OFDM_RATE_18MB, 0),
 103        RATETAB_ENT(B43legacy_OFDM_RATE_24MB, 0),
 104        RATETAB_ENT(B43legacy_OFDM_RATE_36MB, 0),
 105        RATETAB_ENT(B43legacy_OFDM_RATE_48MB, 0),
 106        RATETAB_ENT(B43legacy_OFDM_RATE_54MB, 0),
 107};
 108#define b43legacy_b_ratetable           (__b43legacy_ratetable + 0)
 109#define b43legacy_b_ratetable_size      4
 110#define b43legacy_g_ratetable           (__b43legacy_ratetable + 0)
 111#define b43legacy_g_ratetable_size      12
 112
 113#define CHANTAB_ENT(_chanid, _freq) \
 114        {                                                       \
 115                .center_freq    = (_freq),                      \
 116                .hw_value       = (_chanid),                    \
 117        }
 118static struct ieee80211_channel b43legacy_bg_chantable[] = {
 119        CHANTAB_ENT(1, 2412),
 120        CHANTAB_ENT(2, 2417),
 121        CHANTAB_ENT(3, 2422),
 122        CHANTAB_ENT(4, 2427),
 123        CHANTAB_ENT(5, 2432),
 124        CHANTAB_ENT(6, 2437),
 125        CHANTAB_ENT(7, 2442),
 126        CHANTAB_ENT(8, 2447),
 127        CHANTAB_ENT(9, 2452),
 128        CHANTAB_ENT(10, 2457),
 129        CHANTAB_ENT(11, 2462),
 130        CHANTAB_ENT(12, 2467),
 131        CHANTAB_ENT(13, 2472),
 132        CHANTAB_ENT(14, 2484),
 133};
 134
 135static struct ieee80211_supported_band b43legacy_band_2GHz_BPHY = {
 136        .channels = b43legacy_bg_chantable,
 137        .n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
 138        .bitrates = b43legacy_b_ratetable,
 139        .n_bitrates = b43legacy_b_ratetable_size,
 140};
 141
 142static struct ieee80211_supported_band b43legacy_band_2GHz_GPHY = {
 143        .channels = b43legacy_bg_chantable,
 144        .n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
 145        .bitrates = b43legacy_g_ratetable,
 146        .n_bitrates = b43legacy_g_ratetable_size,
 147};
 148
 149static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev);
 150static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev);
 151static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev);
 152static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev);
 153
 154
 155static int b43legacy_ratelimit(struct b43legacy_wl *wl)
 156{
 157        if (!wl || !wl->current_dev)
 158                return 1;
 159        if (b43legacy_status(wl->current_dev) < B43legacy_STAT_STARTED)
 160                return 1;
 161        /* We are up and running.
 162         * Ratelimit the messages to avoid DoS over the net. */
 163        return net_ratelimit();
 164}
 165
 166void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...)
 167{
 168        struct va_format vaf;
 169        va_list args;
 170
 171        if (!b43legacy_ratelimit(wl))
 172                return;
 173
 174        va_start(args, fmt);
 175
 176        vaf.fmt = fmt;
 177        vaf.va = &args;
 178
 179        printk(KERN_INFO "b43legacy-%s: %pV",
 180               (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
 181
 182        va_end(args);
 183}
 184
 185void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...)
 186{
 187        struct va_format vaf;
 188        va_list args;
 189
 190        if (!b43legacy_ratelimit(wl))
 191                return;
 192
 193        va_start(args, fmt);
 194
 195        vaf.fmt = fmt;
 196        vaf.va = &args;
 197
 198        printk(KERN_ERR "b43legacy-%s ERROR: %pV",
 199               (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
 200
 201        va_end(args);
 202}
 203
 204void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...)
 205{
 206        struct va_format vaf;
 207        va_list args;
 208
 209        if (!b43legacy_ratelimit(wl))
 210                return;
 211
 212        va_start(args, fmt);
 213
 214        vaf.fmt = fmt;
 215        vaf.va = &args;
 216
 217        printk(KERN_WARNING "b43legacy-%s warning: %pV",
 218               (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
 219
 220        va_end(args);
 221}
 222
 223#if B43legacy_DEBUG
 224void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...)
 225{
 226        struct va_format vaf;
 227        va_list args;
 228
 229        va_start(args, fmt);
 230
 231        vaf.fmt = fmt;
 232        vaf.va = &args;
 233
 234        printk(KERN_DEBUG "b43legacy-%s debug: %pV",
 235               (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
 236
 237        va_end(args);
 238}
 239#endif /* DEBUG */
 240
 241static void b43legacy_ram_write(struct b43legacy_wldev *dev, u16 offset,
 242                                u32 val)
 243{
 244        u32 status;
 245
 246        B43legacy_WARN_ON(offset % 4 != 0);
 247
 248        status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 249        if (status & B43legacy_MACCTL_BE)
 250                val = swab32(val);
 251
 252        b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset);
 253        b43legacy_write32(dev, B43legacy_MMIO_RAM_DATA, val);
 254}
 255
 256static inline
 257void b43legacy_shm_control_word(struct b43legacy_wldev *dev,
 258                                u16 routing, u16 offset)
 259{
 260        u32 control;
 261
 262        /* "offset" is the WORD offset. */
 263
 264        control = routing;
 265        control <<= 16;
 266        control |= offset;
 267        b43legacy_write32(dev, B43legacy_MMIO_SHM_CONTROL, control);
 268}
 269
 270u32 b43legacy_shm_read32(struct b43legacy_wldev *dev,
 271                       u16 routing, u16 offset)
 272{
 273        u32 ret;
 274
 275        if (routing == B43legacy_SHM_SHARED) {
 276                B43legacy_WARN_ON((offset & 0x0001) != 0);
 277                if (offset & 0x0003) {
 278                        /* Unaligned access */
 279                        b43legacy_shm_control_word(dev, routing, offset >> 2);
 280                        ret = b43legacy_read16(dev,
 281                                B43legacy_MMIO_SHM_DATA_UNALIGNED);
 282                        ret <<= 16;
 283                        b43legacy_shm_control_word(dev, routing,
 284                                                     (offset >> 2) + 1);
 285                        ret |= b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
 286
 287                        return ret;
 288                }
 289                offset >>= 2;
 290        }
 291        b43legacy_shm_control_word(dev, routing, offset);
 292        ret = b43legacy_read32(dev, B43legacy_MMIO_SHM_DATA);
 293
 294        return ret;
 295}
 296
 297u16 b43legacy_shm_read16(struct b43legacy_wldev *dev,
 298                           u16 routing, u16 offset)
 299{
 300        u16 ret;
 301
 302        if (routing == B43legacy_SHM_SHARED) {
 303                B43legacy_WARN_ON((offset & 0x0001) != 0);
 304                if (offset & 0x0003) {
 305                        /* Unaligned access */
 306                        b43legacy_shm_control_word(dev, routing, offset >> 2);
 307                        ret = b43legacy_read16(dev,
 308                                             B43legacy_MMIO_SHM_DATA_UNALIGNED);
 309
 310                        return ret;
 311                }
 312                offset >>= 2;
 313        }
 314        b43legacy_shm_control_word(dev, routing, offset);
 315        ret = b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
 316
 317        return ret;
 318}
 319
 320void b43legacy_shm_write32(struct b43legacy_wldev *dev,
 321                           u16 routing, u16 offset,
 322                           u32 value)
 323{
 324        if (routing == B43legacy_SHM_SHARED) {
 325                B43legacy_WARN_ON((offset & 0x0001) != 0);
 326                if (offset & 0x0003) {
 327                        /* Unaligned access */
 328                        b43legacy_shm_control_word(dev, routing, offset >> 2);
 329                        b43legacy_write16(dev,
 330                                          B43legacy_MMIO_SHM_DATA_UNALIGNED,
 331                                          (value >> 16) & 0xffff);
 332                        b43legacy_shm_control_word(dev, routing,
 333                                                   (offset >> 2) + 1);
 334                        b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA,
 335                                          value & 0xffff);
 336                        return;
 337                }
 338                offset >>= 2;
 339        }
 340        b43legacy_shm_control_word(dev, routing, offset);
 341        b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, value);
 342}
 343
 344void b43legacy_shm_write16(struct b43legacy_wldev *dev, u16 routing, u16 offset,
 345                           u16 value)
 346{
 347        if (routing == B43legacy_SHM_SHARED) {
 348                B43legacy_WARN_ON((offset & 0x0001) != 0);
 349                if (offset & 0x0003) {
 350                        /* Unaligned access */
 351                        b43legacy_shm_control_word(dev, routing, offset >> 2);
 352                        b43legacy_write16(dev,
 353                                          B43legacy_MMIO_SHM_DATA_UNALIGNED,
 354                                          value);
 355                        return;
 356                }
 357                offset >>= 2;
 358        }
 359        b43legacy_shm_control_word(dev, routing, offset);
 360        b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, value);
 361}
 362
 363/* Read HostFlags */
 364u32 b43legacy_hf_read(struct b43legacy_wldev *dev)
 365{
 366        u32 ret;
 367
 368        ret = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 369                                   B43legacy_SHM_SH_HOSTFHI);
 370        ret <<= 16;
 371        ret |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 372                                    B43legacy_SHM_SH_HOSTFLO);
 373
 374        return ret;
 375}
 376
 377/* Write HostFlags */
 378void b43legacy_hf_write(struct b43legacy_wldev *dev, u32 value)
 379{
 380        b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
 381                              B43legacy_SHM_SH_HOSTFLO,
 382                              (value & 0x0000FFFF));
 383        b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
 384                              B43legacy_SHM_SH_HOSTFHI,
 385                              ((value & 0xFFFF0000) >> 16));
 386}
 387
 388void b43legacy_tsf_read(struct b43legacy_wldev *dev, u64 *tsf)
 389{
 390        /* We need to be careful. As we read the TSF from multiple
 391         * registers, we should take care of register overflows.
 392         * In theory, the whole tsf read process should be atomic.
 393         * We try to be atomic here, by restaring the read process,
 394         * if any of the high registers changed (overflew).
 395         */
 396        if (dev->dev->id.revision >= 3) {
 397                u32 low;
 398                u32 high;
 399                u32 high2;
 400
 401                do {
 402                        high = b43legacy_read32(dev,
 403                                        B43legacy_MMIO_REV3PLUS_TSF_HIGH);
 404                        low = b43legacy_read32(dev,
 405                                        B43legacy_MMIO_REV3PLUS_TSF_LOW);
 406                        high2 = b43legacy_read32(dev,
 407                                        B43legacy_MMIO_REV3PLUS_TSF_HIGH);
 408                } while (unlikely(high != high2));
 409
 410                *tsf = high;
 411                *tsf <<= 32;
 412                *tsf |= low;
 413        } else {
 414                u64 tmp;
 415                u16 v0;
 416                u16 v1;
 417                u16 v2;
 418                u16 v3;
 419                u16 test1;
 420                u16 test2;
 421                u16 test3;
 422
 423                do {
 424                        v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
 425                        v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
 426                        v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
 427                        v0 = b43legacy_read16(dev, B43legacy_MMIO_TSF_0);
 428
 429                        test3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
 430                        test2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
 431                        test1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
 432                } while (v3 != test3 || v2 != test2 || v1 != test1);
 433
 434                *tsf = v3;
 435                *tsf <<= 48;
 436                tmp = v2;
 437                tmp <<= 32;
 438                *tsf |= tmp;
 439                tmp = v1;
 440                tmp <<= 16;
 441                *tsf |= tmp;
 442                *tsf |= v0;
 443        }
 444}
 445
 446static void b43legacy_time_lock(struct b43legacy_wldev *dev)
 447{
 448        u32 status;
 449
 450        status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 451        status |= B43legacy_MACCTL_TBTTHOLD;
 452        b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
 453}
 454
 455static void b43legacy_time_unlock(struct b43legacy_wldev *dev)
 456{
 457        u32 status;
 458
 459        status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 460        status &= ~B43legacy_MACCTL_TBTTHOLD;
 461        b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
 462}
 463
 464static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf)
 465{
 466        /* Be careful with the in-progress timer.
 467         * First zero out the low register, so we have a full
 468         * register-overflow duration to complete the operation.
 469         */
 470        if (dev->dev->id.revision >= 3) {
 471                u32 lo = (tsf & 0x00000000FFFFFFFFULL);
 472                u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32;
 473
 474                b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 0);
 475                b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_HIGH,
 476                                    hi);
 477                b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW,
 478                                    lo);
 479        } else {
 480                u16 v0 = (tsf & 0x000000000000FFFFULL);
 481                u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16;
 482                u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32;
 483                u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48;
 484
 485                b43legacy_write16(dev, B43legacy_MMIO_TSF_0, 0);
 486                b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3);
 487                b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2);
 488                b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1);
 489                b43legacy_write16(dev, B43legacy_MMIO_TSF_0, v0);
 490        }
 491}
 492
 493void b43legacy_tsf_write(struct b43legacy_wldev *dev, u64 tsf)
 494{
 495        b43legacy_time_lock(dev);
 496        b43legacy_tsf_write_locked(dev, tsf);
 497        b43legacy_time_unlock(dev);
 498}
 499
 500static
 501void b43legacy_macfilter_set(struct b43legacy_wldev *dev,
 502                             u16 offset, const u8 *mac)
 503{
 504        static const u8 zero_addr[ETH_ALEN] = { 0 };
 505        u16 data;
 506
 507        if (!mac)
 508                mac = zero_addr;
 509
 510        offset |= 0x0020;
 511        b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_CONTROL, offset);
 512
 513        data = mac[0];
 514        data |= mac[1] << 8;
 515        b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 516        data = mac[2];
 517        data |= mac[3] << 8;
 518        b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 519        data = mac[4];
 520        data |= mac[5] << 8;
 521        b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 522}
 523
 524static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev *dev)
 525{
 526        static const u8 zero_addr[ETH_ALEN] = { 0 };
 527        const u8 *mac = dev->wl->mac_addr;
 528        const u8 *bssid = dev->wl->bssid;
 529        u8 mac_bssid[ETH_ALEN * 2];
 530        int i;
 531        u32 tmp;
 532
 533        if (!bssid)
 534                bssid = zero_addr;
 535        if (!mac)
 536                mac = zero_addr;
 537
 538        b43legacy_macfilter_set(dev, B43legacy_MACFILTER_BSSID, bssid);
 539
 540        memcpy(mac_bssid, mac, ETH_ALEN);
 541        memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN);
 542
 543        /* Write our MAC address and BSSID to template ram */
 544        for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) {
 545                tmp =  (u32)(mac_bssid[i + 0]);
 546                tmp |= (u32)(mac_bssid[i + 1]) << 8;
 547                tmp |= (u32)(mac_bssid[i + 2]) << 16;
 548                tmp |= (u32)(mac_bssid[i + 3]) << 24;
 549                b43legacy_ram_write(dev, 0x20 + i, tmp);
 550                b43legacy_ram_write(dev, 0x78 + i, tmp);
 551                b43legacy_ram_write(dev, 0x478 + i, tmp);
 552        }
 553}
 554
 555static void b43legacy_upload_card_macaddress(struct b43legacy_wldev *dev)
 556{
 557        b43legacy_write_mac_bssid_templates(dev);
 558        b43legacy_macfilter_set(dev, B43legacy_MACFILTER_SELF,
 559                                dev->wl->mac_addr);
 560}
 561
 562static void b43legacy_set_slot_time(struct b43legacy_wldev *dev,
 563                                    u16 slot_time)
 564{
 565        /* slot_time is in usec. */
 566        if (dev->phy.type != B43legacy_PHYTYPE_G)
 567                return;
 568        b43legacy_write16(dev, 0x684, 510 + slot_time);
 569        b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0010,
 570                              slot_time);
 571}
 572
 573static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev *dev)
 574{
 575        b43legacy_set_slot_time(dev, 9);
 576}
 577
 578static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev *dev)
 579{
 580        b43legacy_set_slot_time(dev, 20);
 581}
 582
 583/* Synchronize IRQ top- and bottom-half.
 584 * IRQs must be masked before calling this.
 585 * This must not be called with the irq_lock held.
 586 */
 587static void b43legacy_synchronize_irq(struct b43legacy_wldev *dev)
 588{
 589        synchronize_irq(dev->dev->irq);
 590        tasklet_kill(&dev->isr_tasklet);
 591}
 592
 593/* DummyTransmission function, as documented on
 594 * http://bcm-specs.sipsolutions.net/DummyTransmission
 595 */
 596void b43legacy_dummy_transmission(struct b43legacy_wldev *dev)
 597{
 598        struct b43legacy_phy *phy = &dev->phy;
 599        unsigned int i;
 600        unsigned int max_loop;
 601        u16 value;
 602        u32 buffer[5] = {
 603                0x00000000,
 604                0x00D40000,
 605                0x00000000,
 606                0x01000000,
 607                0x00000000,
 608        };
 609
 610        switch (phy->type) {
 611        case B43legacy_PHYTYPE_B:
 612        case B43legacy_PHYTYPE_G:
 613                max_loop = 0xFA;
 614                buffer[0] = 0x000B846E;
 615                break;
 616        default:
 617                B43legacy_BUG_ON(1);
 618                return;
 619        }
 620
 621        for (i = 0; i < 5; i++)
 622                b43legacy_ram_write(dev, i * 4, buffer[i]);
 623
 624        /* dummy read follows */
 625        b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 626
 627        b43legacy_write16(dev, 0x0568, 0x0000);
 628        b43legacy_write16(dev, 0x07C0, 0x0000);
 629        b43legacy_write16(dev, 0x050C, 0x0000);
 630        b43legacy_write16(dev, 0x0508, 0x0000);
 631        b43legacy_write16(dev, 0x050A, 0x0000);
 632        b43legacy_write16(dev, 0x054C, 0x0000);
 633        b43legacy_write16(dev, 0x056A, 0x0014);
 634        b43legacy_write16(dev, 0x0568, 0x0826);
 635        b43legacy_write16(dev, 0x0500, 0x0000);
 636        b43legacy_write16(dev, 0x0502, 0x0030);
 637
 638        if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
 639                b43legacy_radio_write16(dev, 0x0051, 0x0017);
 640        for (i = 0x00; i < max_loop; i++) {
 641                value = b43legacy_read16(dev, 0x050E);
 642                if (value & 0x0080)
 643                        break;
 644                udelay(10);
 645        }
 646        for (i = 0x00; i < 0x0A; i++) {
 647                value = b43legacy_read16(dev, 0x050E);
 648                if (value & 0x0400)
 649                        break;
 650                udelay(10);
 651        }
 652        for (i = 0x00; i < 0x0A; i++) {
 653                value = b43legacy_read16(dev, 0x0690);
 654                if (!(value & 0x0100))
 655                        break;
 656                udelay(10);
 657        }
 658        if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
 659                b43legacy_radio_write16(dev, 0x0051, 0x0037);
 660}
 661
 662/* Turn the Analog ON/OFF */
 663static void b43legacy_switch_analog(struct b43legacy_wldev *dev, int on)
 664{
 665        b43legacy_write16(dev, B43legacy_MMIO_PHY0, on ? 0 : 0xF4);
 666}
 667
 668void b43legacy_wireless_core_reset(struct b43legacy_wldev *dev, u32 flags)
 669{
 670        u32 tmslow;
 671        u32 macctl;
 672
 673        flags |= B43legacy_TMSLOW_PHYCLKEN;
 674        flags |= B43legacy_TMSLOW_PHYRESET;
 675        ssb_device_enable(dev->dev, flags);
 676        msleep(2); /* Wait for the PLL to turn on. */
 677
 678        /* Now take the PHY out of Reset again */
 679        tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
 680        tmslow |= SSB_TMSLOW_FGC;
 681        tmslow &= ~B43legacy_TMSLOW_PHYRESET;
 682        ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
 683        ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
 684        msleep(1);
 685        tmslow &= ~SSB_TMSLOW_FGC;
 686        ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
 687        ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
 688        msleep(1);
 689
 690        /* Turn Analog ON */
 691        b43legacy_switch_analog(dev, 1);
 692
 693        macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 694        macctl &= ~B43legacy_MACCTL_GMODE;
 695        if (flags & B43legacy_TMSLOW_GMODE) {
 696                macctl |= B43legacy_MACCTL_GMODE;
 697                dev->phy.gmode = true;
 698        } else
 699                dev->phy.gmode = false;
 700        macctl |= B43legacy_MACCTL_IHR_ENABLED;
 701        b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
 702}
 703
 704static void handle_irq_transmit_status(struct b43legacy_wldev *dev)
 705{
 706        u32 v0;
 707        u32 v1;
 708        u16 tmp;
 709        struct b43legacy_txstatus stat;
 710
 711        while (1) {
 712                v0 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
 713                if (!(v0 & 0x00000001))
 714                        break;
 715                v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
 716
 717                stat.cookie = (v0 >> 16);
 718                stat.seq = (v1 & 0x0000FFFF);
 719                stat.phy_stat = ((v1 & 0x00FF0000) >> 16);
 720                tmp = (v0 & 0x0000FFFF);
 721                stat.frame_count = ((tmp & 0xF000) >> 12);
 722                stat.rts_count = ((tmp & 0x0F00) >> 8);
 723                stat.supp_reason = ((tmp & 0x001C) >> 2);
 724                stat.pm_indicated = !!(tmp & 0x0080);
 725                stat.intermediate = !!(tmp & 0x0040);
 726                stat.for_ampdu = !!(tmp & 0x0020);
 727                stat.acked = !!(tmp & 0x0002);
 728
 729                b43legacy_handle_txstatus(dev, &stat);
 730        }
 731}
 732
 733static void drain_txstatus_queue(struct b43legacy_wldev *dev)
 734{
 735        u32 dummy;
 736
 737        if (dev->dev->id.revision < 5)
 738                return;
 739        /* Read all entries from the microcode TXstatus FIFO
 740         * and throw them away.
 741         */
 742        while (1) {
 743                dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
 744                if (!(dummy & 0x00000001))
 745                        break;
 746                dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
 747        }
 748}
 749
 750static u32 b43legacy_jssi_read(struct b43legacy_wldev *dev)
 751{
 752        u32 val = 0;
 753
 754        val = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x40A);
 755        val <<= 16;
 756        val |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x408);
 757
 758        return val;
 759}
 760
 761static void b43legacy_jssi_write(struct b43legacy_wldev *dev, u32 jssi)
 762{
 763        b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x408,
 764                              (jssi & 0x0000FFFF));
 765        b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x40A,
 766                              (jssi & 0xFFFF0000) >> 16);
 767}
 768
 769static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev)
 770{
 771        b43legacy_jssi_write(dev, 0x7F7F7F7F);
 772        b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
 773                          b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
 774                          | B43legacy_MACCMD_BGNOISE);
 775        B43legacy_WARN_ON(dev->noisecalc.channel_at_start !=
 776                            dev->phy.channel);
 777}
 778
 779static void b43legacy_calculate_link_quality(struct b43legacy_wldev *dev)
 780{
 781        /* Top half of Link Quality calculation. */
 782
 783        if (dev->noisecalc.calculation_running)
 784                return;
 785        dev->noisecalc.channel_at_start = dev->phy.channel;
 786        dev->noisecalc.calculation_running = true;
 787        dev->noisecalc.nr_samples = 0;
 788
 789        b43legacy_generate_noise_sample(dev);
 790}
 791
 792static void handle_irq_noise(struct b43legacy_wldev *dev)
 793{
 794        struct b43legacy_phy *phy = &dev->phy;
 795        u16 tmp;
 796        u8 noise[4];
 797        u8 i;
 798        u8 j;
 799        s32 average;
 800
 801        /* Bottom half of Link Quality calculation. */
 802
 803        B43legacy_WARN_ON(!dev->noisecalc.calculation_running);
 804        if (dev->noisecalc.channel_at_start != phy->channel)
 805                goto drop_calculation;
 806        *((__le32 *)noise) = cpu_to_le32(b43legacy_jssi_read(dev));
 807        if (noise[0] == 0x7F || noise[1] == 0x7F ||
 808            noise[2] == 0x7F || noise[3] == 0x7F)
 809                goto generate_new;
 810
 811        /* Get the noise samples. */
 812        B43legacy_WARN_ON(dev->noisecalc.nr_samples >= 8);
 813        i = dev->noisecalc.nr_samples;
 814        noise[0] = clamp_val(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 815        noise[1] = clamp_val(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 816        noise[2] = clamp_val(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 817        noise[3] = clamp_val(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 818        dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]];
 819        dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]];
 820        dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]];
 821        dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]];
 822        dev->noisecalc.nr_samples++;
 823        if (dev->noisecalc.nr_samples == 8) {
 824                /* Calculate the Link Quality by the noise samples. */
 825                average = 0;
 826                for (i = 0; i < 8; i++) {
 827                        for (j = 0; j < 4; j++)
 828                                average += dev->noisecalc.samples[i][j];
 829                }
 830                average /= (8 * 4);
 831                average *= 125;
 832                average += 64;
 833                average /= 128;
 834                tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 835                                             0x40C);
 836                tmp = (tmp / 128) & 0x1F;
 837                if (tmp >= 8)
 838                        average += 2;
 839                else
 840                        average -= 25;
 841                if (tmp == 8)
 842                        average -= 72;
 843                else
 844                        average -= 48;
 845
 846                dev->stats.link_noise = average;
 847drop_calculation:
 848                dev->noisecalc.calculation_running = false;
 849                return;
 850        }
 851generate_new:
 852        b43legacy_generate_noise_sample(dev);
 853}
 854
 855static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev)
 856{
 857        if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_AP)) {
 858                /* TODO: PS TBTT */
 859        } else {
 860                if (1/*FIXME: the last PSpoll frame was sent successfully */)
 861                        b43legacy_power_saving_ctl_bits(dev, -1, -1);
 862        }
 863        if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC))
 864                dev->dfq_valid = true;
 865}
 866
 867static void handle_irq_atim_end(struct b43legacy_wldev *dev)
 868{
 869        if (dev->dfq_valid) {
 870                b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
 871                                  b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
 872                                  | B43legacy_MACCMD_DFQ_VALID);
 873                dev->dfq_valid = false;
 874        }
 875}
 876
 877static void handle_irq_pmq(struct b43legacy_wldev *dev)
 878{
 879        u32 tmp;
 880
 881        /* TODO: AP mode. */
 882
 883        while (1) {
 884                tmp = b43legacy_read32(dev, B43legacy_MMIO_PS_STATUS);
 885                if (!(tmp & 0x00000008))
 886                        break;
 887        }
 888        /* 16bit write is odd, but correct. */
 889        b43legacy_write16(dev, B43legacy_MMIO_PS_STATUS, 0x0002);
 890}
 891
 892static void b43legacy_write_template_common(struct b43legacy_wldev *dev,
 893                                            const u8 *data, u16 size,
 894                                            u16 ram_offset,
 895                                            u16 shm_size_offset, u8 rate)
 896{
 897        u32 i;
 898        u32 tmp;
 899        struct b43legacy_plcp_hdr4 plcp;
 900
 901        plcp.data = 0;
 902        b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
 903        b43legacy_ram_write(dev, ram_offset, le32_to_cpu(plcp.data));
 904        ram_offset += sizeof(u32);
 905        /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
 906         * So leave the first two bytes of the next write blank.
 907         */
 908        tmp = (u32)(data[0]) << 16;
 909        tmp |= (u32)(data[1]) << 24;
 910        b43legacy_ram_write(dev, ram_offset, tmp);
 911        ram_offset += sizeof(u32);
 912        for (i = 2; i < size; i += sizeof(u32)) {
 913                tmp = (u32)(data[i + 0]);
 914                if (i + 1 < size)
 915                        tmp |= (u32)(data[i + 1]) << 8;
 916                if (i + 2 < size)
 917                        tmp |= (u32)(data[i + 2]) << 16;
 918                if (i + 3 < size)
 919                        tmp |= (u32)(data[i + 3]) << 24;
 920                b43legacy_ram_write(dev, ram_offset + i - 2, tmp);
 921        }
 922        b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_size_offset,
 923                              size + sizeof(struct b43legacy_plcp_hdr6));
 924}
 925
 926/* Convert a b43legacy antenna number value to the PHY TX control value. */
 927static u16 b43legacy_antenna_to_phyctl(int antenna)
 928{
 929        switch (antenna) {
 930        case B43legacy_ANTENNA0:
 931                return B43legacy_TX4_PHY_ANT0;
 932        case B43legacy_ANTENNA1:
 933                return B43legacy_TX4_PHY_ANT1;
 934        }
 935        return B43legacy_TX4_PHY_ANTLAST;
 936}
 937
 938static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev,
 939                                            u16 ram_offset,
 940                                            u16 shm_size_offset)
 941{
 942
 943        unsigned int i, len, variable_len;
 944        const struct ieee80211_mgmt *bcn;
 945        const u8 *ie;
 946        bool tim_found = false;
 947        unsigned int rate;
 948        u16 ctl;
 949        int antenna;
 950        struct ieee80211_tx_info *info = IEEE80211_SKB_CB(dev->wl->current_beacon);
 951
 952        bcn = (const struct ieee80211_mgmt *)(dev->wl->current_beacon->data);
 953        len = min_t(size_t, dev->wl->current_beacon->len,
 954                  0x200 - sizeof(struct b43legacy_plcp_hdr6));
 955        rate = ieee80211_get_tx_rate(dev->wl->hw, info)->hw_value;
 956
 957        b43legacy_write_template_common(dev, (const u8 *)bcn, len, ram_offset,
 958                                        shm_size_offset, rate);
 959
 960        /* Write the PHY TX control parameters. */
 961        antenna = B43legacy_ANTENNA_DEFAULT;
 962        antenna = b43legacy_antenna_to_phyctl(antenna);
 963        ctl = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 964                                   B43legacy_SHM_SH_BEACPHYCTL);
 965        /* We can't send beacons with short preamble. Would get PHY errors. */
 966        ctl &= ~B43legacy_TX4_PHY_SHORTPRMBL;
 967        ctl &= ~B43legacy_TX4_PHY_ANT;
 968        ctl &= ~B43legacy_TX4_PHY_ENC;
 969        ctl |= antenna;
 970        ctl |= B43legacy_TX4_PHY_ENC_CCK;
 971        b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
 972                              B43legacy_SHM_SH_BEACPHYCTL, ctl);
 973
 974        /* Find the position of the TIM and the DTIM_period value
 975         * and write them to SHM. */
 976        ie = bcn->u.beacon.variable;
 977        variable_len = len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
 978        for (i = 0; i < variable_len - 2; ) {
 979                uint8_t ie_id, ie_len;
 980
 981                ie_id = ie[i];
 982                ie_len = ie[i + 1];
 983                if (ie_id == 5) {
 984                        u16 tim_position;
 985                        u16 dtim_period;
 986                        /* This is the TIM Information Element */
 987
 988                        /* Check whether the ie_len is in the beacon data range. */
 989                        if (variable_len < ie_len + 2 + i)
 990                                break;
 991                        /* A valid TIM is at least 4 bytes long. */
 992                        if (ie_len < 4)
 993                                break;
 994                        tim_found = true;
 995
 996                        tim_position = sizeof(struct b43legacy_plcp_hdr6);
 997                        tim_position += offsetof(struct ieee80211_mgmt,
 998                                                 u.beacon.variable);
 999                        tim_position += i;
1000
1001                        dtim_period = ie[i + 3];
1002
1003                        b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1004                                        B43legacy_SHM_SH_TIMPOS, tim_position);
1005                        b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1006                                        B43legacy_SHM_SH_DTIMP, dtim_period);
1007                        break;
1008                }
1009                i += ie_len + 2;
1010        }
1011        if (!tim_found) {
1012                b43legacywarn(dev->wl, "Did not find a valid TIM IE in the "
1013                              "beacon template packet. AP or IBSS operation "
1014                              "may be broken.\n");
1015        } else
1016                b43legacydbg(dev->wl, "Updated beacon template\n");
1017}
1018
1019static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev,
1020                                            u16 shm_offset, u16 size,
1021                                            struct ieee80211_rate *rate)
1022{
1023        struct b43legacy_plcp_hdr4 plcp;
1024        u32 tmp;
1025        __le16 dur;
1026
1027        plcp.data = 0;
1028        b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate->hw_value);
1029        dur = ieee80211_generic_frame_duration(dev->wl->hw,
1030                                               dev->wl->vif,
1031                                               NL80211_BAND_2GHZ,
1032                                               size,
1033                                               rate);
1034        /* Write PLCP in two parts and timing for packet transfer */
1035        tmp = le32_to_cpu(plcp.data);
1036        b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset,
1037                              tmp & 0xFFFF);
1038        b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 2,
1039                              tmp >> 16);
1040        b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 6,
1041                              le16_to_cpu(dur));
1042}
1043
1044/* Instead of using custom probe response template, this function
1045 * just patches custom beacon template by:
1046 * 1) Changing packet type
1047 * 2) Patching duration field
1048 * 3) Stripping TIM
1049 */
1050static const u8 *b43legacy_generate_probe_resp(struct b43legacy_wldev *dev,
1051                                               u16 *dest_size,
1052                                               struct ieee80211_rate *rate)
1053{
1054        const u8 *src_data;
1055        u8 *dest_data;
1056        u16 src_size, elem_size, src_pos, dest_pos;
1057        __le16 dur;
1058        struct ieee80211_hdr *hdr;
1059        size_t ie_start;
1060
1061        src_size = dev->wl->current_beacon->len;
1062        src_data = (const u8 *)dev->wl->current_beacon->data;
1063
1064        /* Get the start offset of the variable IEs in the packet. */
1065        ie_start = offsetof(struct ieee80211_mgmt, u.probe_resp.variable);
1066        B43legacy_WARN_ON(ie_start != offsetof(struct ieee80211_mgmt,
1067                                               u.beacon.variable));
1068
1069        if (B43legacy_WARN_ON(src_size < ie_start))
1070                return NULL;
1071
1072        dest_data = kmalloc(src_size, GFP_ATOMIC);
1073        if (unlikely(!dest_data))
1074                return NULL;
1075
1076        /* Copy the static data and all Information Elements, except the TIM. */
1077        memcpy(dest_data, src_data, ie_start);
1078        src_pos = ie_start;
1079        dest_pos = ie_start;
1080        for ( ; src_pos < src_size - 2; src_pos += elem_size) {
1081                elem_size = src_data[src_pos + 1] + 2;
1082                if (src_data[src_pos] == 5) {
1083                        /* This is the TIM. */
1084                        continue;
1085                }
1086                memcpy(dest_data + dest_pos, src_data + src_pos, elem_size);
1087                dest_pos += elem_size;
1088        }
1089        *dest_size = dest_pos;
1090        hdr = (struct ieee80211_hdr *)dest_data;
1091
1092        /* Set the frame control. */
1093        hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
1094                                         IEEE80211_STYPE_PROBE_RESP);
1095        dur = ieee80211_generic_frame_duration(dev->wl->hw,
1096                                               dev->wl->vif,
1097                                               NL80211_BAND_2GHZ,
1098                                               *dest_size,
1099                                               rate);
1100        hdr->duration_id = dur;
1101
1102        return dest_data;
1103}
1104
1105static void b43legacy_write_probe_resp_template(struct b43legacy_wldev *dev,
1106                                                u16 ram_offset,
1107                                                u16 shm_size_offset,
1108                                                struct ieee80211_rate *rate)
1109{
1110        const u8 *probe_resp_data;
1111        u16 size;
1112
1113        size = dev->wl->current_beacon->len;
1114        probe_resp_data = b43legacy_generate_probe_resp(dev, &size, rate);
1115        if (unlikely(!probe_resp_data))
1116                return;
1117
1118        /* Looks like PLCP headers plus packet timings are stored for
1119         * all possible basic rates
1120         */
1121        b43legacy_write_probe_resp_plcp(dev, 0x31A, size,
1122                                        &b43legacy_b_ratetable[0]);
1123        b43legacy_write_probe_resp_plcp(dev, 0x32C, size,
1124                                        &b43legacy_b_ratetable[1]);
1125        b43legacy_write_probe_resp_plcp(dev, 0x33E, size,
1126                                        &b43legacy_b_ratetable[2]);
1127        b43legacy_write_probe_resp_plcp(dev, 0x350, size,
1128                                        &b43legacy_b_ratetable[3]);
1129
1130        size = min_t(size_t, size,
1131                   0x200 - sizeof(struct b43legacy_plcp_hdr6));
1132        b43legacy_write_template_common(dev, probe_resp_data,
1133                                        size, ram_offset,
1134                                        shm_size_offset, rate->hw_value);
1135        kfree(probe_resp_data);
1136}
1137
1138static void b43legacy_upload_beacon0(struct b43legacy_wldev *dev)
1139{
1140        struct b43legacy_wl *wl = dev->wl;
1141
1142        if (wl->beacon0_uploaded)
1143                return;
1144        b43legacy_write_beacon_template(dev, 0x68, 0x18);
1145        /* FIXME: Probe resp upload doesn't really belong here,
1146         *        but we don't use that feature anyway. */
1147        b43legacy_write_probe_resp_template(dev, 0x268, 0x4A,
1148                                      &__b43legacy_ratetable[3]);
1149        wl->beacon0_uploaded = true;
1150}
1151
1152static void b43legacy_upload_beacon1(struct b43legacy_wldev *dev)
1153{
1154        struct b43legacy_wl *wl = dev->wl;
1155
1156        if (wl->beacon1_uploaded)
1157                return;
1158        b43legacy_write_beacon_template(dev, 0x468, 0x1A);
1159        wl->beacon1_uploaded = true;
1160}
1161
1162static void handle_irq_beacon(struct b43legacy_wldev *dev)
1163{
1164        struct b43legacy_wl *wl = dev->wl;
1165        u32 cmd, beacon0_valid, beacon1_valid;
1166
1167        if (!b43legacy_is_mode(wl, NL80211_IFTYPE_AP))
1168                return;
1169
1170        /* This is the bottom half of the asynchronous beacon update. */
1171
1172        /* Ignore interrupt in the future. */
1173        dev->irq_mask &= ~B43legacy_IRQ_BEACON;
1174
1175        cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1176        beacon0_valid = (cmd & B43legacy_MACCMD_BEACON0_VALID);
1177        beacon1_valid = (cmd & B43legacy_MACCMD_BEACON1_VALID);
1178
1179        /* Schedule interrupt manually, if busy. */
1180        if (beacon0_valid && beacon1_valid) {
1181                b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, B43legacy_IRQ_BEACON);
1182                dev->irq_mask |= B43legacy_IRQ_BEACON;
1183                return;
1184        }
1185
1186        if (unlikely(wl->beacon_templates_virgin)) {
1187                /* We never uploaded a beacon before.
1188                 * Upload both templates now, but only mark one valid. */
1189                wl->beacon_templates_virgin = false;
1190                b43legacy_upload_beacon0(dev);
1191                b43legacy_upload_beacon1(dev);
1192                cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1193                cmd |= B43legacy_MACCMD_BEACON0_VALID;
1194                b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1195        } else {
1196                if (!beacon0_valid) {
1197                        b43legacy_upload_beacon0(dev);
1198                        cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1199                        cmd |= B43legacy_MACCMD_BEACON0_VALID;
1200                        b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1201                } else if (!beacon1_valid) {
1202                        b43legacy_upload_beacon1(dev);
1203                        cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1204                        cmd |= B43legacy_MACCMD_BEACON1_VALID;
1205                        b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1206                }
1207        }
1208}
1209
1210static void b43legacy_beacon_update_trigger_work(struct work_struct *work)
1211{
1212        struct b43legacy_wl *wl = container_of(work, struct b43legacy_wl,
1213                                         beacon_update_trigger);
1214        struct b43legacy_wldev *dev;
1215
1216        mutex_lock(&wl->mutex);
1217        dev = wl->current_dev;
1218        if (likely(dev && (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED))) {
1219                spin_lock_irq(&wl->irq_lock);
1220                /* Update beacon right away or defer to IRQ. */
1221                handle_irq_beacon(dev);
1222                /* The handler might have updated the IRQ mask. */
1223                b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK,
1224                                  dev->irq_mask);
1225                spin_unlock_irq(&wl->irq_lock);
1226        }
1227        mutex_unlock(&wl->mutex);
1228}
1229
1230/* Asynchronously update the packet templates in template RAM.
1231 * Locking: Requires wl->irq_lock to be locked. */
1232static void b43legacy_update_templates(struct b43legacy_wl *wl)
1233{
1234        struct sk_buff *beacon;
1235        /* This is the top half of the ansynchronous beacon update. The bottom
1236         * half is the beacon IRQ. Beacon update must be asynchronous to avoid
1237         * sending an invalid beacon. This can happen for example, if the
1238         * firmware transmits a beacon while we are updating it. */
1239
1240        /* We could modify the existing beacon and set the aid bit in the TIM
1241         * field, but that would probably require resizing and moving of data
1242         * within the beacon template. Simply request a new beacon and let
1243         * mac80211 do the hard work. */
1244        beacon = ieee80211_beacon_get(wl->hw, wl->vif);
1245        if (unlikely(!beacon))
1246                return;
1247
1248        if (wl->current_beacon)
1249                dev_kfree_skb_any(wl->current_beacon);
1250        wl->current_beacon = beacon;
1251        wl->beacon0_uploaded = false;
1252        wl->beacon1_uploaded = false;
1253        ieee80211_queue_work(wl->hw, &wl->beacon_update_trigger);
1254}
1255
1256static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev,
1257                                     u16 beacon_int)
1258{
1259        b43legacy_time_lock(dev);
1260        if (dev->dev->id.revision >= 3) {
1261                b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_REP,
1262                                 (beacon_int << 16));
1263                b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_START,
1264                                 (beacon_int << 10));
1265        } else {
1266                b43legacy_write16(dev, 0x606, (beacon_int >> 6));
1267                b43legacy_write16(dev, 0x610, beacon_int);
1268        }
1269        b43legacy_time_unlock(dev);
1270        b43legacydbg(dev->wl, "Set beacon interval to %u\n", beacon_int);
1271}
1272
1273static void handle_irq_ucode_debug(struct b43legacy_wldev *dev)
1274{
1275}
1276
1277/* Interrupt handler bottom-half */
1278static void b43legacy_interrupt_tasklet(struct b43legacy_wldev *dev)
1279{
1280        u32 reason;
1281        u32 dma_reason[ARRAY_SIZE(dev->dma_reason)];
1282        u32 merged_dma_reason = 0;
1283        int i;
1284        unsigned long flags;
1285
1286        spin_lock_irqsave(&dev->wl->irq_lock, flags);
1287
1288        B43legacy_WARN_ON(b43legacy_status(dev) <
1289                          B43legacy_STAT_INITIALIZED);
1290
1291        reason = dev->irq_reason;
1292        for (i = 0; i < ARRAY_SIZE(dma_reason); i++) {
1293                dma_reason[i] = dev->dma_reason[i];
1294                merged_dma_reason |= dma_reason[i];
1295        }
1296
1297        if (unlikely(reason & B43legacy_IRQ_MAC_TXERR))
1298                b43legacyerr(dev->wl, "MAC transmission error\n");
1299
1300        if (unlikely(reason & B43legacy_IRQ_PHY_TXERR)) {
1301                b43legacyerr(dev->wl, "PHY transmission error\n");
1302                rmb();
1303                if (unlikely(atomic_dec_and_test(&dev->phy.txerr_cnt))) {
1304                        b43legacyerr(dev->wl, "Too many PHY TX errors, "
1305                                              "restarting the controller\n");
1306                        b43legacy_controller_restart(dev, "PHY TX errors");
1307                }
1308        }
1309
1310        if (unlikely(merged_dma_reason & (B43legacy_DMAIRQ_FATALMASK |
1311                                          B43legacy_DMAIRQ_NONFATALMASK))) {
1312                if (merged_dma_reason & B43legacy_DMAIRQ_FATALMASK) {
1313                        b43legacyerr(dev->wl, "Fatal DMA error: "
1314                               "0x%08X, 0x%08X, 0x%08X, "
1315                               "0x%08X, 0x%08X, 0x%08X\n",
1316                               dma_reason[0], dma_reason[1],
1317                               dma_reason[2], dma_reason[3],
1318                               dma_reason[4], dma_reason[5]);
1319                        b43legacy_controller_restart(dev, "DMA error");
1320                        spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1321                        return;
1322                }
1323                if (merged_dma_reason & B43legacy_DMAIRQ_NONFATALMASK)
1324                        b43legacyerr(dev->wl, "DMA error: "
1325                               "0x%08X, 0x%08X, 0x%08X, "
1326                               "0x%08X, 0x%08X, 0x%08X\n",
1327                               dma_reason[0], dma_reason[1],
1328                               dma_reason[2], dma_reason[3],
1329                               dma_reason[4], dma_reason[5]);
1330        }
1331
1332        if (unlikely(reason & B43legacy_IRQ_UCODE_DEBUG))
1333                handle_irq_ucode_debug(dev);
1334        if (reason & B43legacy_IRQ_TBTT_INDI)
1335                handle_irq_tbtt_indication(dev);
1336        if (reason & B43legacy_IRQ_ATIM_END)
1337                handle_irq_atim_end(dev);
1338        if (reason & B43legacy_IRQ_BEACON)
1339                handle_irq_beacon(dev);
1340        if (reason & B43legacy_IRQ_PMQ)
1341                handle_irq_pmq(dev);
1342        if (reason & B43legacy_IRQ_TXFIFO_FLUSH_OK)
1343                ;/*TODO*/
1344        if (reason & B43legacy_IRQ_NOISESAMPLE_OK)
1345                handle_irq_noise(dev);
1346
1347        /* Check the DMA reason registers for received data. */
1348        if (dma_reason[0] & B43legacy_DMAIRQ_RX_DONE) {
1349                if (b43legacy_using_pio(dev))
1350                        b43legacy_pio_rx(dev->pio.queue0);
1351                else
1352                        b43legacy_dma_rx(dev->dma.rx_ring0);
1353        }
1354        B43legacy_WARN_ON(dma_reason[1] & B43legacy_DMAIRQ_RX_DONE);
1355        B43legacy_WARN_ON(dma_reason[2] & B43legacy_DMAIRQ_RX_DONE);
1356        if (dma_reason[3] & B43legacy_DMAIRQ_RX_DONE) {
1357                if (b43legacy_using_pio(dev))
1358                        b43legacy_pio_rx(dev->pio.queue3);
1359                else
1360                        b43legacy_dma_rx(dev->dma.rx_ring3);
1361        }
1362        B43legacy_WARN_ON(dma_reason[4] & B43legacy_DMAIRQ_RX_DONE);
1363        B43legacy_WARN_ON(dma_reason[5] & B43legacy_DMAIRQ_RX_DONE);
1364
1365        if (reason & B43legacy_IRQ_TX_OK)
1366                handle_irq_transmit_status(dev);
1367
1368        b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
1369        spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1370}
1371
1372static void pio_irq_workaround(struct b43legacy_wldev *dev,
1373                               u16 base, int queueidx)
1374{
1375        u16 rxctl;
1376
1377        rxctl = b43legacy_read16(dev, base + B43legacy_PIO_RXCTL);
1378        if (rxctl & B43legacy_PIO_RXCTL_DATAAVAILABLE)
1379                dev->dma_reason[queueidx] |= B43legacy_DMAIRQ_RX_DONE;
1380        else
1381                dev->dma_reason[queueidx] &= ~B43legacy_DMAIRQ_RX_DONE;
1382}
1383
1384static void b43legacy_interrupt_ack(struct b43legacy_wldev *dev, u32 reason)
1385{
1386        if (b43legacy_using_pio(dev) &&
1387            (dev->dev->id.revision < 3) &&
1388            (!(reason & B43legacy_IRQ_PIO_WORKAROUND))) {
1389                /* Apply a PIO specific workaround to the dma_reasons */
1390                pio_irq_workaround(dev, B43legacy_MMIO_PIO1_BASE, 0);
1391                pio_irq_workaround(dev, B43legacy_MMIO_PIO2_BASE, 1);
1392                pio_irq_workaround(dev, B43legacy_MMIO_PIO3_BASE, 2);
1393                pio_irq_workaround(dev, B43legacy_MMIO_PIO4_BASE, 3);
1394        }
1395
1396        b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, reason);
1397
1398        b43legacy_write32(dev, B43legacy_MMIO_DMA0_REASON,
1399                          dev->dma_reason[0]);
1400        b43legacy_write32(dev, B43legacy_MMIO_DMA1_REASON,
1401                          dev->dma_reason[1]);
1402        b43legacy_write32(dev, B43legacy_MMIO_DMA2_REASON,
1403                          dev->dma_reason[2]);
1404        b43legacy_write32(dev, B43legacy_MMIO_DMA3_REASON,
1405                          dev->dma_reason[3]);
1406        b43legacy_write32(dev, B43legacy_MMIO_DMA4_REASON,
1407                          dev->dma_reason[4]);
1408        b43legacy_write32(dev, B43legacy_MMIO_DMA5_REASON,
1409                          dev->dma_reason[5]);
1410}
1411
1412/* Interrupt handler top-half */
1413static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id)
1414{
1415        irqreturn_t ret = IRQ_NONE;
1416        struct b43legacy_wldev *dev = dev_id;
1417        u32 reason;
1418
1419        B43legacy_WARN_ON(!dev);
1420
1421        spin_lock(&dev->wl->irq_lock);
1422
1423        if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED))
1424                /* This can only happen on shared IRQ lines. */
1425                goto out;
1426        reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1427        if (reason == 0xffffffff) /* shared IRQ */
1428                goto out;
1429        ret = IRQ_HANDLED;
1430        reason &= dev->irq_mask;
1431        if (!reason)
1432                goto out;
1433
1434        dev->dma_reason[0] = b43legacy_read32(dev,
1435                                              B43legacy_MMIO_DMA0_REASON)
1436                                              & 0x0001DC00;
1437        dev->dma_reason[1] = b43legacy_read32(dev,
1438                                              B43legacy_MMIO_DMA1_REASON)
1439                                              & 0x0000DC00;
1440        dev->dma_reason[2] = b43legacy_read32(dev,
1441                                              B43legacy_MMIO_DMA2_REASON)
1442                                              & 0x0000DC00;
1443        dev->dma_reason[3] = b43legacy_read32(dev,
1444                                              B43legacy_MMIO_DMA3_REASON)
1445                                              & 0x0001DC00;
1446        dev->dma_reason[4] = b43legacy_read32(dev,
1447                                              B43legacy_MMIO_DMA4_REASON)
1448                                              & 0x0000DC00;
1449        dev->dma_reason[5] = b43legacy_read32(dev,
1450                                              B43legacy_MMIO_DMA5_REASON)
1451                                              & 0x0000DC00;
1452
1453        b43legacy_interrupt_ack(dev, reason);
1454        /* Disable all IRQs. They are enabled again in the bottom half. */
1455        b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
1456        /* Save the reason code and call our bottom half. */
1457        dev->irq_reason = reason;
1458        tasklet_schedule(&dev->isr_tasklet);
1459out:
1460        spin_unlock(&dev->wl->irq_lock);
1461
1462        return ret;
1463}
1464
1465static void b43legacy_release_firmware(struct b43legacy_wldev *dev)
1466{
1467        release_firmware(dev->fw.ucode);
1468        dev->fw.ucode = NULL;
1469        release_firmware(dev->fw.pcm);
1470        dev->fw.pcm = NULL;
1471        release_firmware(dev->fw.initvals);
1472        dev->fw.initvals = NULL;
1473        release_firmware(dev->fw.initvals_band);
1474        dev->fw.initvals_band = NULL;
1475}
1476
1477static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl)
1478{
1479        b43legacyerr(wl, "You must go to http://wireless.kernel.org/en/users/"
1480                     "Drivers/b43#devicefirmware "
1481                     "and download the correct firmware (version 3).\n");
1482}
1483
1484static void b43legacy_fw_cb(const struct firmware *firmware, void *context)
1485{
1486        struct b43legacy_wldev *dev = context;
1487
1488        dev->fwp = firmware;
1489        complete(&dev->fw_load_complete);
1490}
1491
1492static int do_request_fw(struct b43legacy_wldev *dev,
1493                         const char *name,
1494                         const struct firmware **fw, bool async)
1495{
1496        char path[sizeof(modparam_fwpostfix) + 32];
1497        struct b43legacy_fw_header *hdr;
1498        u32 size;
1499        int err;
1500
1501        if (!name)
1502                return 0;
1503
1504        snprintf(path, ARRAY_SIZE(path),
1505                 "b43legacy%s/%s.fw",
1506                 modparam_fwpostfix, name);
1507        b43legacyinfo(dev->wl, "Loading firmware %s\n", path);
1508        if (async) {
1509                init_completion(&dev->fw_load_complete);
1510                err = request_firmware_nowait(THIS_MODULE, 1, path,
1511                                              dev->dev->dev, GFP_KERNEL,
1512                                              dev, b43legacy_fw_cb);
1513                if (err) {
1514                        b43legacyerr(dev->wl, "Unable to load firmware\n");
1515                        return err;
1516                }
1517                /* stall here until fw ready */
1518                wait_for_completion(&dev->fw_load_complete);
1519                if (!dev->fwp)
1520                        err = -EINVAL;
1521                *fw = dev->fwp;
1522        } else {
1523                err = request_firmware(fw, path, dev->dev->dev);
1524        }
1525        if (err) {
1526                b43legacyerr(dev->wl, "Firmware file \"%s\" not found "
1527                       "or load failed.\n", path);
1528                return err;
1529        }
1530        if ((*fw)->size < sizeof(struct b43legacy_fw_header))
1531                goto err_format;
1532        hdr = (struct b43legacy_fw_header *)((*fw)->data);
1533        switch (hdr->type) {
1534        case B43legacy_FW_TYPE_UCODE:
1535        case B43legacy_FW_TYPE_PCM:
1536                size = be32_to_cpu(hdr->size);
1537                if (size != (*fw)->size - sizeof(struct b43legacy_fw_header))
1538                        goto err_format;
1539                /* fallthrough */
1540        case B43legacy_FW_TYPE_IV:
1541                if (hdr->ver != 1)
1542                        goto err_format;
1543                break;
1544        default:
1545                goto err_format;
1546        }
1547
1548        return err;
1549
1550err_format:
1551        b43legacyerr(dev->wl, "Firmware file \"%s\" format error.\n", path);
1552        return -EPROTO;
1553}
1554
1555static int b43legacy_one_core_attach(struct ssb_device *dev,
1556                                     struct b43legacy_wl *wl);
1557static void b43legacy_one_core_detach(struct ssb_device *dev);
1558
1559static void b43legacy_request_firmware(struct work_struct *work)
1560{
1561        struct b43legacy_wl *wl = container_of(work,
1562                                  struct b43legacy_wl, firmware_load);
1563        struct b43legacy_wldev *dev = wl->current_dev;
1564        struct b43legacy_firmware *fw = &dev->fw;
1565        const u8 rev = dev->dev->id.revision;
1566        const char *filename;
1567        int err;
1568
1569        if (!fw->ucode) {
1570                if (rev == 2)
1571                        filename = "ucode2";
1572                else if (rev == 4)
1573                        filename = "ucode4";
1574                else
1575                        filename = "ucode5";
1576                err = do_request_fw(dev, filename, &fw->ucode, true);
1577                if (err)
1578                        goto err_load;
1579        }
1580        if (!fw->pcm) {
1581                if (rev < 5)
1582                        filename = "pcm4";
1583                else
1584                        filename = "pcm5";
1585                err = do_request_fw(dev, filename, &fw->pcm, false);
1586                if (err)
1587                        goto err_load;
1588        }
1589        if (!fw->initvals) {
1590                switch (dev->phy.type) {
1591                case B43legacy_PHYTYPE_B:
1592                case B43legacy_PHYTYPE_G:
1593                        if ((rev >= 5) && (rev <= 10))
1594                                filename = "b0g0initvals5";
1595                        else if (rev == 2 || rev == 4)
1596                                filename = "b0g0initvals2";
1597                        else
1598                                goto err_no_initvals;
1599                        break;
1600                default:
1601                        goto err_no_initvals;
1602                }
1603                err = do_request_fw(dev, filename, &fw->initvals, false);
1604                if (err)
1605                        goto err_load;
1606        }
1607        if (!fw->initvals_band) {
1608                switch (dev->phy.type) {
1609                case B43legacy_PHYTYPE_B:
1610                case B43legacy_PHYTYPE_G:
1611                        if ((rev >= 5) && (rev <= 10))
1612                                filename = "b0g0bsinitvals5";
1613                        else if (rev >= 11)
1614                                filename = NULL;
1615                        else if (rev == 2 || rev == 4)
1616                                filename = NULL;
1617                        else
1618                                goto err_no_initvals;
1619                        break;
1620                default:
1621                        goto err_no_initvals;
1622                }
1623                err = do_request_fw(dev, filename, &fw->initvals_band, false);
1624                if (err)
1625                        goto err_load;
1626        }
1627        err = ieee80211_register_hw(wl->hw);
1628        if (err)
1629                goto err_one_core_detach;
1630        return;
1631
1632err_one_core_detach:
1633        b43legacy_one_core_detach(dev->dev);
1634        goto error;
1635
1636err_load:
1637        b43legacy_print_fw_helptext(dev->wl);
1638        goto error;
1639
1640err_no_initvals:
1641        err = -ENODEV;
1642        b43legacyerr(dev->wl, "No Initial Values firmware file for PHY %u, "
1643               "core rev %u\n", dev->phy.type, rev);
1644        goto error;
1645
1646error:
1647        b43legacy_release_firmware(dev);
1648        return;
1649}
1650
1651static int b43legacy_upload_microcode(struct b43legacy_wldev *dev)
1652{
1653        struct wiphy *wiphy = dev->wl->hw->wiphy;
1654        const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1655        const __be32 *data;
1656        unsigned int i;
1657        unsigned int len;
1658        u16 fwrev;
1659        u16 fwpatch;
1660        u16 fwdate;
1661        u16 fwtime;
1662        u32 tmp, macctl;
1663        int err = 0;
1664
1665        /* Jump the microcode PSM to offset 0 */
1666        macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1667        B43legacy_WARN_ON(macctl & B43legacy_MACCTL_PSM_RUN);
1668        macctl |= B43legacy_MACCTL_PSM_JMP0;
1669        b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1670        /* Zero out all microcode PSM registers and shared memory. */
1671        for (i = 0; i < 64; i++)
1672                b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, i, 0);
1673        for (i = 0; i < 4096; i += 2)
1674                b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, i, 0);
1675
1676        /* Upload Microcode. */
1677        data = (__be32 *) (dev->fw.ucode->data + hdr_len);
1678        len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32);
1679        b43legacy_shm_control_word(dev,
1680                                   B43legacy_SHM_UCODE |
1681                                   B43legacy_SHM_AUTOINC_W,
1682                                   0x0000);
1683        for (i = 0; i < len; i++) {
1684                b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1685                                    be32_to_cpu(data[i]));
1686                udelay(10);
1687        }
1688
1689        if (dev->fw.pcm) {
1690                /* Upload PCM data. */
1691                data = (__be32 *) (dev->fw.pcm->data + hdr_len);
1692                len = (dev->fw.pcm->size - hdr_len) / sizeof(__be32);
1693                b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EA);
1694                b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 0x00004000);
1695                /* No need for autoinc bit in SHM_HW */
1696                b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EB);
1697                for (i = 0; i < len; i++) {
1698                        b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1699                                          be32_to_cpu(data[i]));
1700                        udelay(10);
1701                }
1702        }
1703
1704        b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1705                          B43legacy_IRQ_ALL);
1706
1707        /* Start the microcode PSM */
1708        macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1709        macctl &= ~B43legacy_MACCTL_PSM_JMP0;
1710        macctl |= B43legacy_MACCTL_PSM_RUN;
1711        b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1712
1713        /* Wait for the microcode to load and respond */
1714        i = 0;
1715        while (1) {
1716                tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1717                if (tmp == B43legacy_IRQ_MAC_SUSPENDED)
1718                        break;
1719                i++;
1720                if (i >= B43legacy_IRQWAIT_MAX_RETRIES) {
1721                        b43legacyerr(dev->wl, "Microcode not responding\n");
1722                        b43legacy_print_fw_helptext(dev->wl);
1723                        err = -ENODEV;
1724                        goto error;
1725                }
1726                msleep_interruptible(50);
1727                if (signal_pending(current)) {
1728                        err = -EINTR;
1729                        goto error;
1730                }
1731        }
1732        /* dummy read follows */
1733        b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1734
1735        /* Get and check the revisions. */
1736        fwrev = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1737                                     B43legacy_SHM_SH_UCODEREV);
1738        fwpatch = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1739                                       B43legacy_SHM_SH_UCODEPATCH);
1740        fwdate = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1741                                      B43legacy_SHM_SH_UCODEDATE);
1742        fwtime = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1743                                      B43legacy_SHM_SH_UCODETIME);
1744
1745        if (fwrev > 0x128) {
1746                b43legacyerr(dev->wl, "YOU ARE TRYING TO LOAD V4 FIRMWARE."
1747                             " Only firmware from binary drivers version 3.x"
1748                             " is supported. You must change your firmware"
1749                             " files.\n");
1750                b43legacy_print_fw_helptext(dev->wl);
1751                err = -EOPNOTSUPP;
1752                goto error;
1753        }
1754        b43legacyinfo(dev->wl, "Loading firmware version 0x%X, patch level %u "
1755                      "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch,
1756                      (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF,
1757                      (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F,
1758                      fwtime & 0x1F);
1759
1760        dev->fw.rev = fwrev;
1761        dev->fw.patch = fwpatch;
1762
1763        snprintf(wiphy->fw_version, sizeof(wiphy->fw_version), "%u.%u",
1764                        dev->fw.rev, dev->fw.patch);
1765        wiphy->hw_version = dev->dev->id.coreid;
1766
1767        return 0;
1768
1769error:
1770        macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1771        macctl &= ~B43legacy_MACCTL_PSM_RUN;
1772        macctl |= B43legacy_MACCTL_PSM_JMP0;
1773        b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1774
1775        return err;
1776}
1777
1778static int b43legacy_write_initvals(struct b43legacy_wldev *dev,
1779                                    const struct b43legacy_iv *ivals,
1780                                    size_t count,
1781                                    size_t array_size)
1782{
1783        const struct b43legacy_iv *iv;
1784        u16 offset;
1785        size_t i;
1786        bool bit32;
1787
1788        BUILD_BUG_ON(sizeof(struct b43legacy_iv) != 6);
1789        iv = ivals;
1790        for (i = 0; i < count; i++) {
1791                if (array_size < sizeof(iv->offset_size))
1792                        goto err_format;
1793                array_size -= sizeof(iv->offset_size);
1794                offset = be16_to_cpu(iv->offset_size);
1795                bit32 = !!(offset & B43legacy_IV_32BIT);
1796                offset &= B43legacy_IV_OFFSET_MASK;
1797                if (offset >= 0x1000)
1798                        goto err_format;
1799                if (bit32) {
1800                        u32 value;
1801
1802                        if (array_size < sizeof(iv->data.d32))
1803                                goto err_format;
1804                        array_size -= sizeof(iv->data.d32);
1805
1806                        value = get_unaligned_be32(&iv->data.d32);
1807                        b43legacy_write32(dev, offset, value);
1808
1809                        iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1810                                                        sizeof(__be16) +
1811                                                        sizeof(__be32));
1812                } else {
1813                        u16 value;
1814
1815                        if (array_size < sizeof(iv->data.d16))
1816                                goto err_format;
1817                        array_size -= sizeof(iv->data.d16);
1818
1819                        value = be16_to_cpu(iv->data.d16);
1820                        b43legacy_write16(dev, offset, value);
1821
1822                        iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1823                                                        sizeof(__be16) +
1824                                                        sizeof(__be16));
1825                }
1826        }
1827        if (array_size)
1828                goto err_format;
1829
1830        return 0;
1831
1832err_format:
1833        b43legacyerr(dev->wl, "Initial Values Firmware file-format error.\n");
1834        b43legacy_print_fw_helptext(dev->wl);
1835
1836        return -EPROTO;
1837}
1838
1839static int b43legacy_upload_initvals(struct b43legacy_wldev *dev)
1840{
1841        const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1842        const struct b43legacy_fw_header *hdr;
1843        struct b43legacy_firmware *fw = &dev->fw;
1844        const struct b43legacy_iv *ivals;
1845        size_t count;
1846        int err;
1847
1848        hdr = (const struct b43legacy_fw_header *)(fw->initvals->data);
1849        ivals = (const struct b43legacy_iv *)(fw->initvals->data + hdr_len);
1850        count = be32_to_cpu(hdr->size);
1851        err = b43legacy_write_initvals(dev, ivals, count,
1852                                 fw->initvals->size - hdr_len);
1853        if (err)
1854                goto out;
1855        if (fw->initvals_band) {
1856                hdr = (const struct b43legacy_fw_header *)
1857                      (fw->initvals_band->data);
1858                ivals = (const struct b43legacy_iv *)(fw->initvals_band->data
1859                        + hdr_len);
1860                count = be32_to_cpu(hdr->size);
1861                err = b43legacy_write_initvals(dev, ivals, count,
1862                                         fw->initvals_band->size - hdr_len);
1863                if (err)
1864                        goto out;
1865        }
1866out:
1867
1868        return err;
1869}
1870
1871/* Initialize the GPIOs
1872 * http://bcm-specs.sipsolutions.net/GPIO
1873 */
1874static int b43legacy_gpio_init(struct b43legacy_wldev *dev)
1875{
1876        struct ssb_bus *bus = dev->dev->bus;
1877        struct ssb_device *gpiodev, *pcidev = NULL;
1878        u32 mask;
1879        u32 set;
1880
1881        b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1882                          b43legacy_read32(dev,
1883                          B43legacy_MMIO_MACCTL)
1884                          & 0xFFFF3FFF);
1885
1886        b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1887                          b43legacy_read16(dev,
1888                          B43legacy_MMIO_GPIO_MASK)
1889                          | 0x000F);
1890
1891        mask = 0x0000001F;
1892        set = 0x0000000F;
1893        if (dev->dev->bus->chip_id == 0x4301) {
1894                mask |= 0x0060;
1895                set |= 0x0060;
1896        }
1897        if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_PACTRL) {
1898                b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1899                                  b43legacy_read16(dev,
1900                                  B43legacy_MMIO_GPIO_MASK)
1901                                  | 0x0200);
1902                mask |= 0x0200;
1903                set |= 0x0200;
1904        }
1905        if (dev->dev->id.revision >= 2)
1906                mask  |= 0x0010; /* FIXME: This is redundant. */
1907
1908#ifdef CONFIG_SSB_DRIVER_PCICORE
1909        pcidev = bus->pcicore.dev;
1910#endif
1911        gpiodev = bus->chipco.dev ? : pcidev;
1912        if (!gpiodev)
1913                return 0;
1914        ssb_write32(gpiodev, B43legacy_GPIO_CONTROL,
1915                    (ssb_read32(gpiodev, B43legacy_GPIO_CONTROL)
1916                     & ~mask) | set);
1917
1918        return 0;
1919}
1920
1921/* Turn off all GPIO stuff. Call this on module unload, for example. */
1922static void b43legacy_gpio_cleanup(struct b43legacy_wldev *dev)
1923{
1924        struct ssb_bus *bus = dev->dev->bus;
1925        struct ssb_device *gpiodev, *pcidev = NULL;
1926
1927#ifdef CONFIG_SSB_DRIVER_PCICORE
1928        pcidev = bus->pcicore.dev;
1929#endif
1930        gpiodev = bus->chipco.dev ? : pcidev;
1931        if (!gpiodev)
1932                return;
1933        ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 0);
1934}
1935
1936/* http://bcm-specs.sipsolutions.net/EnableMac */
1937void b43legacy_mac_enable(struct b43legacy_wldev *dev)
1938{
1939        dev->mac_suspended--;
1940        B43legacy_WARN_ON(dev->mac_suspended < 0);
1941        B43legacy_WARN_ON(irqs_disabled());
1942        if (dev->mac_suspended == 0) {
1943                b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1944                                  b43legacy_read32(dev,
1945                                  B43legacy_MMIO_MACCTL)
1946                                  | B43legacy_MACCTL_ENABLED);
1947                b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1948                                  B43legacy_IRQ_MAC_SUSPENDED);
1949                /* the next two are dummy reads */
1950                b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1951                b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1952                b43legacy_power_saving_ctl_bits(dev, -1, -1);
1953
1954                /* Re-enable IRQs. */
1955                spin_lock_irq(&dev->wl->irq_lock);
1956                b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK,
1957                                  dev->irq_mask);
1958                spin_unlock_irq(&dev->wl->irq_lock);
1959        }
1960}
1961
1962/* http://bcm-specs.sipsolutions.net/SuspendMAC */
1963void b43legacy_mac_suspend(struct b43legacy_wldev *dev)
1964{
1965        int i;
1966        u32 tmp;
1967
1968        might_sleep();
1969        B43legacy_WARN_ON(irqs_disabled());
1970        B43legacy_WARN_ON(dev->mac_suspended < 0);
1971
1972        if (dev->mac_suspended == 0) {
1973                /* Mask IRQs before suspending MAC. Otherwise
1974                 * the MAC stays busy and won't suspend. */
1975                spin_lock_irq(&dev->wl->irq_lock);
1976                b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
1977                spin_unlock_irq(&dev->wl->irq_lock);
1978                b43legacy_synchronize_irq(dev);
1979
1980                b43legacy_power_saving_ctl_bits(dev, -1, 1);
1981                b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1982                                  b43legacy_read32(dev,
1983                                  B43legacy_MMIO_MACCTL)
1984                                  & ~B43legacy_MACCTL_ENABLED);
1985                b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1986                for (i = 40; i; i--) {
1987                        tmp = b43legacy_read32(dev,
1988                                               B43legacy_MMIO_GEN_IRQ_REASON);
1989                        if (tmp & B43legacy_IRQ_MAC_SUSPENDED)
1990                                goto out;
1991                        msleep(1);
1992                }
1993                b43legacyerr(dev->wl, "MAC suspend failed\n");
1994        }
1995out:
1996        dev->mac_suspended++;
1997}
1998
1999static void b43legacy_adjust_opmode(struct b43legacy_wldev *dev)
2000{
2001        struct b43legacy_wl *wl = dev->wl;
2002        u32 ctl;
2003        u16 cfp_pretbtt;
2004
2005        ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2006        /* Reset status to STA infrastructure mode. */
2007        ctl &= ~B43legacy_MACCTL_AP;
2008        ctl &= ~B43legacy_MACCTL_KEEP_CTL;
2009        ctl &= ~B43legacy_MACCTL_KEEP_BADPLCP;
2010        ctl &= ~B43legacy_MACCTL_KEEP_BAD;
2011        ctl &= ~B43legacy_MACCTL_PROMISC;
2012        ctl &= ~B43legacy_MACCTL_BEACPROMISC;
2013        ctl |= B43legacy_MACCTL_INFRA;
2014
2015        if (b43legacy_is_mode(wl, NL80211_IFTYPE_AP))
2016                ctl |= B43legacy_MACCTL_AP;
2017        else if (b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC))
2018                ctl &= ~B43legacy_MACCTL_INFRA;
2019
2020        if (wl->filter_flags & FIF_CONTROL)
2021                ctl |= B43legacy_MACCTL_KEEP_CTL;
2022        if (wl->filter_flags & FIF_FCSFAIL)
2023                ctl |= B43legacy_MACCTL_KEEP_BAD;
2024        if (wl->filter_flags & FIF_PLCPFAIL)
2025                ctl |= B43legacy_MACCTL_KEEP_BADPLCP;
2026        if (wl->filter_flags & FIF_BCN_PRBRESP_PROMISC)
2027                ctl |= B43legacy_MACCTL_BEACPROMISC;
2028
2029        /* Workaround: On old hardware the HW-MAC-address-filter
2030         * doesn't work properly, so always run promisc in filter
2031         * it in software. */
2032        if (dev->dev->id.revision <= 4)
2033                ctl |= B43legacy_MACCTL_PROMISC;
2034
2035        b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl);
2036
2037        cfp_pretbtt = 2;
2038        if ((ctl & B43legacy_MACCTL_INFRA) &&
2039            !(ctl & B43legacy_MACCTL_AP)) {
2040                if (dev->dev->bus->chip_id == 0x4306 &&
2041                    dev->dev->bus->chip_rev == 3)
2042                        cfp_pretbtt = 100;
2043                else
2044                        cfp_pretbtt = 50;
2045        }
2046        b43legacy_write16(dev, 0x612, cfp_pretbtt);
2047}
2048
2049static void b43legacy_rate_memory_write(struct b43legacy_wldev *dev,
2050                                        u16 rate,
2051                                        int is_ofdm)
2052{
2053        u16 offset;
2054
2055        if (is_ofdm) {
2056                offset = 0x480;
2057                offset += (b43legacy_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2;
2058        } else {
2059                offset = 0x4C0;
2060                offset += (b43legacy_plcp_get_ratecode_cck(rate) & 0x000F) * 2;
2061        }
2062        b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, offset + 0x20,
2063                              b43legacy_shm_read16(dev,
2064                              B43legacy_SHM_SHARED, offset));
2065}
2066
2067static void b43legacy_rate_memory_init(struct b43legacy_wldev *dev)
2068{
2069        switch (dev->phy.type) {
2070        case B43legacy_PHYTYPE_G:
2071                b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_6MB, 1);
2072                b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_12MB, 1);
2073                b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_18MB, 1);
2074                b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_24MB, 1);
2075                b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_36MB, 1);
2076                b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_48MB, 1);
2077                b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_54MB, 1);
2078                /* fallthrough */
2079        case B43legacy_PHYTYPE_B:
2080                b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_1MB, 0);
2081                b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_2MB, 0);
2082                b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_5MB, 0);
2083                b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_11MB, 0);
2084                break;
2085        default:
2086                B43legacy_BUG_ON(1);
2087        }
2088}
2089
2090/* Set the TX-Antenna for management frames sent by firmware. */
2091static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev *dev,
2092                                          int antenna)
2093{
2094        u16 ant = 0;
2095        u16 tmp;
2096
2097        switch (antenna) {
2098        case B43legacy_ANTENNA0:
2099                ant |= B43legacy_TX4_PHY_ANT0;
2100                break;
2101        case B43legacy_ANTENNA1:
2102                ant |= B43legacy_TX4_PHY_ANT1;
2103                break;
2104        case B43legacy_ANTENNA_AUTO:
2105                ant |= B43legacy_TX4_PHY_ANTLAST;
2106                break;
2107        default:
2108                B43legacy_BUG_ON(1);
2109        }
2110
2111        /* FIXME We also need to set the other flags of the PHY control
2112         * field somewhere. */
2113
2114        /* For Beacons */
2115        tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2116                                   B43legacy_SHM_SH_BEACPHYCTL);
2117        tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2118        b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2119                              B43legacy_SHM_SH_BEACPHYCTL, tmp);
2120        /* For ACK/CTS */
2121        tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2122                                   B43legacy_SHM_SH_ACKCTSPHYCTL);
2123        tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2124        b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2125                              B43legacy_SHM_SH_ACKCTSPHYCTL, tmp);
2126        /* For Probe Resposes */
2127        tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2128                                   B43legacy_SHM_SH_PRPHYCTL);
2129        tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2130        b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2131                              B43legacy_SHM_SH_PRPHYCTL, tmp);
2132}
2133
2134/* This is the opposite of b43legacy_chip_init() */
2135static void b43legacy_chip_exit(struct b43legacy_wldev *dev)
2136{
2137        b43legacy_radio_turn_off(dev, 1);
2138        b43legacy_gpio_cleanup(dev);
2139        /* firmware is released later */
2140}
2141
2142/* Initialize the chip
2143 * http://bcm-specs.sipsolutions.net/ChipInit
2144 */
2145static int b43legacy_chip_init(struct b43legacy_wldev *dev)
2146{
2147        struct b43legacy_phy *phy = &dev->phy;
2148        int err;
2149        int tmp;
2150        u32 value32, macctl;
2151        u16 value16;
2152
2153        /* Initialize the MAC control */
2154        macctl = B43legacy_MACCTL_IHR_ENABLED | B43legacy_MACCTL_SHM_ENABLED;
2155        if (dev->phy.gmode)
2156                macctl |= B43legacy_MACCTL_GMODE;
2157        macctl |= B43legacy_MACCTL_INFRA;
2158        b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
2159
2160        err = b43legacy_upload_microcode(dev);
2161        if (err)
2162                goto out; /* firmware is released later */
2163
2164        err = b43legacy_gpio_init(dev);
2165        if (err)
2166                goto out; /* firmware is released later */
2167
2168        err = b43legacy_upload_initvals(dev);
2169        if (err)
2170                goto err_gpio_clean;
2171        b43legacy_radio_turn_on(dev);
2172
2173        b43legacy_write16(dev, 0x03E6, 0x0000);
2174        err = b43legacy_phy_init(dev);
2175        if (err)
2176                goto err_radio_off;
2177
2178        /* Select initial Interference Mitigation. */
2179        tmp = phy->interfmode;
2180        phy->interfmode = B43legacy_INTERFMODE_NONE;
2181        b43legacy_radio_set_interference_mitigation(dev, tmp);
2182
2183        b43legacy_phy_set_antenna_diversity(dev);
2184        b43legacy_mgmtframe_txantenna(dev, B43legacy_ANTENNA_DEFAULT);
2185
2186        if (phy->type == B43legacy_PHYTYPE_B) {
2187                value16 = b43legacy_read16(dev, 0x005E);
2188                value16 |= 0x0004;
2189                b43legacy_write16(dev, 0x005E, value16);
2190        }
2191        b43legacy_write32(dev, 0x0100, 0x01000000);
2192        if (dev->dev->id.revision < 5)
2193                b43legacy_write32(dev, 0x010C, 0x01000000);
2194
2195        value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2196        value32 &= ~B43legacy_MACCTL_INFRA;
2197        b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2198        value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2199        value32 |= B43legacy_MACCTL_INFRA;
2200        b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2201
2202        if (b43legacy_using_pio(dev)) {
2203                b43legacy_write32(dev, 0x0210, 0x00000100);
2204                b43legacy_write32(dev, 0x0230, 0x00000100);
2205                b43legacy_write32(dev, 0x0250, 0x00000100);
2206                b43legacy_write32(dev, 0x0270, 0x00000100);
2207                b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0034,
2208                                      0x0000);
2209        }
2210
2211        /* Probe Response Timeout value */
2212        /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
2213        b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0074, 0x0000);
2214
2215        /* Initially set the wireless operation mode. */
2216        b43legacy_adjust_opmode(dev);
2217
2218        if (dev->dev->id.revision < 3) {
2219                b43legacy_write16(dev, 0x060E, 0x0000);
2220                b43legacy_write16(dev, 0x0610, 0x8000);
2221                b43legacy_write16(dev, 0x0604, 0x0000);
2222                b43legacy_write16(dev, 0x0606, 0x0200);
2223        } else {
2224                b43legacy_write32(dev, 0x0188, 0x80000000);
2225                b43legacy_write32(dev, 0x018C, 0x02000000);
2226        }
2227        b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 0x00004000);
2228        b43legacy_write32(dev, B43legacy_MMIO_DMA0_IRQ_MASK, 0x0001DC00);
2229        b43legacy_write32(dev, B43legacy_MMIO_DMA1_IRQ_MASK, 0x0000DC00);
2230        b43legacy_write32(dev, B43legacy_MMIO_DMA2_IRQ_MASK, 0x0000DC00);
2231        b43legacy_write32(dev, B43legacy_MMIO_DMA3_IRQ_MASK, 0x0001DC00);
2232        b43legacy_write32(dev, B43legacy_MMIO_DMA4_IRQ_MASK, 0x0000DC00);
2233        b43legacy_write32(dev, B43legacy_MMIO_DMA5_IRQ_MASK, 0x0000DC00);
2234
2235        value32 = ssb_read32(dev->dev, SSB_TMSLOW);
2236        value32 |= B43legacy_TMSLOW_MACPHYCLKEN;
2237        ssb_write32(dev->dev, SSB_TMSLOW, value32);
2238
2239        b43legacy_write16(dev, B43legacy_MMIO_POWERUP_DELAY,
2240                          dev->dev->bus->chipco.fast_pwrup_delay);
2241
2242        /* PHY TX errors counter. */
2243        atomic_set(&phy->txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2244
2245        B43legacy_WARN_ON(err != 0);
2246        b43legacydbg(dev->wl, "Chip initialized\n");
2247out:
2248        return err;
2249
2250err_radio_off:
2251        b43legacy_radio_turn_off(dev, 1);
2252err_gpio_clean:
2253        b43legacy_gpio_cleanup(dev);
2254        goto out;
2255}
2256
2257static void b43legacy_periodic_every120sec(struct b43legacy_wldev *dev)
2258{
2259        struct b43legacy_phy *phy = &dev->phy;
2260
2261        if (phy->type != B43legacy_PHYTYPE_G || phy->rev < 2)
2262                return;
2263
2264        b43legacy_mac_suspend(dev);
2265        b43legacy_phy_lo_g_measure(dev);
2266        b43legacy_mac_enable(dev);
2267}
2268
2269static void b43legacy_periodic_every60sec(struct b43legacy_wldev *dev)
2270{
2271        b43legacy_phy_lo_mark_all_unused(dev);
2272        if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI) {
2273                b43legacy_mac_suspend(dev);
2274                b43legacy_calc_nrssi_slope(dev);
2275                b43legacy_mac_enable(dev);
2276        }
2277}
2278
2279static void b43legacy_periodic_every30sec(struct b43legacy_wldev *dev)
2280{
2281        /* Update device statistics. */
2282        b43legacy_calculate_link_quality(dev);
2283}
2284
2285static void b43legacy_periodic_every15sec(struct b43legacy_wldev *dev)
2286{
2287        b43legacy_phy_xmitpower(dev); /* FIXME: unless scanning? */
2288
2289        atomic_set(&dev->phy.txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2290        wmb();
2291}
2292
2293static void do_periodic_work(struct b43legacy_wldev *dev)
2294{
2295        unsigned int state;
2296
2297        state = dev->periodic_state;
2298        if (state % 8 == 0)
2299                b43legacy_periodic_every120sec(dev);
2300        if (state % 4 == 0)
2301                b43legacy_periodic_every60sec(dev);
2302        if (state % 2 == 0)
2303                b43legacy_periodic_every30sec(dev);
2304        b43legacy_periodic_every15sec(dev);
2305}
2306
2307/* Periodic work locking policy:
2308 *      The whole periodic work handler is protected by
2309 *      wl->mutex. If another lock is needed somewhere in the
2310 *      pwork callchain, it's acquired in-place, where it's needed.
2311 */
2312static void b43legacy_periodic_work_handler(struct work_struct *work)
2313{
2314        struct b43legacy_wldev *dev = container_of(work, struct b43legacy_wldev,
2315                                             periodic_work.work);
2316        struct b43legacy_wl *wl = dev->wl;
2317        unsigned long delay;
2318
2319        mutex_lock(&wl->mutex);
2320
2321        if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED))
2322                goto out;
2323        if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP))
2324                goto out_requeue;
2325
2326        do_periodic_work(dev);
2327
2328        dev->periodic_state++;
2329out_requeue:
2330        if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST))
2331                delay = msecs_to_jiffies(50);
2332        else
2333                delay = round_jiffies_relative(HZ * 15);
2334        ieee80211_queue_delayed_work(wl->hw, &dev->periodic_work, delay);
2335out:
2336        mutex_unlock(&wl->mutex);
2337}
2338
2339static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev *dev)
2340{
2341        struct delayed_work *work = &dev->periodic_work;
2342
2343        dev->periodic_state = 0;
2344        INIT_DELAYED_WORK(work, b43legacy_periodic_work_handler);
2345        ieee80211_queue_delayed_work(dev->wl->hw, work, 0);
2346}
2347
2348/* Validate access to the chip (SHM) */
2349static int b43legacy_validate_chipaccess(struct b43legacy_wldev *dev)
2350{
2351        u32 value;
2352        u32 shm_backup;
2353
2354        shm_backup = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0);
2355        b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0xAA5555AA);
2356        if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2357                                 0xAA5555AA)
2358                goto error;
2359        b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0x55AAAA55);
2360        if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2361                                 0x55AAAA55)
2362                goto error;
2363        b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, shm_backup);
2364
2365        value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2366        if ((value | B43legacy_MACCTL_GMODE) !=
2367            (B43legacy_MACCTL_GMODE | B43legacy_MACCTL_IHR_ENABLED))
2368                goto error;
2369
2370        value = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
2371        if (value)
2372                goto error;
2373
2374        return 0;
2375error:
2376        b43legacyerr(dev->wl, "Failed to validate the chipaccess\n");
2377        return -ENODEV;
2378}
2379
2380static void b43legacy_security_init(struct b43legacy_wldev *dev)
2381{
2382        dev->max_nr_keys = (dev->dev->id.revision >= 5) ? 58 : 20;
2383        B43legacy_WARN_ON(dev->max_nr_keys > ARRAY_SIZE(dev->key));
2384        dev->ktp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2385                                        0x0056);
2386        /* KTP is a word address, but we address SHM bytewise.
2387         * So multiply by two.
2388         */
2389        dev->ktp *= 2;
2390        if (dev->dev->id.revision >= 5)
2391                /* Number of RCMTA address slots */
2392                b43legacy_write16(dev, B43legacy_MMIO_RCMTA_COUNT,
2393                                  dev->max_nr_keys - 8);
2394}
2395
2396#ifdef CONFIG_B43LEGACY_HWRNG
2397static int b43legacy_rng_read(struct hwrng *rng, u32 *data)
2398{
2399        struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv;
2400        unsigned long flags;
2401
2402        /* Don't take wl->mutex here, as it could deadlock with
2403         * hwrng internal locking. It's not needed to take
2404         * wl->mutex here, anyway. */
2405
2406        spin_lock_irqsave(&wl->irq_lock, flags);
2407        *data = b43legacy_read16(wl->current_dev, B43legacy_MMIO_RNG);
2408        spin_unlock_irqrestore(&wl->irq_lock, flags);
2409
2410        return (sizeof(u16));
2411}
2412#endif
2413
2414static void b43legacy_rng_exit(struct b43legacy_wl *wl)
2415{
2416#ifdef CONFIG_B43LEGACY_HWRNG
2417        if (wl->rng_initialized)
2418                hwrng_unregister(&wl->rng);
2419#endif
2420}
2421
2422static int b43legacy_rng_init(struct b43legacy_wl *wl)
2423{
2424        int err = 0;
2425
2426#ifdef CONFIG_B43LEGACY_HWRNG
2427        snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name),
2428                 "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy));
2429        wl->rng.name = wl->rng_name;
2430        wl->rng.data_read = b43legacy_rng_read;
2431        wl->rng.priv = (unsigned long)wl;
2432        wl->rng_initialized = 1;
2433        err = hwrng_register(&wl->rng);
2434        if (err) {
2435                wl->rng_initialized = 0;
2436                b43legacyerr(wl, "Failed to register the random "
2437                       "number generator (%d)\n", err);
2438        }
2439
2440#endif
2441        return err;
2442}
2443
2444static void b43legacy_tx_work(struct work_struct *work)
2445{
2446        struct b43legacy_wl *wl = container_of(work, struct b43legacy_wl,
2447                                  tx_work);
2448        struct b43legacy_wldev *dev;
2449        struct sk_buff *skb;
2450        int queue_num;
2451        int err = 0;
2452
2453        mutex_lock(&wl->mutex);
2454        dev = wl->current_dev;
2455        if (unlikely(!dev || b43legacy_status(dev) < B43legacy_STAT_STARTED)) {
2456                mutex_unlock(&wl->mutex);
2457                return;
2458        }
2459
2460        for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
2461                while (skb_queue_len(&wl->tx_queue[queue_num])) {
2462                        skb = skb_dequeue(&wl->tx_queue[queue_num]);
2463                        if (b43legacy_using_pio(dev))
2464                                err = b43legacy_pio_tx(dev, skb);
2465                        else
2466                                err = b43legacy_dma_tx(dev, skb);
2467                        if (err == -ENOSPC) {
2468                                wl->tx_queue_stopped[queue_num] = 1;
2469                                ieee80211_stop_queue(wl->hw, queue_num);
2470                                skb_queue_head(&wl->tx_queue[queue_num], skb);
2471                                break;
2472                        }
2473                        if (unlikely(err))
2474                                dev_kfree_skb(skb); /* Drop it */
2475                        err = 0;
2476                }
2477
2478                if (!err)
2479                        wl->tx_queue_stopped[queue_num] = 0;
2480        }
2481
2482        mutex_unlock(&wl->mutex);
2483}
2484
2485static void b43legacy_op_tx(struct ieee80211_hw *hw,
2486                            struct ieee80211_tx_control *control,
2487                            struct sk_buff *skb)
2488{
2489        struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2490
2491        if (unlikely(skb->len < 2 + 2 + 6)) {
2492                /* Too short, this can't be a valid frame. */
2493                dev_kfree_skb_any(skb);
2494                return;
2495        }
2496        B43legacy_WARN_ON(skb_shinfo(skb)->nr_frags);
2497
2498        skb_queue_tail(&wl->tx_queue[skb->queue_mapping], skb);
2499        if (!wl->tx_queue_stopped[skb->queue_mapping])
2500                ieee80211_queue_work(wl->hw, &wl->tx_work);
2501        else
2502                ieee80211_stop_queue(wl->hw, skb->queue_mapping);
2503}
2504
2505static int b43legacy_op_conf_tx(struct ieee80211_hw *hw,
2506                                struct ieee80211_vif *vif, u16 queue,
2507                                const struct ieee80211_tx_queue_params *params)
2508{
2509        return 0;
2510}
2511
2512static int b43legacy_op_get_stats(struct ieee80211_hw *hw,
2513                                  struct ieee80211_low_level_stats *stats)
2514{
2515        struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2516        unsigned long flags;
2517
2518        spin_lock_irqsave(&wl->irq_lock, flags);
2519        memcpy(stats, &wl->ieee_stats, sizeof(*stats));
2520        spin_unlock_irqrestore(&wl->irq_lock, flags);
2521
2522        return 0;
2523}
2524
2525static const char *phymode_to_string(unsigned int phymode)
2526{
2527        switch (phymode) {
2528        case B43legacy_PHYMODE_B:
2529                return "B";
2530        case B43legacy_PHYMODE_G:
2531                return "G";
2532        default:
2533                B43legacy_BUG_ON(1);
2534        }
2535        return "";
2536}
2537
2538static int find_wldev_for_phymode(struct b43legacy_wl *wl,
2539                                  unsigned int phymode,
2540                                  struct b43legacy_wldev **dev,
2541                                  bool *gmode)
2542{
2543        struct b43legacy_wldev *d;
2544
2545        list_for_each_entry(d, &wl->devlist, list) {
2546                if (d->phy.possible_phymodes & phymode) {
2547                        /* Ok, this device supports the PHY-mode.
2548                         * Set the gmode bit. */
2549                        *gmode = true;
2550                        *dev = d;
2551
2552                        return 0;
2553                }
2554        }
2555
2556        return -ESRCH;
2557}
2558
2559static void b43legacy_put_phy_into_reset(struct b43legacy_wldev *dev)
2560{
2561        struct ssb_device *sdev = dev->dev;
2562        u32 tmslow;
2563
2564        tmslow = ssb_read32(sdev, SSB_TMSLOW);
2565        tmslow &= ~B43legacy_TMSLOW_GMODE;
2566        tmslow |= B43legacy_TMSLOW_PHYRESET;
2567        tmslow |= SSB_TMSLOW_FGC;
2568        ssb_write32(sdev, SSB_TMSLOW, tmslow);
2569        msleep(1);
2570
2571        tmslow = ssb_read32(sdev, SSB_TMSLOW);
2572        tmslow &= ~SSB_TMSLOW_FGC;
2573        tmslow |= B43legacy_TMSLOW_PHYRESET;
2574        ssb_write32(sdev, SSB_TMSLOW, tmslow);
2575        msleep(1);
2576}
2577
2578/* Expects wl->mutex locked */
2579static int b43legacy_switch_phymode(struct b43legacy_wl *wl,
2580                                      unsigned int new_mode)
2581{
2582        struct b43legacy_wldev *uninitialized_var(up_dev);
2583        struct b43legacy_wldev *down_dev;
2584        int err;
2585        bool gmode = false;
2586        int prev_status;
2587
2588        err = find_wldev_for_phymode(wl, new_mode, &up_dev, &gmode);
2589        if (err) {
2590                b43legacyerr(wl, "Could not find a device for %s-PHY mode\n",
2591                       phymode_to_string(new_mode));
2592                return err;
2593        }
2594        if ((up_dev == wl->current_dev) &&
2595            (!!wl->current_dev->phy.gmode == !!gmode))
2596                /* This device is already running. */
2597                return 0;
2598        b43legacydbg(wl, "Reconfiguring PHYmode to %s-PHY\n",
2599               phymode_to_string(new_mode));
2600        down_dev = wl->current_dev;
2601
2602        prev_status = b43legacy_status(down_dev);
2603        /* Shutdown the currently running core. */
2604        if (prev_status >= B43legacy_STAT_STARTED)
2605                b43legacy_wireless_core_stop(down_dev);
2606        if (prev_status >= B43legacy_STAT_INITIALIZED)
2607                b43legacy_wireless_core_exit(down_dev);
2608
2609        if (down_dev != up_dev)
2610                /* We switch to a different core, so we put PHY into
2611                 * RESET on the old core. */
2612                b43legacy_put_phy_into_reset(down_dev);
2613
2614        /* Now start the new core. */
2615        up_dev->phy.gmode = gmode;
2616        if (prev_status >= B43legacy_STAT_INITIALIZED) {
2617                err = b43legacy_wireless_core_init(up_dev);
2618                if (err) {
2619                        b43legacyerr(wl, "Fatal: Could not initialize device"
2620                                     " for newly selected %s-PHY mode\n",
2621                                     phymode_to_string(new_mode));
2622                        goto init_failure;
2623                }
2624        }
2625        if (prev_status >= B43legacy_STAT_STARTED) {
2626                err = b43legacy_wireless_core_start(up_dev);
2627                if (err) {
2628                        b43legacyerr(wl, "Fatal: Could not start device for "
2629                               "newly selected %s-PHY mode\n",
2630                               phymode_to_string(new_mode));
2631                        b43legacy_wireless_core_exit(up_dev);
2632                        goto init_failure;
2633                }
2634        }
2635        B43legacy_WARN_ON(b43legacy_status(up_dev) != prev_status);
2636
2637        b43legacy_shm_write32(up_dev, B43legacy_SHM_SHARED, 0x003E, 0);
2638
2639        wl->current_dev = up_dev;
2640
2641        return 0;
2642init_failure:
2643        /* Whoops, failed to init the new core. No core is operating now. */
2644        wl->current_dev = NULL;
2645        return err;
2646}
2647
2648/* Write the short and long frame retry limit values. */
2649static void b43legacy_set_retry_limits(struct b43legacy_wldev *dev,
2650                                       unsigned int short_retry,
2651                                       unsigned int long_retry)
2652{
2653        /* The retry limit is a 4-bit counter. Enforce this to avoid overflowing
2654         * the chip-internal counter. */
2655        short_retry = min(short_retry, (unsigned int)0xF);
2656        long_retry = min(long_retry, (unsigned int)0xF);
2657
2658        b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0006, short_retry);
2659        b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0007, long_retry);
2660}
2661
2662static int b43legacy_op_dev_config(struct ieee80211_hw *hw,
2663                                   u32 changed)
2664{
2665        struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2666        struct b43legacy_wldev *dev;
2667        struct b43legacy_phy *phy;
2668        struct ieee80211_conf *conf = &hw->conf;
2669        unsigned long flags;
2670        unsigned int new_phymode = 0xFFFF;
2671        int antenna_tx;
2672        int err = 0;
2673
2674        antenna_tx = B43legacy_ANTENNA_DEFAULT;
2675
2676        mutex_lock(&wl->mutex);
2677        dev = wl->current_dev;
2678        phy = &dev->phy;
2679
2680        if (changed & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
2681                b43legacy_set_retry_limits(dev,
2682                                           conf->short_frame_max_tx_count,
2683                                           conf->long_frame_max_tx_count);
2684        changed &= ~IEEE80211_CONF_CHANGE_RETRY_LIMITS;
2685        if (!changed)
2686                goto out_unlock_mutex;
2687
2688        /* Switch the PHY mode (if necessary). */
2689        switch (conf->chandef.chan->band) {
2690        case NL80211_BAND_2GHZ:
2691                if (phy->type == B43legacy_PHYTYPE_B)
2692                        new_phymode = B43legacy_PHYMODE_B;
2693                else
2694                        new_phymode = B43legacy_PHYMODE_G;
2695                break;
2696        default:
2697                B43legacy_WARN_ON(1);
2698        }
2699        err = b43legacy_switch_phymode(wl, new_phymode);
2700        if (err)
2701                goto out_unlock_mutex;
2702
2703        /* Disable IRQs while reconfiguring the device.
2704         * This makes it possible to drop the spinlock throughout
2705         * the reconfiguration process. */
2706        spin_lock_irqsave(&wl->irq_lock, flags);
2707        if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2708                spin_unlock_irqrestore(&wl->irq_lock, flags);
2709                goto out_unlock_mutex;
2710        }
2711        b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2712        spin_unlock_irqrestore(&wl->irq_lock, flags);
2713        b43legacy_synchronize_irq(dev);
2714
2715        /* Switch to the requested channel.
2716         * The firmware takes care of races with the TX handler. */
2717        if (conf->chandef.chan->hw_value != phy->channel)
2718                b43legacy_radio_selectchannel(dev, conf->chandef.chan->hw_value,
2719                                              0);
2720
2721        dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_MONITOR);
2722
2723        /* Adjust the desired TX power level. */
2724        if (conf->power_level != 0) {
2725                if (conf->power_level != phy->power_level) {
2726                        phy->power_level = conf->power_level;
2727                        b43legacy_phy_xmitpower(dev);
2728                }
2729        }
2730
2731        /* Antennas for RX and management frame TX. */
2732        b43legacy_mgmtframe_txantenna(dev, antenna_tx);
2733
2734        if (wl->radio_enabled != phy->radio_on) {
2735                if (wl->radio_enabled) {
2736                        b43legacy_radio_turn_on(dev);
2737                        b43legacyinfo(dev->wl, "Radio turned on by software\n");
2738                        if (!dev->radio_hw_enable)
2739                                b43legacyinfo(dev->wl, "The hardware RF-kill"
2740                                              " button still turns the radio"
2741                                              " physically off. Press the"
2742                                              " button to turn it on.\n");
2743                } else {
2744                        b43legacy_radio_turn_off(dev, 0);
2745                        b43legacyinfo(dev->wl, "Radio turned off by"
2746                                      " software\n");
2747                }
2748        }
2749
2750        spin_lock_irqsave(&wl->irq_lock, flags);
2751        b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2752        spin_unlock_irqrestore(&wl->irq_lock, flags);
2753out_unlock_mutex:
2754        mutex_unlock(&wl->mutex);
2755
2756        return err;
2757}
2758
2759static void b43legacy_update_basic_rates(struct b43legacy_wldev *dev, u32 brates)
2760{
2761        struct ieee80211_supported_band *sband =
2762                dev->wl->hw->wiphy->bands[NL80211_BAND_2GHZ];
2763        struct ieee80211_rate *rate;
2764        int i;
2765        u16 basic, direct, offset, basic_offset, rateptr;
2766
2767        for (i = 0; i < sband->n_bitrates; i++) {
2768                rate = &sband->bitrates[i];
2769
2770                if (b43legacy_is_cck_rate(rate->hw_value)) {
2771                        direct = B43legacy_SHM_SH_CCKDIRECT;
2772                        basic = B43legacy_SHM_SH_CCKBASIC;
2773                        offset = b43legacy_plcp_get_ratecode_cck(rate->hw_value);
2774                        offset &= 0xF;
2775                } else {
2776                        direct = B43legacy_SHM_SH_OFDMDIRECT;
2777                        basic = B43legacy_SHM_SH_OFDMBASIC;
2778                        offset = b43legacy_plcp_get_ratecode_ofdm(rate->hw_value);
2779                        offset &= 0xF;
2780                }
2781
2782                rate = ieee80211_get_response_rate(sband, brates, rate->bitrate);
2783
2784                if (b43legacy_is_cck_rate(rate->hw_value)) {
2785                        basic_offset = b43legacy_plcp_get_ratecode_cck(rate->hw_value);
2786                        basic_offset &= 0xF;
2787                } else {
2788                        basic_offset = b43legacy_plcp_get_ratecode_ofdm(rate->hw_value);
2789                        basic_offset &= 0xF;
2790                }
2791
2792                /*
2793                 * Get the pointer that we need to point to
2794                 * from the direct map
2795                 */
2796                rateptr = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2797                                               direct + 2 * basic_offset);
2798                /* and write it to the basic map */
2799                b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2800                                      basic + 2 * offset, rateptr);
2801        }
2802}
2803
2804static void b43legacy_op_bss_info_changed(struct ieee80211_hw *hw,
2805                                    struct ieee80211_vif *vif,
2806                                    struct ieee80211_bss_conf *conf,
2807                                    u32 changed)
2808{
2809        struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2810        struct b43legacy_wldev *dev;
2811        unsigned long flags;
2812
2813        mutex_lock(&wl->mutex);
2814        B43legacy_WARN_ON(wl->vif != vif);
2815
2816        dev = wl->current_dev;
2817
2818        /* Disable IRQs while reconfiguring the device.
2819         * This makes it possible to drop the spinlock throughout
2820         * the reconfiguration process. */
2821        spin_lock_irqsave(&wl->irq_lock, flags);
2822        if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2823                spin_unlock_irqrestore(&wl->irq_lock, flags);
2824                goto out_unlock_mutex;
2825        }
2826        b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2827
2828        if (changed & BSS_CHANGED_BSSID) {
2829                b43legacy_synchronize_irq(dev);
2830
2831                if (conf->bssid)
2832                        memcpy(wl->bssid, conf->bssid, ETH_ALEN);
2833                else
2834                        eth_zero_addr(wl->bssid);
2835        }
2836
2837        if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) {
2838                if (changed & BSS_CHANGED_BEACON &&
2839                    (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) ||
2840                     b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC)))
2841                        b43legacy_update_templates(wl);
2842
2843                if (changed & BSS_CHANGED_BSSID)
2844                        b43legacy_write_mac_bssid_templates(dev);
2845        }
2846        spin_unlock_irqrestore(&wl->irq_lock, flags);
2847
2848        b43legacy_mac_suspend(dev);
2849
2850        if (changed & BSS_CHANGED_BEACON_INT &&
2851            (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) ||
2852             b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC)))
2853                b43legacy_set_beacon_int(dev, conf->beacon_int);
2854
2855        if (changed & BSS_CHANGED_BASIC_RATES)
2856                b43legacy_update_basic_rates(dev, conf->basic_rates);
2857
2858        if (changed & BSS_CHANGED_ERP_SLOT) {
2859                if (conf->use_short_slot)
2860                        b43legacy_short_slot_timing_enable(dev);
2861                else
2862                        b43legacy_short_slot_timing_disable(dev);
2863        }
2864
2865        b43legacy_mac_enable(dev);
2866
2867        spin_lock_irqsave(&wl->irq_lock, flags);
2868        b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2869        /* XXX: why? */
2870        spin_unlock_irqrestore(&wl->irq_lock, flags);
2871 out_unlock_mutex:
2872        mutex_unlock(&wl->mutex);
2873}
2874
2875static void b43legacy_op_configure_filter(struct ieee80211_hw *hw,
2876                                          unsigned int changed,
2877                                          unsigned int *fflags,u64 multicast)
2878{
2879        struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2880        struct b43legacy_wldev *dev = wl->current_dev;
2881        unsigned long flags;
2882
2883        if (!dev) {
2884                *fflags = 0;
2885                return;
2886        }
2887
2888        spin_lock_irqsave(&wl->irq_lock, flags);
2889        *fflags &= FIF_ALLMULTI |
2890                  FIF_FCSFAIL |
2891                  FIF_PLCPFAIL |
2892                  FIF_CONTROL |
2893                  FIF_OTHER_BSS |
2894                  FIF_BCN_PRBRESP_PROMISC;
2895
2896        changed &= FIF_ALLMULTI |
2897                   FIF_FCSFAIL |
2898                   FIF_PLCPFAIL |
2899                   FIF_CONTROL |
2900                   FIF_OTHER_BSS |
2901                   FIF_BCN_PRBRESP_PROMISC;
2902
2903        wl->filter_flags = *fflags;
2904
2905        if (changed && b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED)
2906                b43legacy_adjust_opmode(dev);
2907        spin_unlock_irqrestore(&wl->irq_lock, flags);
2908}
2909
2910/* Locking: wl->mutex */
2911static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev)
2912{
2913        struct b43legacy_wl *wl = dev->wl;
2914        unsigned long flags;
2915        int queue_num;
2916
2917        if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
2918                return;
2919
2920        /* Disable and sync interrupts. We must do this before than
2921         * setting the status to INITIALIZED, as the interrupt handler
2922         * won't care about IRQs then. */
2923        spin_lock_irqsave(&wl->irq_lock, flags);
2924        b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2925        b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */
2926        spin_unlock_irqrestore(&wl->irq_lock, flags);
2927        b43legacy_synchronize_irq(dev);
2928
2929        b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
2930
2931        mutex_unlock(&wl->mutex);
2932        /* Must unlock as it would otherwise deadlock. No races here.
2933         * Cancel the possibly running self-rearming periodic work. */
2934        cancel_delayed_work_sync(&dev->periodic_work);
2935        cancel_work_sync(&wl->tx_work);
2936        mutex_lock(&wl->mutex);
2937
2938        /* Drain all TX queues. */
2939        for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
2940                while (skb_queue_len(&wl->tx_queue[queue_num]))
2941                        dev_kfree_skb(skb_dequeue(&wl->tx_queue[queue_num]));
2942        }
2943
2944b43legacy_mac_suspend(dev);
2945        free_irq(dev->dev->irq, dev);
2946        b43legacydbg(wl, "Wireless interface stopped\n");
2947}
2948
2949/* Locking: wl->mutex */
2950static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev)
2951{
2952        int err;
2953
2954        B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_INITIALIZED);
2955
2956        drain_txstatus_queue(dev);
2957        err = request_irq(dev->dev->irq, b43legacy_interrupt_handler,
2958                          IRQF_SHARED, KBUILD_MODNAME, dev);
2959        if (err) {
2960                b43legacyerr(dev->wl, "Cannot request IRQ-%d\n",
2961                       dev->dev->irq);
2962                goto out;
2963        }
2964        /* We are ready to run. */
2965        ieee80211_wake_queues(dev->wl->hw);
2966        b43legacy_set_status(dev, B43legacy_STAT_STARTED);
2967
2968        /* Start data flow (TX/RX) */
2969        b43legacy_mac_enable(dev);
2970        b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2971
2972        /* Start maintenance work */
2973        b43legacy_periodic_tasks_setup(dev);
2974
2975        b43legacydbg(dev->wl, "Wireless interface started\n");
2976out:
2977        return err;
2978}
2979
2980/* Get PHY and RADIO versioning numbers */
2981static int b43legacy_phy_versioning(struct b43legacy_wldev *dev)
2982{
2983        struct b43legacy_phy *phy = &dev->phy;
2984        u32 tmp;
2985        u8 analog_type;
2986        u8 phy_type;
2987        u8 phy_rev;
2988        u16 radio_manuf;
2989        u16 radio_ver;
2990        u16 radio_rev;
2991        int unsupported = 0;
2992
2993        /* Get PHY versioning */
2994        tmp = b43legacy_read16(dev, B43legacy_MMIO_PHY_VER);
2995        analog_type = (tmp & B43legacy_PHYVER_ANALOG)
2996                      >> B43legacy_PHYVER_ANALOG_SHIFT;
2997        phy_type = (tmp & B43legacy_PHYVER_TYPE) >> B43legacy_PHYVER_TYPE_SHIFT;
2998        phy_rev = (tmp & B43legacy_PHYVER_VERSION);
2999        switch (phy_type) {
3000        case B43legacy_PHYTYPE_B:
3001                if (phy_rev != 2 && phy_rev != 4
3002                    && phy_rev != 6 && phy_rev != 7)
3003                        unsupported = 1;
3004                break;
3005        case B43legacy_PHYTYPE_G:
3006                if (phy_rev > 8)
3007                        unsupported = 1;
3008                break;
3009        default:
3010                unsupported = 1;
3011        }
3012        if (unsupported) {
3013                b43legacyerr(dev->wl, "FOUND UNSUPPORTED PHY "
3014                       "(Analog %u, Type %u, Revision %u)\n",
3015                       analog_type, phy_type, phy_rev);
3016                return -EOPNOTSUPP;
3017        }
3018        b43legacydbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n",
3019               analog_type, phy_type, phy_rev);
3020
3021
3022        /* Get RADIO versioning */
3023        if (dev->dev->bus->chip_id == 0x4317) {
3024                if (dev->dev->bus->chip_rev == 0)
3025                        tmp = 0x3205017F;
3026                else if (dev->dev->bus->chip_rev == 1)
3027                        tmp = 0x4205017F;
3028                else
3029                        tmp = 0x5205017F;
3030        } else {
3031                b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
3032                                  B43legacy_RADIOCTL_ID);
3033                tmp = b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_HIGH);
3034                tmp <<= 16;
3035                b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
3036                                  B43legacy_RADIOCTL_ID);
3037                tmp |= b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW);
3038        }
3039        radio_manuf = (tmp & 0x00000FFF);
3040        radio_ver = (tmp & 0x0FFFF000) >> 12;
3041        radio_rev = (tmp & 0xF0000000) >> 28;
3042        switch (phy_type) {
3043        case B43legacy_PHYTYPE_B:
3044                if ((radio_ver & 0xFFF0) != 0x2050)
3045                        unsupported = 1;
3046                break;
3047        case B43legacy_PHYTYPE_G:
3048                if (radio_ver != 0x2050)
3049                        unsupported = 1;
3050                break;
3051        default:
3052                B43legacy_BUG_ON(1);
3053        }
3054        if (unsupported) {
3055                b43legacyerr(dev->wl, "FOUND UNSUPPORTED RADIO "
3056                       "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
3057                       radio_manuf, radio_ver, radio_rev);
3058                return -EOPNOTSUPP;
3059        }
3060        b43legacydbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X,"
3061                     " Revision %u\n", radio_manuf, radio_ver, radio_rev);
3062
3063
3064        phy->radio_manuf = radio_manuf;
3065        phy->radio_ver = radio_ver;
3066        phy->radio_rev = radio_rev;
3067
3068        phy->analog = analog_type;
3069        phy->type = phy_type;
3070        phy->rev = phy_rev;
3071
3072        return 0;
3073}
3074
3075static void setup_struct_phy_for_init(struct b43legacy_wldev *dev,
3076                                      struct b43legacy_phy *phy)
3077{
3078        struct b43legacy_lopair *lo;
3079        int i;
3080
3081        memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3082        memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3083
3084        /* Assume the radio is enabled. If it's not enabled, the state will
3085         * immediately get fixed on the first periodic work run. */
3086        dev->radio_hw_enable = true;
3087
3088        phy->savedpctlreg = 0xFFFF;
3089        phy->aci_enable = false;
3090        phy->aci_wlan_automatic = false;
3091        phy->aci_hw_rssi = false;
3092
3093        lo = phy->_lo_pairs;
3094        if (lo)
3095                memset(lo, 0, sizeof(struct b43legacy_lopair) *
3096                                     B43legacy_LO_COUNT);
3097        phy->max_lb_gain = 0;
3098        phy->trsw_rx_gain = 0;
3099
3100        /* Set default attenuation values. */
3101        phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3102        phy->rfatt = b43legacy_default_radio_attenuation(dev);
3103        phy->txctl1 = b43legacy_default_txctl1(dev);
3104        phy->txpwr_offset = 0;
3105
3106        /* NRSSI */
3107        phy->nrssislope = 0;
3108        for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3109                phy->nrssi[i] = -1000;
3110        for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3111                phy->nrssi_lt[i] = i;
3112
3113        phy->lofcal = 0xFFFF;
3114        phy->initval = 0xFFFF;
3115
3116        phy->interfmode = B43legacy_INTERFMODE_NONE;
3117        phy->channel = 0xFF;
3118}
3119
3120static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev)
3121{
3122        /* Flags */
3123        dev->dfq_valid = false;
3124
3125        /* Stats */
3126        memset(&dev->stats, 0, sizeof(dev->stats));
3127
3128        setup_struct_phy_for_init(dev, &dev->phy);
3129
3130        /* IRQ related flags */
3131        dev->irq_reason = 0;
3132        memset(dev->dma_reason, 0, sizeof(dev->dma_reason));
3133        dev->irq_mask = B43legacy_IRQ_MASKTEMPLATE;
3134
3135        dev->mac_suspended = 1;
3136
3137        /* Noise calculation context */
3138        memset(&dev->noisecalc, 0, sizeof(dev->noisecalc));
3139}
3140
3141static void b43legacy_set_synth_pu_delay(struct b43legacy_wldev *dev,
3142                                          bool idle) {
3143        u16 pu_delay = 1050;
3144
3145        if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC) || idle)
3146                pu_delay = 500;
3147        if ((dev->phy.radio_ver == 0x2050) && (dev->phy.radio_rev == 8))
3148                pu_delay = max(pu_delay, (u16)2400);
3149
3150        b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3151                              B43legacy_SHM_SH_SPUWKUP, pu_delay);
3152}
3153
3154/* Set the TSF CFP pre-TargetBeaconTransmissionTime. */
3155static void b43legacy_set_pretbtt(struct b43legacy_wldev *dev)
3156{
3157        u16 pretbtt;
3158
3159        /* The time value is in microseconds. */
3160        if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC))
3161                pretbtt = 2;
3162        else
3163                pretbtt = 250;
3164        b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3165                              B43legacy_SHM_SH_PRETBTT, pretbtt);
3166        b43legacy_write16(dev, B43legacy_MMIO_TSF_CFP_PRETBTT, pretbtt);
3167}
3168
3169/* Shutdown a wireless core */
3170/* Locking: wl->mutex */
3171static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev)
3172{
3173        struct b43legacy_phy *phy = &dev->phy;
3174        u32 macctl;
3175
3176        B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED);
3177        if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED)
3178                return;
3179        b43legacy_set_status(dev, B43legacy_STAT_UNINIT);
3180
3181        /* Stop the microcode PSM. */
3182        macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
3183        macctl &= ~B43legacy_MACCTL_PSM_RUN;
3184        macctl |= B43legacy_MACCTL_PSM_JMP0;
3185        b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
3186
3187        b43legacy_leds_exit(dev);
3188        b43legacy_rng_exit(dev->wl);
3189        b43legacy_pio_free(dev);
3190        b43legacy_dma_free(dev);
3191        b43legacy_chip_exit(dev);
3192        b43legacy_radio_turn_off(dev, 1);
3193        b43legacy_switch_analog(dev, 0);
3194        if (phy->dyn_tssi_tbl)
3195                kfree(phy->tssi2dbm);
3196        kfree(phy->lo_control);
3197        phy->lo_control = NULL;
3198        if (dev->wl->current_beacon) {
3199                dev_kfree_skb_any(dev->wl->current_beacon);
3200                dev->wl->current_beacon = NULL;
3201        }
3202
3203        ssb_device_disable(dev->dev, 0);
3204        ssb_bus_may_powerdown(dev->dev->bus);
3205}
3206
3207static void prepare_phy_data_for_init(struct b43legacy_wldev *dev)
3208{
3209        struct b43legacy_phy *phy = &dev->phy;
3210        int i;
3211
3212        /* Set default attenuation values. */
3213        phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3214        phy->rfatt = b43legacy_default_radio_attenuation(dev);
3215        phy->txctl1 = b43legacy_default_txctl1(dev);
3216        phy->txctl2 = 0xFFFF;
3217        phy->txpwr_offset = 0;
3218
3219        /* NRSSI */
3220        phy->nrssislope = 0;
3221        for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3222                phy->nrssi[i] = -1000;
3223        for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3224                phy->nrssi_lt[i] = i;
3225
3226        phy->lofcal = 0xFFFF;
3227        phy->initval = 0xFFFF;
3228
3229        phy->aci_enable = false;
3230        phy->aci_wlan_automatic = false;
3231        phy->aci_hw_rssi = false;
3232
3233        phy->antenna_diversity = 0xFFFF;
3234        memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3235        memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3236
3237        /* Flags */
3238        phy->calibrated = 0;
3239
3240        if (phy->_lo_pairs)
3241                memset(phy->_lo_pairs, 0,
3242                       sizeof(struct b43legacy_lopair) * B43legacy_LO_COUNT);
3243        memset(phy->loopback_gain, 0, sizeof(phy->loopback_gain));
3244}
3245
3246/* Initialize a wireless core */
3247static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev)
3248{
3249        struct b43legacy_wl *wl = dev->wl;
3250        struct ssb_bus *bus = dev->dev->bus;
3251        struct b43legacy_phy *phy = &dev->phy;
3252        struct ssb_sprom *sprom = &dev->dev->bus->sprom;
3253        int err;
3254        u32 hf;
3255        u32 tmp;
3256
3257        B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3258
3259        err = ssb_bus_powerup(bus, 0);
3260        if (err)
3261                goto out;
3262        if (!ssb_device_is_enabled(dev->dev)) {
3263                tmp = phy->gmode ? B43legacy_TMSLOW_GMODE : 0;
3264                b43legacy_wireless_core_reset(dev, tmp);
3265        }
3266
3267        if ((phy->type == B43legacy_PHYTYPE_B) ||
3268            (phy->type == B43legacy_PHYTYPE_G)) {
3269                phy->_lo_pairs = kcalloc(B43legacy_LO_COUNT,
3270                                         sizeof(struct b43legacy_lopair),
3271                                         GFP_KERNEL);
3272                if (!phy->_lo_pairs)
3273                        return -ENOMEM;
3274        }
3275        setup_struct_wldev_for_init(dev);
3276
3277        err = b43legacy_phy_init_tssi2dbm_table(dev);
3278        if (err)
3279                goto err_kfree_lo_control;
3280
3281        /* Enable IRQ routing to this device. */
3282        ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev);
3283
3284        prepare_phy_data_for_init(dev);
3285        b43legacy_phy_calibrate(dev);
3286        err = b43legacy_chip_init(dev);
3287        if (err)
3288                goto err_kfree_tssitbl;
3289        b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3290                              B43legacy_SHM_SH_WLCOREREV,
3291                              dev->dev->id.revision);
3292        hf = b43legacy_hf_read(dev);
3293        if (phy->type == B43legacy_PHYTYPE_G) {
3294                hf |= B43legacy_HF_SYMW;
3295                if (phy->rev == 1)
3296                        hf |= B43legacy_HF_GDCW;
3297                if (sprom->boardflags_lo & B43legacy_BFL_PACTRL)
3298                        hf |= B43legacy_HF_OFDMPABOOST;
3299        } else if (phy->type == B43legacy_PHYTYPE_B) {
3300                hf |= B43legacy_HF_SYMW;
3301                if (phy->rev >= 2 && phy->radio_ver == 0x2050)
3302                        hf &= ~B43legacy_HF_GDCW;
3303        }
3304        b43legacy_hf_write(dev, hf);
3305
3306        b43legacy_set_retry_limits(dev,
3307                                   B43legacy_DEFAULT_SHORT_RETRY_LIMIT,
3308                                   B43legacy_DEFAULT_LONG_RETRY_LIMIT);
3309
3310        b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3311                              0x0044, 3);
3312        b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3313                              0x0046, 2);
3314
3315        /* Disable sending probe responses from firmware.
3316         * Setting the MaxTime to one usec will always trigger
3317         * a timeout, so we never send any probe resp.
3318         * A timeout of zero is infinite. */
3319        b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3320                              B43legacy_SHM_SH_PRMAXTIME, 1);
3321
3322        b43legacy_rate_memory_init(dev);
3323
3324        /* Minimum Contention Window */
3325        if (phy->type == B43legacy_PHYTYPE_B)
3326                b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3327                                      0x0003, 31);
3328        else
3329                b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3330                                      0x0003, 15);
3331        /* Maximum Contention Window */
3332        b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3333                              0x0004, 1023);
3334
3335        do {
3336                if (b43legacy_using_pio(dev))
3337                        err = b43legacy_pio_init(dev);
3338                else {
3339                        err = b43legacy_dma_init(dev);
3340                        if (!err)
3341                                b43legacy_qos_init(dev);
3342                }
3343        } while (err == -EAGAIN);
3344        if (err)
3345                goto err_chip_exit;
3346
3347        b43legacy_set_synth_pu_delay(dev, 1);
3348
3349        ssb_bus_powerup(bus, 1); /* Enable dynamic PCTL */
3350        b43legacy_upload_card_macaddress(dev);
3351        b43legacy_security_init(dev);
3352        b43legacy_rng_init(wl);
3353
3354        ieee80211_wake_queues(dev->wl->hw);
3355        b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
3356
3357        b43legacy_leds_init(dev);
3358out:
3359        return err;
3360
3361err_chip_exit:
3362        b43legacy_chip_exit(dev);
3363err_kfree_tssitbl:
3364        if (phy->dyn_tssi_tbl)
3365                kfree(phy->tssi2dbm);
3366err_kfree_lo_control:
3367        kfree(phy->lo_control);
3368        phy->lo_control = NULL;
3369        ssb_bus_may_powerdown(bus);
3370        B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3371        return err;
3372}
3373
3374static int b43legacy_op_add_interface(struct ieee80211_hw *hw,
3375                                      struct ieee80211_vif *vif)
3376{
3377        struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3378        struct b43legacy_wldev *dev;
3379        unsigned long flags;
3380        int err = -EOPNOTSUPP;
3381
3382        /* TODO: allow WDS/AP devices to coexist */
3383
3384        if (vif->type != NL80211_IFTYPE_AP &&
3385            vif->type != NL80211_IFTYPE_STATION &&
3386            vif->type != NL80211_IFTYPE_WDS &&
3387            vif->type != NL80211_IFTYPE_ADHOC)
3388                return -EOPNOTSUPP;
3389
3390        mutex_lock(&wl->mutex);
3391        if (wl->operating)
3392                goto out_mutex_unlock;
3393
3394        b43legacydbg(wl, "Adding Interface type %d\n", vif->type);
3395
3396        dev = wl->current_dev;
3397        wl->operating = true;
3398        wl->vif = vif;
3399        wl->if_type = vif->type;
3400        memcpy(wl->mac_addr, vif->addr, ETH_ALEN);
3401
3402        spin_lock_irqsave(&wl->irq_lock, flags);
3403        b43legacy_adjust_opmode(dev);
3404        b43legacy_set_pretbtt(dev);
3405        b43legacy_set_synth_pu_delay(dev, 0);
3406        b43legacy_upload_card_macaddress(dev);
3407        spin_unlock_irqrestore(&wl->irq_lock, flags);
3408
3409        err = 0;
3410 out_mutex_unlock:
3411        mutex_unlock(&wl->mutex);
3412
3413        return err;
3414}
3415
3416static void b43legacy_op_remove_interface(struct ieee80211_hw *hw,
3417                                          struct ieee80211_vif *vif)
3418{
3419        struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3420        struct b43legacy_wldev *dev = wl->current_dev;
3421        unsigned long flags;
3422
3423        b43legacydbg(wl, "Removing Interface type %d\n", vif->type);
3424
3425        mutex_lock(&wl->mutex);
3426
3427        B43legacy_WARN_ON(!wl->operating);
3428        B43legacy_WARN_ON(wl->vif != vif);
3429        wl->vif = NULL;
3430
3431        wl->operating = false;
3432
3433        spin_lock_irqsave(&wl->irq_lock, flags);
3434        b43legacy_adjust_opmode(dev);
3435        eth_zero_addr(wl->mac_addr);
3436        b43legacy_upload_card_macaddress(dev);
3437        spin_unlock_irqrestore(&wl->irq_lock, flags);
3438
3439        mutex_unlock(&wl->mutex);
3440}
3441
3442static int b43legacy_op_start(struct ieee80211_hw *hw)
3443{
3444        struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3445        struct b43legacy_wldev *dev = wl->current_dev;
3446        int did_init = 0;
3447        int err = 0;
3448
3449        /* Kill all old instance specific information to make sure
3450         * the card won't use it in the short timeframe between start
3451         * and mac80211 reconfiguring it. */
3452        eth_zero_addr(wl->bssid);
3453        eth_zero_addr(wl->mac_addr);
3454        wl->filter_flags = 0;
3455        wl->beacon0_uploaded = false;
3456        wl->beacon1_uploaded = false;
3457        wl->beacon_templates_virgin = true;
3458        wl->radio_enabled = true;
3459
3460        mutex_lock(&wl->mutex);
3461
3462        if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
3463                err = b43legacy_wireless_core_init(dev);
3464                if (err)
3465                        goto out_mutex_unlock;
3466                did_init = 1;
3467        }
3468
3469        if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
3470                err = b43legacy_wireless_core_start(dev);
3471                if (err) {
3472                        if (did_init)
3473                                b43legacy_wireless_core_exit(dev);
3474                        goto out_mutex_unlock;
3475                }
3476        }
3477
3478        wiphy_rfkill_start_polling(hw->wiphy);
3479
3480out_mutex_unlock:
3481        mutex_unlock(&wl->mutex);
3482
3483        return err;
3484}
3485
3486static void b43legacy_op_stop(struct ieee80211_hw *hw)
3487{
3488        struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3489        struct b43legacy_wldev *dev = wl->current_dev;
3490
3491        cancel_work_sync(&(wl->beacon_update_trigger));
3492
3493        mutex_lock(&wl->mutex);
3494        if (b43legacy_status(dev) >= B43legacy_STAT_STARTED)
3495                b43legacy_wireless_core_stop(dev);
3496        b43legacy_wireless_core_exit(dev);
3497        wl->radio_enabled = false;
3498        mutex_unlock(&wl->mutex);
3499}
3500
3501static int b43legacy_op_beacon_set_tim(struct ieee80211_hw *hw,
3502                                       struct ieee80211_sta *sta, bool set)
3503{
3504        struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3505        unsigned long flags;
3506
3507        spin_lock_irqsave(&wl->irq_lock, flags);
3508        b43legacy_update_templates(wl);
3509        spin_unlock_irqrestore(&wl->irq_lock, flags);
3510
3511        return 0;
3512}
3513
3514static int b43legacy_op_get_survey(struct ieee80211_hw *hw, int idx,
3515                                   struct survey_info *survey)
3516{
3517        struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3518        struct b43legacy_wldev *dev = wl->current_dev;
3519        struct ieee80211_conf *conf = &hw->conf;
3520
3521        if (idx != 0)
3522                return -ENOENT;
3523
3524        survey->channel = conf->chandef.chan;
3525        survey->filled = SURVEY_INFO_NOISE_DBM;
3526        survey->noise = dev->stats.link_noise;
3527
3528        return 0;
3529}
3530
3531static const struct ieee80211_ops b43legacy_hw_ops = {
3532        .tx                     = b43legacy_op_tx,
3533        .conf_tx                = b43legacy_op_conf_tx,
3534        .add_interface          = b43legacy_op_add_interface,
3535        .remove_interface       = b43legacy_op_remove_interface,
3536        .config                 = b43legacy_op_dev_config,
3537        .bss_info_changed       = b43legacy_op_bss_info_changed,
3538        .configure_filter       = b43legacy_op_configure_filter,
3539        .get_stats              = b43legacy_op_get_stats,
3540        .start                  = b43legacy_op_start,
3541        .stop                   = b43legacy_op_stop,
3542        .set_tim                = b43legacy_op_beacon_set_tim,
3543        .get_survey             = b43legacy_op_get_survey,
3544        .rfkill_poll            = b43legacy_rfkill_poll,
3545};
3546
3547/* Hard-reset the chip. Do not call this directly.
3548 * Use b43legacy_controller_restart()
3549 */
3550static void b43legacy_chip_reset(struct work_struct *work)
3551{
3552        struct b43legacy_wldev *dev =
3553                container_of(work, struct b43legacy_wldev, restart_work);
3554        struct b43legacy_wl *wl = dev->wl;
3555        int err = 0;
3556        int prev_status;
3557
3558        mutex_lock(&wl->mutex);
3559
3560        prev_status = b43legacy_status(dev);
3561        /* Bring the device down... */
3562        if (prev_status >= B43legacy_STAT_STARTED)
3563                b43legacy_wireless_core_stop(dev);
3564        if (prev_status >= B43legacy_STAT_INITIALIZED)
3565                b43legacy_wireless_core_exit(dev);
3566
3567        /* ...and up again. */
3568        if (prev_status >= B43legacy_STAT_INITIALIZED) {
3569                err = b43legacy_wireless_core_init(dev);
3570                if (err)
3571                        goto out;
3572        }
3573        if (prev_status >= B43legacy_STAT_STARTED) {
3574                err = b43legacy_wireless_core_start(dev);
3575                if (err) {
3576                        b43legacy_wireless_core_exit(dev);
3577                        goto out;
3578                }
3579        }
3580out:
3581        if (err)
3582                wl->current_dev = NULL; /* Failed to init the dev. */
3583        mutex_unlock(&wl->mutex);
3584        if (err)
3585                b43legacyerr(wl, "Controller restart FAILED\n");
3586        else
3587                b43legacyinfo(wl, "Controller restarted\n");
3588}
3589
3590static int b43legacy_setup_modes(struct b43legacy_wldev *dev,
3591                                 int have_bphy,
3592                                 int have_gphy)
3593{
3594        struct ieee80211_hw *hw = dev->wl->hw;
3595        struct b43legacy_phy *phy = &dev->phy;
3596
3597        phy->possible_phymodes = 0;
3598        if (have_bphy) {
3599                hw->wiphy->bands[NL80211_BAND_2GHZ] =
3600                        &b43legacy_band_2GHz_BPHY;
3601                phy->possible_phymodes |= B43legacy_PHYMODE_B;
3602        }
3603
3604        if (have_gphy) {
3605                hw->wiphy->bands[NL80211_BAND_2GHZ] =
3606                        &b43legacy_band_2GHz_GPHY;
3607                phy->possible_phymodes |= B43legacy_PHYMODE_G;
3608        }
3609
3610        return 0;
3611}
3612
3613static void b43legacy_wireless_core_detach(struct b43legacy_wldev *dev)
3614{
3615        /* We release firmware that late to not be required to re-request
3616         * is all the time when we reinit the core. */
3617        b43legacy_release_firmware(dev);
3618}
3619
3620static int b43legacy_wireless_core_attach(struct b43legacy_wldev *dev)
3621{
3622        struct b43legacy_wl *wl = dev->wl;
3623        struct ssb_bus *bus = dev->dev->bus;
3624        struct pci_dev *pdev = (bus->bustype == SSB_BUSTYPE_PCI) ? bus->host_pci : NULL;
3625        int err;
3626        int have_bphy = 0;
3627        int have_gphy = 0;
3628        u32 tmp;
3629
3630        /* Do NOT do any device initialization here.
3631         * Do it in wireless_core_init() instead.
3632         * This function is for gathering basic information about the HW, only.
3633         * Also some structs may be set up here. But most likely you want to
3634         * have that in core_init(), too.
3635         */
3636
3637        err = ssb_bus_powerup(bus, 0);
3638        if (err) {
3639                b43legacyerr(wl, "Bus powerup failed\n");
3640                goto out;
3641        }
3642        /* Get the PHY type. */
3643        if (dev->dev->id.revision >= 5) {
3644                u32 tmshigh;
3645
3646                tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
3647                have_gphy = !!(tmshigh & B43legacy_TMSHIGH_GPHY);
3648                if (!have_gphy)
3649                        have_bphy = 1;
3650        } else if (dev->dev->id.revision == 4)
3651                have_gphy = 1;
3652        else
3653                have_bphy = 1;
3654
3655        dev->phy.gmode = (have_gphy || have_bphy);
3656        dev->phy.radio_on = true;
3657        tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3658        b43legacy_wireless_core_reset(dev, tmp);
3659
3660        err = b43legacy_phy_versioning(dev);
3661        if (err)
3662                goto err_powerdown;
3663        /* Check if this device supports multiband. */
3664        if (!pdev ||
3665            (pdev->device != 0x4312 &&
3666             pdev->device != 0x4319 &&
3667             pdev->device != 0x4324)) {
3668                /* No multiband support. */
3669                have_bphy = 0;
3670                have_gphy = 0;
3671                switch (dev->phy.type) {
3672                case B43legacy_PHYTYPE_B:
3673                        have_bphy = 1;
3674                        break;
3675                case B43legacy_PHYTYPE_G:
3676                        have_gphy = 1;
3677                        break;
3678                default:
3679                        B43legacy_BUG_ON(1);
3680                }
3681        }
3682        dev->phy.gmode = (have_gphy || have_bphy);
3683        tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3684        b43legacy_wireless_core_reset(dev, tmp);
3685
3686        err = b43legacy_validate_chipaccess(dev);
3687        if (err)
3688                goto err_powerdown;
3689        err = b43legacy_setup_modes(dev, have_bphy, have_gphy);
3690        if (err)
3691                goto err_powerdown;
3692
3693        /* Now set some default "current_dev" */
3694        if (!wl->current_dev)
3695                wl->current_dev = dev;
3696        INIT_WORK(&dev->restart_work, b43legacy_chip_reset);
3697
3698        b43legacy_radio_turn_off(dev, 1);
3699        b43legacy_switch_analog(dev, 0);
3700        ssb_device_disable(dev->dev, 0);
3701        ssb_bus_may_powerdown(bus);
3702
3703out:
3704        return err;
3705
3706err_powerdown:
3707        ssb_bus_may_powerdown(bus);
3708        return err;
3709}
3710
3711static void b43legacy_one_core_detach(struct ssb_device *dev)
3712{
3713        struct b43legacy_wldev *wldev;
3714        struct b43legacy_wl *wl;
3715
3716        /* Do not cancel ieee80211-workqueue based work here.
3717         * See comment in b43legacy_remove(). */
3718
3719        wldev = ssb_get_drvdata(dev);
3720        wl = wldev->wl;
3721        b43legacy_debugfs_remove_device(wldev);
3722        b43legacy_wireless_core_detach(wldev);
3723        list_del(&wldev->list);
3724        wl->nr_devs--;
3725        ssb_set_drvdata(dev, NULL);
3726        kfree(wldev);
3727}
3728
3729static int b43legacy_one_core_attach(struct ssb_device *dev,
3730                                     struct b43legacy_wl *wl)
3731{
3732        struct b43legacy_wldev *wldev;
3733        int err = -ENOMEM;
3734
3735        wldev = kzalloc(sizeof(*wldev), GFP_KERNEL);
3736        if (!wldev)
3737                goto out;
3738
3739        wldev->dev = dev;
3740        wldev->wl = wl;
3741        b43legacy_set_status(wldev, B43legacy_STAT_UNINIT);
3742        wldev->bad_frames_preempt = modparam_bad_frames_preempt;
3743        tasklet_init(&wldev->isr_tasklet,
3744                     (void (*)(unsigned long))b43legacy_interrupt_tasklet,
3745                     (unsigned long)wldev);
3746        if (modparam_pio)
3747                wldev->__using_pio = true;
3748        INIT_LIST_HEAD(&wldev->list);
3749
3750        err = b43legacy_wireless_core_attach(wldev);
3751        if (err)
3752                goto err_kfree_wldev;
3753
3754        list_add(&wldev->list, &wl->devlist);
3755        wl->nr_devs++;
3756        ssb_set_drvdata(dev, wldev);
3757        b43legacy_debugfs_add_device(wldev);
3758out:
3759        return err;
3760
3761err_kfree_wldev:
3762        kfree(wldev);
3763        return err;
3764}
3765
3766static void b43legacy_sprom_fixup(struct ssb_bus *bus)
3767{
3768        /* boardflags workarounds */
3769        if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
3770            bus->boardinfo.type == 0x4E &&
3771            bus->sprom.board_rev > 0x40)
3772                bus->sprom.boardflags_lo |= B43legacy_BFL_PACTRL;
3773}
3774
3775static void b43legacy_wireless_exit(struct ssb_device *dev,
3776                                  struct b43legacy_wl *wl)
3777{
3778        struct ieee80211_hw *hw = wl->hw;
3779
3780        ssb_set_devtypedata(dev, NULL);
3781        ieee80211_free_hw(hw);
3782}
3783
3784static int b43legacy_wireless_init(struct ssb_device *dev)
3785{
3786        struct ssb_sprom *sprom = &dev->bus->sprom;
3787        struct ieee80211_hw *hw;
3788        struct b43legacy_wl *wl;
3789        int err = -ENOMEM;
3790        int queue_num;
3791
3792        b43legacy_sprom_fixup(dev->bus);
3793
3794        hw = ieee80211_alloc_hw(sizeof(*wl), &b43legacy_hw_ops);
3795        if (!hw) {
3796                b43legacyerr(NULL, "Could not allocate ieee80211 device\n");
3797                goto out;
3798        }
3799
3800        /* fill hw info */
3801        ieee80211_hw_set(hw, RX_INCLUDES_FCS);
3802        ieee80211_hw_set(hw, SIGNAL_DBM);
3803
3804        hw->wiphy->interface_modes =
3805                BIT(NL80211_IFTYPE_AP) |
3806                BIT(NL80211_IFTYPE_STATION) |
3807#ifdef CONFIG_WIRELESS_WDS
3808                BIT(NL80211_IFTYPE_WDS) |
3809#endif
3810                BIT(NL80211_IFTYPE_ADHOC);
3811        hw->queues = 1; /* FIXME: hardware has more queues */
3812        hw->max_rates = 2;
3813        SET_IEEE80211_DEV(hw, dev->dev);
3814        if (is_valid_ether_addr(sprom->et1mac))
3815                SET_IEEE80211_PERM_ADDR(hw, sprom->et1mac);
3816        else
3817                SET_IEEE80211_PERM_ADDR(hw, sprom->il0mac);
3818
3819        wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST);
3820
3821        /* Get and initialize struct b43legacy_wl */
3822        wl = hw_to_b43legacy_wl(hw);
3823        memset(wl, 0, sizeof(*wl));
3824        wl->hw = hw;
3825        spin_lock_init(&wl->irq_lock);
3826        spin_lock_init(&wl->leds_lock);
3827        mutex_init(&wl->mutex);
3828        INIT_LIST_HEAD(&wl->devlist);
3829        INIT_WORK(&wl->beacon_update_trigger, b43legacy_beacon_update_trigger_work);
3830        INIT_WORK(&wl->tx_work, b43legacy_tx_work);
3831
3832        /* Initialize queues and flags. */
3833        for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
3834                skb_queue_head_init(&wl->tx_queue[queue_num]);
3835                wl->tx_queue_stopped[queue_num] = 0;
3836        }
3837
3838        ssb_set_devtypedata(dev, wl);
3839        b43legacyinfo(wl, "Broadcom %04X WLAN found (core revision %u)\n",
3840                      dev->bus->chip_id, dev->id.revision);
3841        err = 0;
3842out:
3843        return err;
3844}
3845
3846static int b43legacy_probe(struct ssb_device *dev,
3847                         const struct ssb_device_id *id)
3848{
3849        struct b43legacy_wl *wl;
3850        int err;
3851        int first = 0;
3852
3853        wl = ssb_get_devtypedata(dev);
3854        if (!wl) {
3855                /* Probing the first core - setup common struct b43legacy_wl */
3856                first = 1;
3857                err = b43legacy_wireless_init(dev);
3858                if (err)
3859                        goto out;
3860                wl = ssb_get_devtypedata(dev);
3861                B43legacy_WARN_ON(!wl);
3862        }
3863        err = b43legacy_one_core_attach(dev, wl);
3864        if (err)
3865                goto err_wireless_exit;
3866
3867        /* setup and start work to load firmware */
3868        INIT_WORK(&wl->firmware_load, b43legacy_request_firmware);
3869        schedule_work(&wl->firmware_load);
3870
3871out:
3872        return err;
3873
3874err_wireless_exit:
3875        if (first)
3876                b43legacy_wireless_exit(dev, wl);
3877        return err;
3878}
3879
3880static void b43legacy_remove(struct ssb_device *dev)
3881{
3882        struct b43legacy_wl *wl = ssb_get_devtypedata(dev);
3883        struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3884
3885        /* We must cancel any work here before unregistering from ieee80211,
3886         * as the ieee80211 unreg will destroy the workqueue. */
3887        cancel_work_sync(&wldev->restart_work);
3888        cancel_work_sync(&wl->firmware_load);
3889        complete(&wldev->fw_load_complete);
3890
3891        B43legacy_WARN_ON(!wl);
3892        if (!wldev->fw.ucode)
3893                return;                 /* NULL if fw never loaded */
3894        if (wl->current_dev == wldev)
3895                ieee80211_unregister_hw(wl->hw);
3896
3897        b43legacy_one_core_detach(dev);
3898
3899        if (list_empty(&wl->devlist))
3900                /* Last core on the chip unregistered.
3901                 * We can destroy common struct b43legacy_wl.
3902                 */
3903                b43legacy_wireless_exit(dev, wl);
3904}
3905
3906/* Perform a hardware reset. This can be called from any context. */
3907void b43legacy_controller_restart(struct b43legacy_wldev *dev,
3908                                  const char *reason)
3909{
3910        /* Must avoid requeueing, if we are in shutdown. */
3911        if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED)
3912                return;
3913        b43legacyinfo(dev->wl, "Controller RESET (%s) ...\n", reason);
3914        ieee80211_queue_work(dev->wl->hw, &dev->restart_work);
3915}
3916
3917#ifdef CONFIG_PM
3918
3919static int b43legacy_suspend(struct ssb_device *dev, pm_message_t state)
3920{
3921        struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3922        struct b43legacy_wl *wl = wldev->wl;
3923
3924        b43legacydbg(wl, "Suspending...\n");
3925
3926        mutex_lock(&wl->mutex);
3927        wldev->suspend_init_status = b43legacy_status(wldev);
3928        if (wldev->suspend_init_status >= B43legacy_STAT_STARTED)
3929                b43legacy_wireless_core_stop(wldev);
3930        if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED)
3931                b43legacy_wireless_core_exit(wldev);
3932        mutex_unlock(&wl->mutex);
3933
3934        b43legacydbg(wl, "Device suspended.\n");
3935
3936        return 0;
3937}
3938
3939static int b43legacy_resume(struct ssb_device *dev)
3940{
3941        struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3942        struct b43legacy_wl *wl = wldev->wl;
3943        int err = 0;
3944
3945        b43legacydbg(wl, "Resuming...\n");
3946
3947        mutex_lock(&wl->mutex);
3948        if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) {
3949                err = b43legacy_wireless_core_init(wldev);
3950                if (err) {
3951                        b43legacyerr(wl, "Resume failed at core init\n");
3952                        goto out;
3953                }
3954        }
3955        if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) {
3956                err = b43legacy_wireless_core_start(wldev);
3957                if (err) {
3958                        b43legacy_wireless_core_exit(wldev);
3959                        b43legacyerr(wl, "Resume failed at core start\n");
3960                        goto out;
3961                }
3962        }
3963
3964        b43legacydbg(wl, "Device resumed.\n");
3965out:
3966        mutex_unlock(&wl->mutex);
3967        return err;
3968}
3969
3970#else   /* CONFIG_PM */
3971# define b43legacy_suspend      NULL
3972# define b43legacy_resume               NULL
3973#endif  /* CONFIG_PM */
3974
3975static struct ssb_driver b43legacy_ssb_driver = {
3976        .name           = KBUILD_MODNAME,
3977        .id_table       = b43legacy_ssb_tbl,
3978        .probe          = b43legacy_probe,
3979        .remove         = b43legacy_remove,
3980        .suspend        = b43legacy_suspend,
3981        .resume         = b43legacy_resume,
3982};
3983
3984static void b43legacy_print_driverinfo(void)
3985{
3986        const char *feat_pci = "", *feat_leds = "",
3987                   *feat_pio = "", *feat_dma = "";
3988
3989#ifdef CONFIG_B43LEGACY_PCI_AUTOSELECT
3990        feat_pci = "P";
3991#endif
3992#ifdef CONFIG_B43LEGACY_LEDS
3993        feat_leds = "L";
3994#endif
3995#ifdef CONFIG_B43LEGACY_PIO
3996        feat_pio = "I";
3997#endif
3998#ifdef CONFIG_B43LEGACY_DMA
3999        feat_dma = "D";
4000#endif
4001        printk(KERN_INFO "Broadcom 43xx-legacy driver loaded "
4002               "[ Features: %s%s%s%s ]\n",
4003               feat_pci, feat_leds, feat_pio, feat_dma);
4004}
4005
4006static int __init b43legacy_init(void)
4007{
4008        int err;
4009
4010        b43legacy_debugfs_init();
4011
4012        err = ssb_driver_register(&b43legacy_ssb_driver);
4013        if (err)
4014                goto err_dfs_exit;
4015
4016        b43legacy_print_driverinfo();
4017
4018        return err;
4019
4020err_dfs_exit:
4021        b43legacy_debugfs_exit();
4022        return err;
4023}
4024
4025static void __exit b43legacy_exit(void)
4026{
4027        ssb_driver_unregister(&b43legacy_ssb_driver);
4028        b43legacy_debugfs_exit();
4029}
4030
4031module_init(b43legacy_init)
4032module_exit(b43legacy_exit)
4033