1
2
3
4
5
6#include <linux/types.h>
7#include <linux/atomic.h>
8#include <linux/kernel.h>
9#include <linux/kthread.h>
10#include <linux/printk.h>
11#include <linux/pci_ids.h>
12#include <linux/netdevice.h>
13#include <linux/interrupt.h>
14#include <linux/sched/signal.h>
15#include <linux/mmc/sdio.h>
16#include <linux/mmc/sdio_ids.h>
17#include <linux/mmc/sdio_func.h>
18#include <linux/mmc/card.h>
19#include <linux/semaphore.h>
20#include <linux/firmware.h>
21#include <linux/module.h>
22#include <linux/bcma/bcma.h>
23#include <linux/debugfs.h>
24#include <linux/vmalloc.h>
25#include <asm/unaligned.h>
26#include <defs.h>
27#include <brcmu_wifi.h>
28#include <brcmu_utils.h>
29#include <brcm_hw_ids.h>
30#include <soc.h>
31#include "sdio.h"
32#include "chip.h"
33#include "firmware.h"
34#include "core.h"
35#include "common.h"
36#include "bcdc.h"
37
38#define DCMD_RESP_TIMEOUT msecs_to_jiffies(2500)
39#define CTL_DONE_TIMEOUT msecs_to_jiffies(2500)
40
41
42#define DEFAULT_F2_WATERMARK 0x8
43#define CY_4373_F2_WATERMARK 0x40
44#define CY_43012_F2_WATERMARK 0x60
45
46#ifdef DEBUG
47
48#define BRCMF_TRAP_INFO_SIZE 80
49
50#define CBUF_LEN (128)
51
52
53#define CONSOLE_BUFFER_MAX 2024
54
55struct rte_log_le {
56 __le32 buf;
57 __le32 buf_size;
58 __le32 idx;
59 char *_buf_compat;
60};
61
62struct rte_console {
63
64
65
66
67
68
69
70
71
72 uint vcons_in;
73 uint vcons_out;
74
75
76
77
78
79
80
81 struct rte_log_le log_le;
82
83
84
85
86
87
88
89 uint cbuf_idx;
90 char cbuf[CBUF_LEN];
91};
92
93#endif
94#include <chipcommon.h>
95
96#include "bus.h"
97#include "debug.h"
98#include "tracepoint.h"
99
100#define TXQLEN 2048
101#define TXHI (TXQLEN - 256)
102#define TXLOW (TXHI - 256)
103#define PRIOMASK 7
104
105#define TXRETRIES 2
106
107#define BRCMF_RXBOUND 50
108
109
110#define BRCMF_TXBOUND 20
111
112
113#define BRCMF_TXMINMAX 1
114
115#define MEMBLOCK 2048
116
117#define MAX_DATA_BUF (32 * 1024)
118
119
120#define BRCMF_FIRSTREAD (1 << 6)
121
122#define BRCMF_CONSOLE 10
123
124
125
126
127#define SBSDIO_DEVCTL_SETBUSY 0x01
128
129#define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02
130
131#define SBSDIO_DEVCTL_CA_INT_ONLY 0x04
132
133
134#define SBSDIO_DEVCTL_PADS_ISO 0x08
135
136#define SBSDIO_DEVCTL_F2WM_ENAB 0x10
137
138#define SBSDIO_DEVCTL_SB_RST_CTL 0x30
139
140#define SBSDIO_DEVCTL_RST_CORECTL 0x00
141
142#define SBSDIO_DEVCTL_RST_BPRESET 0x10
143
144#define SBSDIO_DEVCTL_RST_NOBPRESET 0x20
145
146
147
148
149#define SBSDIO_CIS_BASE_COMMON 0x1000
150
151#define SBSDIO_CIS_SIZE_LIMIT 0x200
152
153#define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF
154
155
156#define SBSDIO_CIS_MANFID_TUPLE_LEN 6
157
158#define SD_REG(field) \
159 (offsetof(struct sdpcmd_regs, field))
160
161
162
163#define SBSDIO_FORCE_ALP 0x01
164
165#define SBSDIO_FORCE_HT 0x02
166
167#define SBSDIO_FORCE_ILP 0x04
168
169#define SBSDIO_ALP_AVAIL_REQ 0x08
170
171#define SBSDIO_HT_AVAIL_REQ 0x10
172
173#define SBSDIO_FORCE_HW_CLKREQ_OFF 0x20
174
175#define SBSDIO_ALP_AVAIL 0x40
176
177#define SBSDIO_HT_AVAIL 0x80
178#define SBSDIO_CSR_MASK 0x1F
179#define SBSDIO_AVBITS (SBSDIO_HT_AVAIL | SBSDIO_ALP_AVAIL)
180#define SBSDIO_ALPAV(regval) ((regval) & SBSDIO_AVBITS)
181#define SBSDIO_HTAV(regval) (((regval) & SBSDIO_AVBITS) == SBSDIO_AVBITS)
182#define SBSDIO_ALPONLY(regval) (SBSDIO_ALPAV(regval) && !SBSDIO_HTAV(regval))
183#define SBSDIO_CLKAV(regval, alponly) \
184 (SBSDIO_ALPAV(regval) && (alponly ? 1 : SBSDIO_HTAV(regval)))
185
186
187#define I_SMB_SW0 (1 << 0)
188#define I_SMB_SW1 (1 << 1)
189#define I_SMB_SW2 (1 << 2)
190#define I_SMB_SW3 (1 << 3)
191#define I_SMB_SW_MASK 0x0000000f
192#define I_SMB_SW_SHIFT 0
193#define I_HMB_SW0 (1 << 4)
194#define I_HMB_SW1 (1 << 5)
195#define I_HMB_SW2 (1 << 6)
196#define I_HMB_SW3 (1 << 7)
197#define I_HMB_SW_MASK 0x000000f0
198#define I_HMB_SW_SHIFT 4
199#define I_WR_OOSYNC (1 << 8)
200#define I_RD_OOSYNC (1 << 9)
201#define I_PC (1 << 10)
202#define I_PD (1 << 11)
203#define I_DE (1 << 12)
204#define I_RU (1 << 13)
205#define I_RO (1 << 14)
206#define I_XU (1 << 15)
207#define I_RI (1 << 16)
208#define I_BUSPWR (1 << 17)
209#define I_XMTDATA_AVAIL (1 << 23)
210#define I_XI (1 << 24)
211#define I_RF_TERM (1 << 25)
212#define I_WF_TERM (1 << 26)
213#define I_PCMCIA_XU (1 << 27)
214#define I_SBINT (1 << 28)
215#define I_CHIPACTIVE (1 << 29)
216#define I_SRESET (1 << 30)
217#define I_IOE2 (1U << 31)
218#define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU)
219#define I_DMA (I_RI | I_XI | I_ERRORS)
220
221
222#define CC_CISRDY (1 << 0)
223#define CC_BPRESEN (1 << 1)
224#define CC_F2RDY (1 << 2)
225#define CC_CLRPADSISO (1 << 3)
226#define CC_XMTDATAAVAIL_MODE (1 << 4)
227#define CC_XMTDATAAVAIL_CTRL (1 << 5)
228
229
230#define SFC_RF_TERM (1 << 0)
231#define SFC_WF_TERM (1 << 1)
232#define SFC_CRC4WOOS (1 << 2)
233#define SFC_ABORTALL (1 << 3)
234
235
236
237
238
239
240#define SMB_NAK (1 << 0)
241#define SMB_INT_ACK (1 << 1)
242#define SMB_USE_OOB (1 << 2)
243#define SMB_DEV_INT (1 << 3)
244
245
246#define SMB_DATA_VERSION_SHIFT 16
247
248
249
250
251
252
253#define I_HMB_FC_STATE I_HMB_SW0
254#define I_HMB_FC_CHANGE I_HMB_SW1
255#define I_HMB_FRAME_IND I_HMB_SW2
256#define I_HMB_HOST_INT I_HMB_SW3
257
258
259#define HMB_DATA_NAKHANDLED 0x0001
260#define HMB_DATA_DEVREADY 0x0002
261#define HMB_DATA_FC 0x0004
262#define HMB_DATA_FWREADY 0x0008
263#define HMB_DATA_FWHALT 0x0010
264
265#define HMB_DATA_FCDATA_MASK 0xff000000
266#define HMB_DATA_FCDATA_SHIFT 24
267
268#define HMB_DATA_VERSION_MASK 0x00ff0000
269#define HMB_DATA_VERSION_SHIFT 16
270
271
272
273
274
275
276#define SDPCM_PROT_VERSION 4
277
278
279
280
281
282#define SDPCM_SHARED_VERSION 0x0003
283#define SDPCM_SHARED_VERSION_MASK 0x00FF
284#define SDPCM_SHARED_ASSERT_BUILT 0x0100
285#define SDPCM_SHARED_ASSERT 0x0200
286#define SDPCM_SHARED_TRAP 0x0400
287
288
289#define MAX_HDR_READ (1 << 6)
290#define MAX_RX_DATASZ 2048
291
292
293
294
295
296
297#undef PMU_MAX_TRANSITION_DLY
298#define PMU_MAX_TRANSITION_DLY 1000000
299
300
301#define BRCMF_INIT_CLKCTL1 (SBSDIO_FORCE_HW_CLKREQ_OFF | \
302 SBSDIO_ALP_AVAIL_REQ)
303
304
305#define F2SYNC (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
306
307#define BRCMF_IDLE_ACTIVE 0
308
309
310#define BRCMF_IDLE_INTERVAL 1
311
312#define KSO_WAIT_US 50
313#define MAX_KSO_ATTEMPTS (PMU_MAX_TRANSITION_DLY/KSO_WAIT_US)
314#define BRCMF_SDIO_MAX_ACCESS_ERRORS 5
315
316
317
318
319static uint prio2prec(u32 prio)
320{
321 return (prio == PRIO_8021D_NONE || prio == PRIO_8021D_BE) ?
322 (prio^2) : prio;
323}
324
325#ifdef DEBUG
326
327struct brcmf_console {
328 uint count;
329 uint log_addr;
330 struct rte_log_le log_le;
331 uint bufsize;
332 u8 *buf;
333 uint last;
334};
335
336struct brcmf_trap_info {
337 __le32 type;
338 __le32 epc;
339 __le32 cpsr;
340 __le32 spsr;
341 __le32 r0;
342 __le32 r1;
343 __le32 r2;
344 __le32 r3;
345 __le32 r4;
346 __le32 r5;
347 __le32 r6;
348 __le32 r7;
349 __le32 r8;
350 __le32 r9;
351 __le32 r10;
352 __le32 r11;
353 __le32 r12;
354 __le32 r13;
355 __le32 r14;
356 __le32 pc;
357};
358#endif
359
360struct sdpcm_shared {
361 u32 flags;
362 u32 trap_addr;
363 u32 assert_exp_addr;
364 u32 assert_file_addr;
365 u32 assert_line;
366 u32 console_addr;
367 u32 msgtrace_addr;
368 u8 tag[32];
369 u32 brpt_addr;
370};
371
372struct sdpcm_shared_le {
373 __le32 flags;
374 __le32 trap_addr;
375 __le32 assert_exp_addr;
376 __le32 assert_file_addr;
377 __le32 assert_line;
378 __le32 console_addr;
379 __le32 msgtrace_addr;
380 u8 tag[32];
381 __le32 brpt_addr;
382};
383
384
385struct brcmf_sdio_hdrinfo {
386 u8 seq_num;
387 u8 channel;
388 u16 len;
389 u16 len_left;
390 u16 len_nxtfrm;
391 u8 dat_offset;
392 bool lastfrm;
393 u16 tail_pad;
394};
395
396
397
398
399struct brcmf_sdio_count {
400 uint intrcount;
401 uint lastintrs;
402 uint pollcnt;
403 uint regfails;
404 uint tx_sderrs;
405 uint fcqueued;
406 uint rxrtx;
407 uint rx_toolong;
408 uint rxc_errors;
409 uint rx_hdrfail;
410 uint rx_badhdr;
411 uint rx_badseq;
412 uint fc_rcvd;
413 uint fc_xoff;
414 uint fc_xon;
415 uint rxglomfail;
416 uint rxglomframes;
417 uint rxglompkts;
418 uint f2rxhdrs;
419 uint f2rxdata;
420 uint f2txdata;
421 uint f1regdata;
422 uint tickcnt;
423 ulong tx_ctlerrs;
424 ulong tx_ctlpkts;
425 ulong rx_ctlerrs;
426 ulong rx_ctlpkts;
427 ulong rx_readahead_cnt;
428};
429
430
431
432struct brcmf_sdio {
433 struct brcmf_sdio_dev *sdiodev;
434 struct brcmf_chip *ci;
435 struct brcmf_core *sdio_core;
436
437 u32 hostintmask;
438 atomic_t intstatus;
439 atomic_t fcstate;
440
441 uint blocksize;
442 uint roundup;
443
444 struct pktq txq;
445 u8 flowcontrol;
446 u8 tx_seq;
447 u8 tx_max;
448
449 u8 *hdrbuf;
450 u8 *rxhdr;
451 u8 rx_seq;
452 struct brcmf_sdio_hdrinfo cur_read;
453
454 bool rxskip;
455 bool rxpending;
456
457 uint rxbound;
458 uint txbound;
459 uint txminmax;
460
461 struct sk_buff *glomd;
462 struct sk_buff_head glom;
463
464 u8 *rxbuf;
465 uint rxblen;
466 u8 *rxctl;
467 u8 *rxctl_orig;
468 uint rxlen;
469 spinlock_t rxctl_lock;
470
471 u8 sdpcm_ver;
472
473 bool intr;
474 bool poll;
475 atomic_t ipend;
476 uint spurious;
477 uint pollrate;
478 uint polltick;
479
480#ifdef DEBUG
481 uint console_interval;
482 struct brcmf_console console;
483 uint console_addr;
484#endif
485
486 uint clkstate;
487 s32 idletime;
488 s32 idlecount;
489 s32 idleclock;
490 bool rxflow_mode;
491 bool rxflow;
492 bool alp_only;
493
494 u8 *ctrl_frame_buf;
495 u16 ctrl_frame_len;
496 bool ctrl_frame_stat;
497 int ctrl_frame_err;
498
499 spinlock_t txq_lock;
500 wait_queue_head_t ctrl_wait;
501 wait_queue_head_t dcmd_resp_wait;
502
503 struct timer_list timer;
504 struct completion watchdog_wait;
505 struct task_struct *watchdog_tsk;
506 bool wd_active;
507
508 struct workqueue_struct *brcmf_wq;
509 struct work_struct datawork;
510 bool dpc_triggered;
511 bool dpc_running;
512
513 bool txoff;
514 struct brcmf_sdio_count sdcnt;
515 bool sr_enabled;
516 bool sleeping;
517
518 u8 tx_hdrlen;
519 bool txglom;
520 u16 head_align;
521 u16 sgentry_align;
522};
523
524
525#define CLK_NONE 0
526#define CLK_SDONLY 1
527#define CLK_PENDING 2
528#define CLK_AVAIL 3
529
530#ifdef DEBUG
531static int qcount[NUMPRIO];
532#endif
533
534#define DEFAULT_SDIO_DRIVE_STRENGTH 6
535
536#define RETRYCHAN(chan) ((chan) == SDPCM_EVENT_CHANNEL)
537
538
539static const uint max_roundup = 512;
540
541#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
542#define ALIGNMENT 8
543#else
544#define ALIGNMENT 4
545#endif
546
547enum brcmf_sdio_frmtype {
548 BRCMF_SDIO_FT_NORMAL,
549 BRCMF_SDIO_FT_SUPER,
550 BRCMF_SDIO_FT_SUB,
551};
552
553#define SDIOD_DRVSTR_KEY(chip, pmu) (((chip) << 16) | (pmu))
554
555
556struct sdiod_drive_str {
557 u8 strength;
558 u8 sel;
559};
560
561
562static const struct sdiod_drive_str sdiod_drvstr_tab1_1v8[] = {
563 {32, 0x6},
564 {26, 0x7},
565 {22, 0x4},
566 {16, 0x5},
567 {12, 0x2},
568 {8, 0x3},
569 {4, 0x0},
570 {0, 0x1}
571};
572
573
574static const struct sdiod_drive_str sdiod_drive_strength_tab5_1v8[] = {
575 {6, 0x7},
576 {5, 0x6},
577 {4, 0x5},
578 {3, 0x4},
579 {2, 0x2},
580 {1, 0x1},
581 {0, 0x0}
582};
583
584
585static const struct sdiod_drive_str sdiod_drvstr_tab6_1v8[] = {
586 {3, 0x3},
587 {2, 0x2},
588 {1, 0x1},
589 {0, 0x0} };
590
591
592static const struct sdiod_drive_str sdiod_drvstr_tab2_3v3[] = {
593 {16, 0x7},
594 {12, 0x5},
595 {8, 0x3},
596 {4, 0x1}
597};
598
599BRCMF_FW_DEF(43143, "brcmfmac43143-sdio");
600BRCMF_FW_DEF(43241B0, "brcmfmac43241b0-sdio");
601BRCMF_FW_DEF(43241B4, "brcmfmac43241b4-sdio");
602BRCMF_FW_DEF(43241B5, "brcmfmac43241b5-sdio");
603BRCMF_FW_DEF(4329, "brcmfmac4329-sdio");
604BRCMF_FW_DEF(4330, "brcmfmac4330-sdio");
605BRCMF_FW_DEF(4334, "brcmfmac4334-sdio");
606BRCMF_FW_DEF(43340, "brcmfmac43340-sdio");
607BRCMF_FW_DEF(4335, "brcmfmac4335-sdio");
608BRCMF_FW_DEF(43362, "brcmfmac43362-sdio");
609BRCMF_FW_DEF(4339, "brcmfmac4339-sdio");
610BRCMF_FW_DEF(43430A0, "brcmfmac43430a0-sdio");
611
612BRCMF_FW_DEF(43430A1, "brcmfmac43430-sdio");
613BRCMF_FW_DEF(43455, "brcmfmac43455-sdio");
614BRCMF_FW_DEF(43456, "brcmfmac43456-sdio");
615BRCMF_FW_DEF(4354, "brcmfmac4354-sdio");
616BRCMF_FW_DEF(4356, "brcmfmac4356-sdio");
617BRCMF_FW_DEF(4373, "brcmfmac4373-sdio");
618BRCMF_FW_DEF(43012, "brcmfmac43012-sdio");
619
620static const struct brcmf_firmware_mapping brcmf_sdio_fwnames[] = {
621 BRCMF_FW_ENTRY(BRCM_CC_43143_CHIP_ID, 0xFFFFFFFF, 43143),
622 BRCMF_FW_ENTRY(BRCM_CC_43241_CHIP_ID, 0x0000001F, 43241B0),
623 BRCMF_FW_ENTRY(BRCM_CC_43241_CHIP_ID, 0x00000020, 43241B4),
624 BRCMF_FW_ENTRY(BRCM_CC_43241_CHIP_ID, 0xFFFFFFC0, 43241B5),
625 BRCMF_FW_ENTRY(BRCM_CC_4329_CHIP_ID, 0xFFFFFFFF, 4329),
626 BRCMF_FW_ENTRY(BRCM_CC_4330_CHIP_ID, 0xFFFFFFFF, 4330),
627 BRCMF_FW_ENTRY(BRCM_CC_4334_CHIP_ID, 0xFFFFFFFF, 4334),
628 BRCMF_FW_ENTRY(BRCM_CC_43340_CHIP_ID, 0xFFFFFFFF, 43340),
629 BRCMF_FW_ENTRY(BRCM_CC_43341_CHIP_ID, 0xFFFFFFFF, 43340),
630 BRCMF_FW_ENTRY(BRCM_CC_4335_CHIP_ID, 0xFFFFFFFF, 4335),
631 BRCMF_FW_ENTRY(BRCM_CC_43362_CHIP_ID, 0xFFFFFFFE, 43362),
632 BRCMF_FW_ENTRY(BRCM_CC_4339_CHIP_ID, 0xFFFFFFFF, 4339),
633 BRCMF_FW_ENTRY(BRCM_CC_43430_CHIP_ID, 0x00000001, 43430A0),
634 BRCMF_FW_ENTRY(BRCM_CC_43430_CHIP_ID, 0xFFFFFFFE, 43430A1),
635 BRCMF_FW_ENTRY(BRCM_CC_4345_CHIP_ID, 0x00000200, 43456),
636 BRCMF_FW_ENTRY(BRCM_CC_4345_CHIP_ID, 0xFFFFFDC0, 43455),
637 BRCMF_FW_ENTRY(BRCM_CC_4354_CHIP_ID, 0xFFFFFFFF, 4354),
638 BRCMF_FW_ENTRY(BRCM_CC_4356_CHIP_ID, 0xFFFFFFFF, 4356),
639 BRCMF_FW_ENTRY(CY_CC_4373_CHIP_ID, 0xFFFFFFFF, 4373),
640 BRCMF_FW_ENTRY(CY_CC_43012_CHIP_ID, 0xFFFFFFFF, 43012)
641};
642
643static void pkt_align(struct sk_buff *p, int len, int align)
644{
645 uint datalign;
646 datalign = (unsigned long)(p->data);
647 datalign = roundup(datalign, (align)) - datalign;
648 if (datalign)
649 skb_pull(p, datalign);
650 __skb_trim(p, len);
651}
652
653
654static bool data_ok(struct brcmf_sdio *bus)
655{
656 return (u8)(bus->tx_max - bus->tx_seq) != 0 &&
657 ((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0;
658}
659
660static int
661brcmf_sdio_kso_control(struct brcmf_sdio *bus, bool on)
662{
663 u8 wr_val = 0, rd_val, cmp_val, bmask;
664 int err = 0;
665 int err_cnt = 0;
666 int try_cnt = 0;
667
668 brcmf_dbg(TRACE, "Enter: on=%d\n", on);
669
670 sdio_retune_crc_disable(bus->sdiodev->func1);
671
672
673 if (on)
674 sdio_retune_hold_now(bus->sdiodev->func1);
675
676 wr_val = (on << SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
677
678 brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, wr_val, &err);
679
680
681
682
683
684
685 if (!on && bus->ci->chip == CY_CC_43012_CHIP_ID)
686 return err;
687
688 if (on) {
689
690
691
692
693 cmp_val = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK |
694 SBSDIO_FUNC1_SLEEPCSR_DEVON_MASK;
695 bmask = cmp_val;
696 usleep_range(2000, 3000);
697 } else {
698
699 cmp_val = 0;
700
701
702
703 bmask = SBSDIO_FUNC1_SLEEPCSR_KSO_MASK;
704 }
705
706 do {
707
708
709
710
711
712 rd_val = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
713 &err);
714 if (!err) {
715 if ((rd_val & bmask) == cmp_val)
716 break;
717 err_cnt = 0;
718 }
719
720 if (err && (err_cnt++ > BRCMF_SDIO_MAX_ACCESS_ERRORS))
721 break;
722
723 udelay(KSO_WAIT_US);
724 brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, wr_val,
725 &err);
726
727 } while (try_cnt++ < MAX_KSO_ATTEMPTS);
728
729 if (try_cnt > 2)
730 brcmf_dbg(SDIO, "try_cnt=%d rd_val=0x%x err=%d\n", try_cnt,
731 rd_val, err);
732
733 if (try_cnt > MAX_KSO_ATTEMPTS)
734 brcmf_err("max tries: rd_val=0x%x err=%d\n", rd_val, err);
735
736 if (on)
737 sdio_retune_release(bus->sdiodev->func1);
738
739 sdio_retune_crc_enable(bus->sdiodev->func1);
740
741 return err;
742}
743
744#define HOSTINTMASK (I_HMB_SW_MASK | I_CHIPACTIVE)
745
746
747static int brcmf_sdio_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
748{
749 int err;
750 u8 clkctl, clkreq, devctl;
751 unsigned long timeout;
752
753 brcmf_dbg(SDIO, "Enter\n");
754
755 clkctl = 0;
756
757 if (bus->sr_enabled) {
758 bus->clkstate = (on ? CLK_AVAIL : CLK_SDONLY);
759 return 0;
760 }
761
762 if (on) {
763
764 clkreq =
765 bus->alp_only ? SBSDIO_ALP_AVAIL_REQ : SBSDIO_HT_AVAIL_REQ;
766
767 brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
768 clkreq, &err);
769 if (err) {
770 brcmf_err("HT Avail request error: %d\n", err);
771 return -EBADE;
772 }
773
774
775 clkctl = brcmf_sdiod_readb(bus->sdiodev,
776 SBSDIO_FUNC1_CHIPCLKCSR, &err);
777 if (err) {
778 brcmf_err("HT Avail read error: %d\n", err);
779 return -EBADE;
780 }
781
782
783 if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) {
784
785 devctl = brcmf_sdiod_readb(bus->sdiodev,
786 SBSDIO_DEVICE_CTL, &err);
787 if (err) {
788 brcmf_err("Devctl error setting CA: %d\n", err);
789 return -EBADE;
790 }
791
792 devctl |= SBSDIO_DEVCTL_CA_INT_ONLY;
793 brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_DEVICE_CTL,
794 devctl, &err);
795 brcmf_dbg(SDIO, "CLKCTL: set PENDING\n");
796 bus->clkstate = CLK_PENDING;
797
798 return 0;
799 } else if (bus->clkstate == CLK_PENDING) {
800
801 devctl = brcmf_sdiod_readb(bus->sdiodev,
802 SBSDIO_DEVICE_CTL, &err);
803 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
804 brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_DEVICE_CTL,
805 devctl, &err);
806 }
807
808
809 timeout = jiffies +
810 msecs_to_jiffies(PMU_MAX_TRANSITION_DLY/1000);
811 while (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
812 clkctl = brcmf_sdiod_readb(bus->sdiodev,
813 SBSDIO_FUNC1_CHIPCLKCSR,
814 &err);
815 if (time_after(jiffies, timeout))
816 break;
817 else
818 usleep_range(5000, 10000);
819 }
820 if (err) {
821 brcmf_err("HT Avail request error: %d\n", err);
822 return -EBADE;
823 }
824 if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) {
825 brcmf_err("HT Avail timeout (%d): clkctl 0x%02x\n",
826 PMU_MAX_TRANSITION_DLY, clkctl);
827 return -EBADE;
828 }
829
830
831 bus->clkstate = CLK_AVAIL;
832 brcmf_dbg(SDIO, "CLKCTL: turned ON\n");
833
834#if defined(DEBUG)
835 if (!bus->alp_only) {
836 if (SBSDIO_ALPONLY(clkctl))
837 brcmf_err("HT Clock should be on\n");
838 }
839#endif
840
841 } else {
842 clkreq = 0;
843
844 if (bus->clkstate == CLK_PENDING) {
845
846 devctl = brcmf_sdiod_readb(bus->sdiodev,
847 SBSDIO_DEVICE_CTL, &err);
848 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
849 brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_DEVICE_CTL,
850 devctl, &err);
851 }
852
853 bus->clkstate = CLK_SDONLY;
854 brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
855 clkreq, &err);
856 brcmf_dbg(SDIO, "CLKCTL: turned OFF\n");
857 if (err) {
858 brcmf_err("Failed access turning clock off: %d\n",
859 err);
860 return -EBADE;
861 }
862 }
863 return 0;
864}
865
866
867static int brcmf_sdio_sdclk(struct brcmf_sdio *bus, bool on)
868{
869 brcmf_dbg(SDIO, "Enter\n");
870
871 if (on)
872 bus->clkstate = CLK_SDONLY;
873 else
874 bus->clkstate = CLK_NONE;
875
876 return 0;
877}
878
879
880static int brcmf_sdio_clkctl(struct brcmf_sdio *bus, uint target, bool pendok)
881{
882#ifdef DEBUG
883 uint oldstate = bus->clkstate;
884#endif
885
886 brcmf_dbg(SDIO, "Enter\n");
887
888
889 if (bus->clkstate == target)
890 return 0;
891
892 switch (target) {
893 case CLK_AVAIL:
894
895 if (bus->clkstate == CLK_NONE)
896 brcmf_sdio_sdclk(bus, true);
897
898 brcmf_sdio_htclk(bus, true, pendok);
899 break;
900
901 case CLK_SDONLY:
902
903 if (bus->clkstate == CLK_NONE)
904 brcmf_sdio_sdclk(bus, true);
905 else if (bus->clkstate == CLK_AVAIL)
906 brcmf_sdio_htclk(bus, false, false);
907 else
908 brcmf_err("request for %d -> %d\n",
909 bus->clkstate, target);
910 break;
911
912 case CLK_NONE:
913
914 if (bus->clkstate == CLK_AVAIL)
915 brcmf_sdio_htclk(bus, false, false);
916
917 brcmf_sdio_sdclk(bus, false);
918 break;
919 }
920#ifdef DEBUG
921 brcmf_dbg(SDIO, "%d -> %d\n", oldstate, bus->clkstate);
922#endif
923
924 return 0;
925}
926
927static int
928brcmf_sdio_bus_sleep(struct brcmf_sdio *bus, bool sleep, bool pendok)
929{
930 int err = 0;
931 u8 clkcsr;
932
933 brcmf_dbg(SDIO, "Enter: request %s currently %s\n",
934 (sleep ? "SLEEP" : "WAKE"),
935 (bus->sleeping ? "SLEEP" : "WAKE"));
936
937
938 if (bus->sr_enabled) {
939
940 if (sleep == bus->sleeping)
941 goto end;
942
943
944 if (sleep) {
945 clkcsr = brcmf_sdiod_readb(bus->sdiodev,
946 SBSDIO_FUNC1_CHIPCLKCSR,
947 &err);
948 if ((clkcsr & SBSDIO_CSR_MASK) == 0) {
949 brcmf_dbg(SDIO, "no clock, set ALP\n");
950 brcmf_sdiod_writeb(bus->sdiodev,
951 SBSDIO_FUNC1_CHIPCLKCSR,
952 SBSDIO_ALP_AVAIL_REQ, &err);
953 }
954 err = brcmf_sdio_kso_control(bus, false);
955 } else {
956 err = brcmf_sdio_kso_control(bus, true);
957 }
958 if (err) {
959 brcmf_err("error while changing bus sleep state %d\n",
960 err);
961 goto done;
962 }
963 }
964
965end:
966
967 if (sleep) {
968 if (!bus->sr_enabled)
969 brcmf_sdio_clkctl(bus, CLK_NONE, pendok);
970 } else {
971 brcmf_sdio_clkctl(bus, CLK_AVAIL, pendok);
972 brcmf_sdio_wd_timer(bus, true);
973 }
974 bus->sleeping = sleep;
975 brcmf_dbg(SDIO, "new state %s\n",
976 (sleep ? "SLEEP" : "WAKE"));
977done:
978 brcmf_dbg(SDIO, "Exit: err=%d\n", err);
979 return err;
980
981}
982
983#ifdef DEBUG
984static inline bool brcmf_sdio_valid_shared_address(u32 addr)
985{
986 return !(addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff));
987}
988
989static int brcmf_sdio_readshared(struct brcmf_sdio *bus,
990 struct sdpcm_shared *sh)
991{
992 u32 addr = 0;
993 int rv;
994 u32 shaddr = 0;
995 struct sdpcm_shared_le sh_le;
996 __le32 addr_le;
997
998 sdio_claim_host(bus->sdiodev->func1);
999 brcmf_sdio_bus_sleep(bus, false, false);
1000
1001
1002
1003
1004
1005 shaddr = bus->ci->rambase + bus->ci->ramsize - 4;
1006 if (!bus->ci->rambase && brcmf_chip_sr_capable(bus->ci))
1007 shaddr -= bus->ci->srsize;
1008 rv = brcmf_sdiod_ramrw(bus->sdiodev, false, shaddr,
1009 (u8 *)&addr_le, 4);
1010 if (rv < 0)
1011 goto fail;
1012
1013
1014
1015
1016
1017 addr = le32_to_cpu(addr_le);
1018 if (!brcmf_sdio_valid_shared_address(addr)) {
1019 brcmf_err("invalid sdpcm_shared address 0x%08X\n", addr);
1020 rv = -EINVAL;
1021 goto fail;
1022 }
1023
1024 brcmf_dbg(INFO, "sdpcm_shared address 0x%08X\n", addr);
1025
1026
1027 rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&sh_le,
1028 sizeof(struct sdpcm_shared_le));
1029 if (rv < 0)
1030 goto fail;
1031
1032 sdio_release_host(bus->sdiodev->func1);
1033
1034
1035 sh->flags = le32_to_cpu(sh_le.flags);
1036 sh->trap_addr = le32_to_cpu(sh_le.trap_addr);
1037 sh->assert_exp_addr = le32_to_cpu(sh_le.assert_exp_addr);
1038 sh->assert_file_addr = le32_to_cpu(sh_le.assert_file_addr);
1039 sh->assert_line = le32_to_cpu(sh_le.assert_line);
1040 sh->console_addr = le32_to_cpu(sh_le.console_addr);
1041 sh->msgtrace_addr = le32_to_cpu(sh_le.msgtrace_addr);
1042
1043 if ((sh->flags & SDPCM_SHARED_VERSION_MASK) > SDPCM_SHARED_VERSION) {
1044 brcmf_err("sdpcm shared version unsupported: dhd %d dongle %d\n",
1045 SDPCM_SHARED_VERSION,
1046 sh->flags & SDPCM_SHARED_VERSION_MASK);
1047 return -EPROTO;
1048 }
1049 return 0;
1050
1051fail:
1052 brcmf_err("unable to obtain sdpcm_shared info: rv=%d (addr=0x%x)\n",
1053 rv, addr);
1054 sdio_release_host(bus->sdiodev->func1);
1055 return rv;
1056}
1057
1058static void brcmf_sdio_get_console_addr(struct brcmf_sdio *bus)
1059{
1060 struct sdpcm_shared sh;
1061
1062 if (brcmf_sdio_readshared(bus, &sh) == 0)
1063 bus->console_addr = sh.console_addr;
1064}
1065#else
1066static void brcmf_sdio_get_console_addr(struct brcmf_sdio *bus)
1067{
1068}
1069#endif
1070
1071static u32 brcmf_sdio_hostmail(struct brcmf_sdio *bus)
1072{
1073 struct brcmf_sdio_dev *sdiod = bus->sdiodev;
1074 struct brcmf_core *core = bus->sdio_core;
1075 u32 intstatus = 0;
1076 u32 hmb_data;
1077 u8 fcbits;
1078 int ret;
1079
1080 brcmf_dbg(SDIO, "Enter\n");
1081
1082
1083 hmb_data = brcmf_sdiod_readl(sdiod,
1084 core->base + SD_REG(tohostmailboxdata),
1085 &ret);
1086
1087 if (!ret)
1088 brcmf_sdiod_writel(sdiod, core->base + SD_REG(tosbmailbox),
1089 SMB_INT_ACK, &ret);
1090
1091 bus->sdcnt.f1regdata += 2;
1092
1093
1094 if (hmb_data & HMB_DATA_FWHALT) {
1095 brcmf_dbg(SDIO, "mailbox indicates firmware halted\n");
1096 brcmf_fw_crashed(&sdiod->func1->dev);
1097 }
1098
1099
1100 if (hmb_data & HMB_DATA_NAKHANDLED) {
1101 brcmf_dbg(SDIO, "Dongle reports NAK handled, expect rtx of %d\n",
1102 bus->rx_seq);
1103 if (!bus->rxskip)
1104 brcmf_err("unexpected NAKHANDLED!\n");
1105
1106 bus->rxskip = false;
1107 intstatus |= I_HMB_FRAME_IND;
1108 }
1109
1110
1111
1112
1113 if (hmb_data & (HMB_DATA_DEVREADY | HMB_DATA_FWREADY)) {
1114 bus->sdpcm_ver =
1115 (hmb_data & HMB_DATA_VERSION_MASK) >>
1116 HMB_DATA_VERSION_SHIFT;
1117 if (bus->sdpcm_ver != SDPCM_PROT_VERSION)
1118 brcmf_err("Version mismatch, dongle reports %d, "
1119 "expecting %d\n",
1120 bus->sdpcm_ver, SDPCM_PROT_VERSION);
1121 else
1122 brcmf_dbg(SDIO, "Dongle ready, protocol version %d\n",
1123 bus->sdpcm_ver);
1124
1125
1126
1127
1128
1129 brcmf_sdio_get_console_addr(bus);
1130 }
1131
1132
1133
1134
1135
1136
1137 if (hmb_data & HMB_DATA_FC) {
1138 fcbits = (hmb_data & HMB_DATA_FCDATA_MASK) >>
1139 HMB_DATA_FCDATA_SHIFT;
1140
1141 if (fcbits & ~bus->flowcontrol)
1142 bus->sdcnt.fc_xoff++;
1143
1144 if (bus->flowcontrol & ~fcbits)
1145 bus->sdcnt.fc_xon++;
1146
1147 bus->sdcnt.fc_rcvd++;
1148 bus->flowcontrol = fcbits;
1149 }
1150
1151
1152 if (hmb_data & ~(HMB_DATA_DEVREADY |
1153 HMB_DATA_NAKHANDLED |
1154 HMB_DATA_FC |
1155 HMB_DATA_FWREADY |
1156 HMB_DATA_FWHALT |
1157 HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK))
1158 brcmf_err("Unknown mailbox data content: 0x%02x\n",
1159 hmb_data);
1160
1161 return intstatus;
1162}
1163
1164static void brcmf_sdio_rxfail(struct brcmf_sdio *bus, bool abort, bool rtx)
1165{
1166 struct brcmf_sdio_dev *sdiod = bus->sdiodev;
1167 struct brcmf_core *core = bus->sdio_core;
1168 uint retries = 0;
1169 u16 lastrbc;
1170 u8 hi, lo;
1171 int err;
1172
1173 brcmf_err("%sterminate frame%s\n",
1174 abort ? "abort command, " : "",
1175 rtx ? ", send NAK" : "");
1176
1177 if (abort)
1178 brcmf_sdiod_abort(bus->sdiodev, bus->sdiodev->func2);
1179
1180 brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_FRAMECTRL, SFC_RF_TERM,
1181 &err);
1182 bus->sdcnt.f1regdata++;
1183
1184
1185 for (lastrbc = retries = 0xffff; retries > 0; retries--) {
1186 hi = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_RFRAMEBCHI,
1187 &err);
1188 lo = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_RFRAMEBCLO,
1189 &err);
1190 bus->sdcnt.f1regdata += 2;
1191
1192 if ((hi == 0) && (lo == 0))
1193 break;
1194
1195 if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) {
1196 brcmf_err("count growing: last 0x%04x now 0x%04x\n",
1197 lastrbc, (hi << 8) + lo);
1198 }
1199 lastrbc = (hi << 8) + lo;
1200 }
1201
1202 if (!retries)
1203 brcmf_err("count never zeroed: last 0x%04x\n", lastrbc);
1204 else
1205 brcmf_dbg(SDIO, "flush took %d iterations\n", 0xffff - retries);
1206
1207 if (rtx) {
1208 bus->sdcnt.rxrtx++;
1209 brcmf_sdiod_writel(sdiod, core->base + SD_REG(tosbmailbox),
1210 SMB_NAK, &err);
1211
1212 bus->sdcnt.f1regdata++;
1213 if (err == 0)
1214 bus->rxskip = true;
1215 }
1216
1217
1218 bus->cur_read.len = 0;
1219}
1220
1221static void brcmf_sdio_txfail(struct brcmf_sdio *bus)
1222{
1223 struct brcmf_sdio_dev *sdiodev = bus->sdiodev;
1224 u8 i, hi, lo;
1225
1226
1227 brcmf_err("sdio error, abort command and terminate frame\n");
1228 bus->sdcnt.tx_sderrs++;
1229
1230 brcmf_sdiod_abort(sdiodev, sdiodev->func2);
1231 brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM, NULL);
1232 bus->sdcnt.f1regdata++;
1233
1234 for (i = 0; i < 3; i++) {
1235 hi = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_WFRAMEBCHI, NULL);
1236 lo = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_WFRAMEBCLO, NULL);
1237 bus->sdcnt.f1regdata += 2;
1238 if ((hi == 0) && (lo == 0))
1239 break;
1240 }
1241}
1242
1243
1244static uint brcmf_sdio_glom_len(struct brcmf_sdio *bus)
1245{
1246 struct sk_buff *p;
1247 uint total;
1248
1249 total = 0;
1250 skb_queue_walk(&bus->glom, p)
1251 total += p->len;
1252 return total;
1253}
1254
1255static void brcmf_sdio_free_glom(struct brcmf_sdio *bus)
1256{
1257 struct sk_buff *cur, *next;
1258
1259 skb_queue_walk_safe(&bus->glom, cur, next) {
1260 skb_unlink(cur, &bus->glom);
1261 brcmu_pkt_buf_free_skb(cur);
1262 }
1263}
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292#define SDPCM_HWHDR_LEN 4
1293#define SDPCM_HWEXT_LEN 8
1294#define SDPCM_SWHDR_LEN 8
1295#define SDPCM_HDRLEN (SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN)
1296
1297#define SDPCM_SEQ_MASK 0x000000ff
1298#define SDPCM_SEQ_WRAP 256
1299#define SDPCM_CHANNEL_MASK 0x00000f00
1300#define SDPCM_CHANNEL_SHIFT 8
1301#define SDPCM_CONTROL_CHANNEL 0
1302#define SDPCM_EVENT_CHANNEL 1
1303#define SDPCM_DATA_CHANNEL 2
1304#define SDPCM_GLOM_CHANNEL 3
1305#define SDPCM_TEST_CHANNEL 15
1306#define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80)
1307#define SDPCM_NEXTLEN_MASK 0x00ff0000
1308#define SDPCM_NEXTLEN_SHIFT 16
1309#define SDPCM_DOFFSET_MASK 0xff000000
1310#define SDPCM_DOFFSET_SHIFT 24
1311#define SDPCM_FCMASK_MASK 0x000000ff
1312#define SDPCM_WINDOW_MASK 0x0000ff00
1313#define SDPCM_WINDOW_SHIFT 8
1314
1315static inline u8 brcmf_sdio_getdatoffset(u8 *swheader)
1316{
1317 u32 hdrvalue;
1318 hdrvalue = *(u32 *)swheader;
1319 return (u8)((hdrvalue & SDPCM_DOFFSET_MASK) >> SDPCM_DOFFSET_SHIFT);
1320}
1321
1322static inline bool brcmf_sdio_fromevntchan(u8 *swheader)
1323{
1324 u32 hdrvalue;
1325 u8 ret;
1326
1327 hdrvalue = *(u32 *)swheader;
1328 ret = (u8)((hdrvalue & SDPCM_CHANNEL_MASK) >> SDPCM_CHANNEL_SHIFT);
1329
1330 return (ret == SDPCM_EVENT_CHANNEL);
1331}
1332
1333static int brcmf_sdio_hdparse(struct brcmf_sdio *bus, u8 *header,
1334 struct brcmf_sdio_hdrinfo *rd,
1335 enum brcmf_sdio_frmtype type)
1336{
1337 u16 len, checksum;
1338 u8 rx_seq, fc, tx_seq_max;
1339 u32 swheader;
1340
1341 trace_brcmf_sdpcm_hdr(SDPCM_RX, header);
1342
1343
1344 len = get_unaligned_le16(header);
1345 checksum = get_unaligned_le16(header + sizeof(u16));
1346
1347 if (!(len | checksum)) {
1348 bus->rxpending = false;
1349 return -ENODATA;
1350 }
1351 if ((u16)(~(len ^ checksum))) {
1352 brcmf_err("HW header checksum error\n");
1353 bus->sdcnt.rx_badhdr++;
1354 brcmf_sdio_rxfail(bus, false, false);
1355 return -EIO;
1356 }
1357 if (len < SDPCM_HDRLEN) {
1358 brcmf_err("HW header length error\n");
1359 return -EPROTO;
1360 }
1361 if (type == BRCMF_SDIO_FT_SUPER &&
1362 (roundup(len, bus->blocksize) != rd->len)) {
1363 brcmf_err("HW superframe header length error\n");
1364 return -EPROTO;
1365 }
1366 if (type == BRCMF_SDIO_FT_SUB && len > rd->len) {
1367 brcmf_err("HW subframe header length error\n");
1368 return -EPROTO;
1369 }
1370 rd->len = len;
1371
1372
1373 header += SDPCM_HWHDR_LEN;
1374 swheader = le32_to_cpu(*(__le32 *)header);
1375 if (type == BRCMF_SDIO_FT_SUPER && SDPCM_GLOMDESC(header)) {
1376 brcmf_err("Glom descriptor found in superframe head\n");
1377 rd->len = 0;
1378 return -EINVAL;
1379 }
1380 rx_seq = (u8)(swheader & SDPCM_SEQ_MASK);
1381 rd->channel = (swheader & SDPCM_CHANNEL_MASK) >> SDPCM_CHANNEL_SHIFT;
1382 if (len > MAX_RX_DATASZ && rd->channel != SDPCM_CONTROL_CHANNEL &&
1383 type != BRCMF_SDIO_FT_SUPER) {
1384 brcmf_err("HW header length too long\n");
1385 bus->sdcnt.rx_toolong++;
1386 brcmf_sdio_rxfail(bus, false, false);
1387 rd->len = 0;
1388 return -EPROTO;
1389 }
1390 if (type == BRCMF_SDIO_FT_SUPER && rd->channel != SDPCM_GLOM_CHANNEL) {
1391 brcmf_err("Wrong channel for superframe\n");
1392 rd->len = 0;
1393 return -EINVAL;
1394 }
1395 if (type == BRCMF_SDIO_FT_SUB && rd->channel != SDPCM_DATA_CHANNEL &&
1396 rd->channel != SDPCM_EVENT_CHANNEL) {
1397 brcmf_err("Wrong channel for subframe\n");
1398 rd->len = 0;
1399 return -EINVAL;
1400 }
1401 rd->dat_offset = brcmf_sdio_getdatoffset(header);
1402 if (rd->dat_offset < SDPCM_HDRLEN || rd->dat_offset > rd->len) {
1403 brcmf_err("seq %d: bad data offset\n", rx_seq);
1404 bus->sdcnt.rx_badhdr++;
1405 brcmf_sdio_rxfail(bus, false, false);
1406 rd->len = 0;
1407 return -ENXIO;
1408 }
1409 if (rd->seq_num != rx_seq) {
1410 brcmf_dbg(SDIO, "seq %d, expected %d\n", rx_seq, rd->seq_num);
1411 bus->sdcnt.rx_badseq++;
1412 rd->seq_num = rx_seq;
1413 }
1414
1415 if (type == BRCMF_SDIO_FT_SUB)
1416 return 0;
1417 rd->len_nxtfrm = (swheader & SDPCM_NEXTLEN_MASK) >> SDPCM_NEXTLEN_SHIFT;
1418 if (rd->len_nxtfrm << 4 > MAX_RX_DATASZ) {
1419
1420 if (rd->channel != SDPCM_GLOM_CHANNEL)
1421 brcmf_err("seq %d: next length error\n", rx_seq);
1422 rd->len_nxtfrm = 0;
1423 }
1424 swheader = le32_to_cpu(*(__le32 *)(header + 4));
1425 fc = swheader & SDPCM_FCMASK_MASK;
1426 if (bus->flowcontrol != fc) {
1427 if (~bus->flowcontrol & fc)
1428 bus->sdcnt.fc_xoff++;
1429 if (bus->flowcontrol & ~fc)
1430 bus->sdcnt.fc_xon++;
1431 bus->sdcnt.fc_rcvd++;
1432 bus->flowcontrol = fc;
1433 }
1434 tx_seq_max = (swheader & SDPCM_WINDOW_MASK) >> SDPCM_WINDOW_SHIFT;
1435 if ((u8)(tx_seq_max - bus->tx_seq) > 0x40) {
1436 brcmf_err("seq %d: max tx seq number error\n", rx_seq);
1437 tx_seq_max = bus->tx_seq + 2;
1438 }
1439 bus->tx_max = tx_seq_max;
1440
1441 return 0;
1442}
1443
1444static inline void brcmf_sdio_update_hwhdr(u8 *header, u16 frm_length)
1445{
1446 *(__le16 *)header = cpu_to_le16(frm_length);
1447 *(((__le16 *)header) + 1) = cpu_to_le16(~frm_length);
1448}
1449
1450static void brcmf_sdio_hdpack(struct brcmf_sdio *bus, u8 *header,
1451 struct brcmf_sdio_hdrinfo *hd_info)
1452{
1453 u32 hdrval;
1454 u8 hdr_offset;
1455
1456 brcmf_sdio_update_hwhdr(header, hd_info->len);
1457 hdr_offset = SDPCM_HWHDR_LEN;
1458
1459 if (bus->txglom) {
1460 hdrval = (hd_info->len - hdr_offset) | (hd_info->lastfrm << 24);
1461 *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1462 hdrval = (u16)hd_info->tail_pad << 16;
1463 *(((__le32 *)(header + hdr_offset)) + 1) = cpu_to_le32(hdrval);
1464 hdr_offset += SDPCM_HWEXT_LEN;
1465 }
1466
1467 hdrval = hd_info->seq_num;
1468 hdrval |= (hd_info->channel << SDPCM_CHANNEL_SHIFT) &
1469 SDPCM_CHANNEL_MASK;
1470 hdrval |= (hd_info->dat_offset << SDPCM_DOFFSET_SHIFT) &
1471 SDPCM_DOFFSET_MASK;
1472 *((__le32 *)(header + hdr_offset)) = cpu_to_le32(hdrval);
1473 *(((__le32 *)(header + hdr_offset)) + 1) = 0;
1474 trace_brcmf_sdpcm_hdr(SDPCM_TX + !!(bus->txglom), header);
1475}
1476
1477static u8 brcmf_sdio_rxglom(struct brcmf_sdio *bus, u8 rxseq)
1478{
1479 u16 dlen, totlen;
1480 u8 *dptr, num = 0;
1481 u16 sublen;
1482 struct sk_buff *pfirst, *pnext;
1483
1484 int errcode;
1485 u8 doff;
1486
1487 struct brcmf_sdio_hdrinfo rd_new;
1488
1489
1490
1491
1492 brcmf_dbg(SDIO, "start: glomd %p glom %p\n",
1493 bus->glomd, skb_peek(&bus->glom));
1494
1495
1496 if (bus->glomd) {
1497 pfirst = pnext = NULL;
1498 dlen = (u16) (bus->glomd->len);
1499 dptr = bus->glomd->data;
1500 if (!dlen || (dlen & 1)) {
1501 brcmf_err("bad glomd len(%d), ignore descriptor\n",
1502 dlen);
1503 dlen = 0;
1504 }
1505
1506 for (totlen = num = 0; dlen; num++) {
1507
1508 sublen = get_unaligned_le16(dptr);
1509 dlen -= sizeof(u16);
1510 dptr += sizeof(u16);
1511 if ((sublen < SDPCM_HDRLEN) ||
1512 ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) {
1513 brcmf_err("descriptor len %d bad: %d\n",
1514 num, sublen);
1515 pnext = NULL;
1516 break;
1517 }
1518 if (sublen % bus->sgentry_align) {
1519 brcmf_err("sublen %d not multiple of %d\n",
1520 sublen, bus->sgentry_align);
1521 }
1522 totlen += sublen;
1523
1524
1525
1526 if (!dlen) {
1527 sublen +=
1528 (roundup(totlen, bus->blocksize) - totlen);
1529 totlen = roundup(totlen, bus->blocksize);
1530 }
1531
1532
1533 pnext = brcmu_pkt_buf_get_skb(sublen + bus->sgentry_align);
1534 if (pnext == NULL) {
1535 brcmf_err("bcm_pkt_buf_get_skb failed, num %d len %d\n",
1536 num, sublen);
1537 break;
1538 }
1539 skb_queue_tail(&bus->glom, pnext);
1540
1541
1542 pkt_align(pnext, sublen, bus->sgentry_align);
1543 }
1544
1545
1546
1547 if (pnext) {
1548 brcmf_dbg(GLOM, "allocated %d-byte packet chain for %d subframes\n",
1549 totlen, num);
1550 if (BRCMF_GLOM_ON() && bus->cur_read.len &&
1551 totlen != bus->cur_read.len) {
1552 brcmf_dbg(GLOM, "glomdesc mismatch: nextlen %d glomdesc %d rxseq %d\n",
1553 bus->cur_read.len, totlen, rxseq);
1554 }
1555 pfirst = pnext = NULL;
1556 } else {
1557 brcmf_sdio_free_glom(bus);
1558 num = 0;
1559 }
1560
1561
1562 brcmu_pkt_buf_free_skb(bus->glomd);
1563 bus->glomd = NULL;
1564 bus->cur_read.len = 0;
1565 }
1566
1567
1568
1569 if (!skb_queue_empty(&bus->glom)) {
1570 if (BRCMF_GLOM_ON()) {
1571 brcmf_dbg(GLOM, "try superframe read, packet chain:\n");
1572 skb_queue_walk(&bus->glom, pnext) {
1573 brcmf_dbg(GLOM, " %p: %p len 0x%04x (%d)\n",
1574 pnext, (u8 *) (pnext->data),
1575 pnext->len, pnext->len);
1576 }
1577 }
1578
1579 pfirst = skb_peek(&bus->glom);
1580 dlen = (u16) brcmf_sdio_glom_len(bus);
1581
1582
1583
1584
1585
1586 sdio_claim_host(bus->sdiodev->func1);
1587 errcode = brcmf_sdiod_recv_chain(bus->sdiodev,
1588 &bus->glom, dlen);
1589 sdio_release_host(bus->sdiodev->func1);
1590 bus->sdcnt.f2rxdata++;
1591
1592
1593 if (errcode < 0) {
1594 brcmf_err("glom read of %d bytes failed: %d\n",
1595 dlen, errcode);
1596
1597 sdio_claim_host(bus->sdiodev->func1);
1598 brcmf_sdio_rxfail(bus, true, false);
1599 bus->sdcnt.rxglomfail++;
1600 brcmf_sdio_free_glom(bus);
1601 sdio_release_host(bus->sdiodev->func1);
1602 return 0;
1603 }
1604
1605 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1606 pfirst->data, min_t(int, pfirst->len, 48),
1607 "SUPERFRAME:\n");
1608
1609 rd_new.seq_num = rxseq;
1610 rd_new.len = dlen;
1611 sdio_claim_host(bus->sdiodev->func1);
1612 errcode = brcmf_sdio_hdparse(bus, pfirst->data, &rd_new,
1613 BRCMF_SDIO_FT_SUPER);
1614 sdio_release_host(bus->sdiodev->func1);
1615 bus->cur_read.len = rd_new.len_nxtfrm << 4;
1616
1617
1618 skb_pull(pfirst, rd_new.dat_offset);
1619 num = 0;
1620
1621
1622 skb_queue_walk(&bus->glom, pnext) {
1623
1624 if (errcode)
1625 break;
1626
1627 rd_new.len = pnext->len;
1628 rd_new.seq_num = rxseq++;
1629 sdio_claim_host(bus->sdiodev->func1);
1630 errcode = brcmf_sdio_hdparse(bus, pnext->data, &rd_new,
1631 BRCMF_SDIO_FT_SUB);
1632 sdio_release_host(bus->sdiodev->func1);
1633 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1634 pnext->data, 32, "subframe:\n");
1635
1636 num++;
1637 }
1638
1639 if (errcode) {
1640
1641 sdio_claim_host(bus->sdiodev->func1);
1642 brcmf_sdio_rxfail(bus, true, false);
1643 bus->sdcnt.rxglomfail++;
1644 brcmf_sdio_free_glom(bus);
1645 sdio_release_host(bus->sdiodev->func1);
1646 bus->cur_read.len = 0;
1647 return 0;
1648 }
1649
1650
1651
1652 skb_queue_walk_safe(&bus->glom, pfirst, pnext) {
1653 dptr = (u8 *) (pfirst->data);
1654 sublen = get_unaligned_le16(dptr);
1655 doff = brcmf_sdio_getdatoffset(&dptr[SDPCM_HWHDR_LEN]);
1656
1657 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1658 dptr, pfirst->len,
1659 "Rx Subframe Data:\n");
1660
1661 __skb_trim(pfirst, sublen);
1662 skb_pull(pfirst, doff);
1663
1664 if (pfirst->len == 0) {
1665 skb_unlink(pfirst, &bus->glom);
1666 brcmu_pkt_buf_free_skb(pfirst);
1667 continue;
1668 }
1669
1670 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1671 pfirst->data,
1672 min_t(int, pfirst->len, 32),
1673 "subframe %d to stack, %p (%p/%d) nxt/lnk %p/%p\n",
1674 bus->glom.qlen, pfirst, pfirst->data,
1675 pfirst->len, pfirst->next,
1676 pfirst->prev);
1677 skb_unlink(pfirst, &bus->glom);
1678 if (brcmf_sdio_fromevntchan(&dptr[SDPCM_HWHDR_LEN]))
1679 brcmf_rx_event(bus->sdiodev->dev, pfirst);
1680 else
1681 brcmf_rx_frame(bus->sdiodev->dev, pfirst,
1682 false);
1683 bus->sdcnt.rxglompkts++;
1684 }
1685
1686 bus->sdcnt.rxglomframes++;
1687 }
1688 return num;
1689}
1690
1691static int brcmf_sdio_dcmd_resp_wait(struct brcmf_sdio *bus, uint *condition,
1692 bool *pending)
1693{
1694 DECLARE_WAITQUEUE(wait, current);
1695 int timeout = DCMD_RESP_TIMEOUT;
1696
1697
1698 add_wait_queue(&bus->dcmd_resp_wait, &wait);
1699 set_current_state(TASK_INTERRUPTIBLE);
1700
1701 while (!(*condition) && (!signal_pending(current) && timeout))
1702 timeout = schedule_timeout(timeout);
1703
1704 if (signal_pending(current))
1705 *pending = true;
1706
1707 set_current_state(TASK_RUNNING);
1708 remove_wait_queue(&bus->dcmd_resp_wait, &wait);
1709
1710 return timeout;
1711}
1712
1713static int brcmf_sdio_dcmd_resp_wake(struct brcmf_sdio *bus)
1714{
1715 wake_up_interruptible(&bus->dcmd_resp_wait);
1716
1717 return 0;
1718}
1719static void
1720brcmf_sdio_read_control(struct brcmf_sdio *bus, u8 *hdr, uint len, uint doff)
1721{
1722 uint rdlen, pad;
1723 u8 *buf = NULL, *rbuf;
1724 int sdret;
1725
1726 brcmf_dbg(SDIO, "Enter\n");
1727 if (bus->rxblen)
1728 buf = vzalloc(bus->rxblen);
1729 if (!buf)
1730 goto done;
1731
1732 rbuf = bus->rxbuf;
1733 pad = ((unsigned long)rbuf % bus->head_align);
1734 if (pad)
1735 rbuf += (bus->head_align - pad);
1736
1737
1738 memcpy(buf, hdr, BRCMF_FIRSTREAD);
1739 if (len <= BRCMF_FIRSTREAD)
1740 goto gotpkt;
1741
1742
1743 rdlen = len - BRCMF_FIRSTREAD;
1744 if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) {
1745 pad = bus->blocksize - (rdlen % bus->blocksize);
1746 if ((pad <= bus->roundup) && (pad < bus->blocksize) &&
1747 ((len + pad) < bus->sdiodev->bus_if->maxctl))
1748 rdlen += pad;
1749 } else if (rdlen % bus->head_align) {
1750 rdlen += bus->head_align - (rdlen % bus->head_align);
1751 }
1752
1753
1754 if ((rdlen + BRCMF_FIRSTREAD) > bus->sdiodev->bus_if->maxctl) {
1755 brcmf_err("%d-byte control read exceeds %d-byte buffer\n",
1756 rdlen, bus->sdiodev->bus_if->maxctl);
1757 brcmf_sdio_rxfail(bus, false, false);
1758 goto done;
1759 }
1760
1761 if ((len - doff) > bus->sdiodev->bus_if->maxctl) {
1762 brcmf_err("%d-byte ctl frame (%d-byte ctl data) exceeds %d-byte limit\n",
1763 len, len - doff, bus->sdiodev->bus_if->maxctl);
1764 bus->sdcnt.rx_toolong++;
1765 brcmf_sdio_rxfail(bus, false, false);
1766 goto done;
1767 }
1768
1769
1770 sdret = brcmf_sdiod_recv_buf(bus->sdiodev, rbuf, rdlen);
1771 bus->sdcnt.f2rxdata++;
1772
1773
1774 if (sdret < 0) {
1775 brcmf_err("read %d control bytes failed: %d\n",
1776 rdlen, sdret);
1777 bus->sdcnt.rxc_errors++;
1778 brcmf_sdio_rxfail(bus, true, true);
1779 goto done;
1780 } else
1781 memcpy(buf + BRCMF_FIRSTREAD, rbuf, rdlen);
1782
1783gotpkt:
1784
1785 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
1786 buf, len, "RxCtrl:\n");
1787
1788
1789 spin_lock_bh(&bus->rxctl_lock);
1790 if (bus->rxctl) {
1791 brcmf_err("last control frame is being processed.\n");
1792 spin_unlock_bh(&bus->rxctl_lock);
1793 vfree(buf);
1794 goto done;
1795 }
1796 bus->rxctl = buf + doff;
1797 bus->rxctl_orig = buf;
1798 bus->rxlen = len - doff;
1799 spin_unlock_bh(&bus->rxctl_lock);
1800
1801done:
1802
1803 brcmf_sdio_dcmd_resp_wake(bus);
1804}
1805
1806
1807static void brcmf_sdio_pad(struct brcmf_sdio *bus, u16 *pad, u16 *rdlen)
1808{
1809 if (bus->roundup && bus->blocksize && *rdlen > bus->blocksize) {
1810 *pad = bus->blocksize - (*rdlen % bus->blocksize);
1811 if (*pad <= bus->roundup && *pad < bus->blocksize &&
1812 *rdlen + *pad + BRCMF_FIRSTREAD < MAX_RX_DATASZ)
1813 *rdlen += *pad;
1814 } else if (*rdlen % bus->head_align) {
1815 *rdlen += bus->head_align - (*rdlen % bus->head_align);
1816 }
1817}
1818
1819static uint brcmf_sdio_readframes(struct brcmf_sdio *bus, uint maxframes)
1820{
1821 struct sk_buff *pkt;
1822 u16 pad;
1823 uint rxleft = 0;
1824 int ret;
1825 uint rxcount = 0;
1826 struct brcmf_sdio_hdrinfo *rd = &bus->cur_read, rd_new;
1827 u8 head_read = 0;
1828
1829 brcmf_dbg(SDIO, "Enter\n");
1830
1831
1832 bus->rxpending = true;
1833
1834 for (rd->seq_num = bus->rx_seq, rxleft = maxframes;
1835 !bus->rxskip && rxleft && bus->sdiodev->state == BRCMF_SDIOD_DATA;
1836 rd->seq_num++, rxleft--) {
1837
1838
1839 if (bus->glomd || !skb_queue_empty(&bus->glom)) {
1840 u8 cnt;
1841 brcmf_dbg(GLOM, "calling rxglom: glomd %p, glom %p\n",
1842 bus->glomd, skb_peek(&bus->glom));
1843 cnt = brcmf_sdio_rxglom(bus, rd->seq_num);
1844 brcmf_dbg(GLOM, "rxglom returned %d\n", cnt);
1845 rd->seq_num += cnt - 1;
1846 rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1;
1847 continue;
1848 }
1849
1850 rd->len_left = rd->len;
1851
1852 sdio_claim_host(bus->sdiodev->func1);
1853 if (!rd->len) {
1854 ret = brcmf_sdiod_recv_buf(bus->sdiodev,
1855 bus->rxhdr, BRCMF_FIRSTREAD);
1856 bus->sdcnt.f2rxhdrs++;
1857 if (ret < 0) {
1858 brcmf_err("RXHEADER FAILED: %d\n",
1859 ret);
1860 bus->sdcnt.rx_hdrfail++;
1861 brcmf_sdio_rxfail(bus, true, true);
1862 sdio_release_host(bus->sdiodev->func1);
1863 continue;
1864 }
1865
1866 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() || BRCMF_HDRS_ON(),
1867 bus->rxhdr, SDPCM_HDRLEN,
1868 "RxHdr:\n");
1869
1870 if (brcmf_sdio_hdparse(bus, bus->rxhdr, rd,
1871 BRCMF_SDIO_FT_NORMAL)) {
1872 sdio_release_host(bus->sdiodev->func1);
1873 if (!bus->rxpending)
1874 break;
1875 else
1876 continue;
1877 }
1878
1879 if (rd->channel == SDPCM_CONTROL_CHANNEL) {
1880 brcmf_sdio_read_control(bus, bus->rxhdr,
1881 rd->len,
1882 rd->dat_offset);
1883
1884 rd->len = rd->len_nxtfrm << 4;
1885 rd->len_nxtfrm = 0;
1886
1887 rd->channel = SDPCM_EVENT_CHANNEL;
1888 sdio_release_host(bus->sdiodev->func1);
1889 continue;
1890 }
1891 rd->len_left = rd->len > BRCMF_FIRSTREAD ?
1892 rd->len - BRCMF_FIRSTREAD : 0;
1893 head_read = BRCMF_FIRSTREAD;
1894 }
1895
1896 brcmf_sdio_pad(bus, &pad, &rd->len_left);
1897
1898 pkt = brcmu_pkt_buf_get_skb(rd->len_left + head_read +
1899 bus->head_align);
1900 if (!pkt) {
1901
1902 brcmf_err("brcmu_pkt_buf_get_skb failed\n");
1903 brcmf_sdio_rxfail(bus, false,
1904 RETRYCHAN(rd->channel));
1905 sdio_release_host(bus->sdiodev->func1);
1906 continue;
1907 }
1908 skb_pull(pkt, head_read);
1909 pkt_align(pkt, rd->len_left, bus->head_align);
1910
1911 ret = brcmf_sdiod_recv_pkt(bus->sdiodev, pkt);
1912 bus->sdcnt.f2rxdata++;
1913 sdio_release_host(bus->sdiodev->func1);
1914
1915 if (ret < 0) {
1916 brcmf_err("read %d bytes from channel %d failed: %d\n",
1917 rd->len, rd->channel, ret);
1918 brcmu_pkt_buf_free_skb(pkt);
1919 sdio_claim_host(bus->sdiodev->func1);
1920 brcmf_sdio_rxfail(bus, true,
1921 RETRYCHAN(rd->channel));
1922 sdio_release_host(bus->sdiodev->func1);
1923 continue;
1924 }
1925
1926 if (head_read) {
1927 skb_push(pkt, head_read);
1928 memcpy(pkt->data, bus->rxhdr, head_read);
1929 head_read = 0;
1930 } else {
1931 memcpy(bus->rxhdr, pkt->data, SDPCM_HDRLEN);
1932 rd_new.seq_num = rd->seq_num;
1933 sdio_claim_host(bus->sdiodev->func1);
1934 if (brcmf_sdio_hdparse(bus, bus->rxhdr, &rd_new,
1935 BRCMF_SDIO_FT_NORMAL)) {
1936 rd->len = 0;
1937 brcmu_pkt_buf_free_skb(pkt);
1938 }
1939 bus->sdcnt.rx_readahead_cnt++;
1940 if (rd->len != roundup(rd_new.len, 16)) {
1941 brcmf_err("frame length mismatch:read %d, should be %d\n",
1942 rd->len,
1943 roundup(rd_new.len, 16) >> 4);
1944 rd->len = 0;
1945 brcmf_sdio_rxfail(bus, true, true);
1946 sdio_release_host(bus->sdiodev->func1);
1947 brcmu_pkt_buf_free_skb(pkt);
1948 continue;
1949 }
1950 sdio_release_host(bus->sdiodev->func1);
1951 rd->len_nxtfrm = rd_new.len_nxtfrm;
1952 rd->channel = rd_new.channel;
1953 rd->dat_offset = rd_new.dat_offset;
1954
1955 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() &&
1956 BRCMF_DATA_ON()) &&
1957 BRCMF_HDRS_ON(),
1958 bus->rxhdr, SDPCM_HDRLEN,
1959 "RxHdr:\n");
1960
1961 if (rd_new.channel == SDPCM_CONTROL_CHANNEL) {
1962 brcmf_err("readahead on control packet %d?\n",
1963 rd_new.seq_num);
1964
1965 rd->len = 0;
1966 sdio_claim_host(bus->sdiodev->func1);
1967 brcmf_sdio_rxfail(bus, false, true);
1968 sdio_release_host(bus->sdiodev->func1);
1969 brcmu_pkt_buf_free_skb(pkt);
1970 continue;
1971 }
1972 }
1973
1974 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_DATA_ON(),
1975 pkt->data, rd->len, "Rx Data:\n");
1976
1977
1978 if (rd->channel == SDPCM_GLOM_CHANNEL) {
1979 if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_HWHDR_LEN])) {
1980 brcmf_dbg(GLOM, "glom descriptor, %d bytes:\n",
1981 rd->len);
1982 brcmf_dbg_hex_dump(BRCMF_GLOM_ON(),
1983 pkt->data, rd->len,
1984 "Glom Data:\n");
1985 __skb_trim(pkt, rd->len);
1986 skb_pull(pkt, SDPCM_HDRLEN);
1987 bus->glomd = pkt;
1988 } else {
1989 brcmf_err("%s: glom superframe w/o "
1990 "descriptor!\n", __func__);
1991 sdio_claim_host(bus->sdiodev->func1);
1992 brcmf_sdio_rxfail(bus, false, false);
1993 sdio_release_host(bus->sdiodev->func1);
1994 }
1995
1996 rd->len = rd->len_nxtfrm << 4;
1997 rd->len_nxtfrm = 0;
1998
1999 rd->channel = SDPCM_EVENT_CHANNEL;
2000 continue;
2001 }
2002
2003
2004 __skb_trim(pkt, rd->len);
2005 skb_pull(pkt, rd->dat_offset);
2006
2007 if (pkt->len == 0)
2008 brcmu_pkt_buf_free_skb(pkt);
2009 else if (rd->channel == SDPCM_EVENT_CHANNEL)
2010 brcmf_rx_event(bus->sdiodev->dev, pkt);
2011 else
2012 brcmf_rx_frame(bus->sdiodev->dev, pkt,
2013 false);
2014
2015
2016 rd->len = rd->len_nxtfrm << 4;
2017 rd->len_nxtfrm = 0;
2018
2019 rd->channel = SDPCM_EVENT_CHANNEL;
2020 }
2021
2022 rxcount = maxframes - rxleft;
2023
2024 if (!rxleft)
2025 brcmf_dbg(DATA, "hit rx limit of %d frames\n", maxframes);
2026 else
2027 brcmf_dbg(DATA, "processed %d frames\n", rxcount);
2028
2029 if (bus->rxskip)
2030 rd->seq_num--;
2031 bus->rx_seq = rd->seq_num;
2032
2033 return rxcount;
2034}
2035
2036static void
2037brcmf_sdio_wait_event_wakeup(struct brcmf_sdio *bus)
2038{
2039 wake_up_interruptible(&bus->ctrl_wait);
2040 return;
2041}
2042
2043static int brcmf_sdio_txpkt_hdalign(struct brcmf_sdio *bus, struct sk_buff *pkt)
2044{
2045 struct brcmf_bus_stats *stats;
2046 u16 head_pad;
2047 u8 *dat_buf;
2048
2049 dat_buf = (u8 *)(pkt->data);
2050
2051
2052 head_pad = ((unsigned long)dat_buf % bus->head_align);
2053 if (head_pad) {
2054 if (skb_headroom(pkt) < head_pad) {
2055 stats = &bus->sdiodev->bus_if->stats;
2056 atomic_inc(&stats->pktcowed);
2057 if (skb_cow_head(pkt, head_pad)) {
2058 atomic_inc(&stats->pktcow_failed);
2059 return -ENOMEM;
2060 }
2061 head_pad = 0;
2062 }
2063 skb_push(pkt, head_pad);
2064 dat_buf = (u8 *)(pkt->data);
2065 }
2066 memset(dat_buf, 0, head_pad + bus->tx_hdrlen);
2067 return head_pad;
2068}
2069
2070
2071
2072
2073
2074
2075#define ALIGN_SKB_FLAG 0x8000
2076
2077#define ALIGN_SKB_CHOP_LEN_MASK 0x7fff
2078
2079static int brcmf_sdio_txpkt_prep_sg(struct brcmf_sdio *bus,
2080 struct sk_buff_head *pktq,
2081 struct sk_buff *pkt, u16 total_len)
2082{
2083 struct brcmf_sdio_dev *sdiodev;
2084 struct sk_buff *pkt_pad;
2085 u16 tail_pad, tail_chop, chain_pad;
2086 unsigned int blksize;
2087 bool lastfrm;
2088 int ntail, ret;
2089
2090 sdiodev = bus->sdiodev;
2091 blksize = sdiodev->func2->cur_blksize;
2092
2093 WARN_ON(blksize % bus->sgentry_align);
2094
2095
2096 lastfrm = skb_queue_is_last(pktq, pkt);
2097 tail_pad = 0;
2098 tail_chop = pkt->len % bus->sgentry_align;
2099 if (tail_chop)
2100 tail_pad = bus->sgentry_align - tail_chop;
2101 chain_pad = (total_len + tail_pad) % blksize;
2102 if (lastfrm && chain_pad)
2103 tail_pad += blksize - chain_pad;
2104 if (skb_tailroom(pkt) < tail_pad && pkt->len > blksize) {
2105 pkt_pad = brcmu_pkt_buf_get_skb(tail_pad + tail_chop +
2106 bus->head_align);
2107 if (pkt_pad == NULL)
2108 return -ENOMEM;
2109 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_pad);
2110 if (unlikely(ret < 0)) {
2111 kfree_skb(pkt_pad);
2112 return ret;
2113 }
2114 memcpy(pkt_pad->data,
2115 pkt->data + pkt->len - tail_chop,
2116 tail_chop);
2117 *(u16 *)(pkt_pad->cb) = ALIGN_SKB_FLAG + tail_chop;
2118 skb_trim(pkt, pkt->len - tail_chop);
2119 skb_trim(pkt_pad, tail_pad + tail_chop);
2120 __skb_queue_after(pktq, pkt, pkt_pad);
2121 } else {
2122 ntail = pkt->data_len + tail_pad -
2123 (pkt->end - pkt->tail);
2124 if (skb_cloned(pkt) || ntail > 0)
2125 if (pskb_expand_head(pkt, 0, ntail, GFP_ATOMIC))
2126 return -ENOMEM;
2127 if (skb_linearize(pkt))
2128 return -ENOMEM;
2129 __skb_put(pkt, tail_pad);
2130 }
2131
2132 return tail_pad;
2133}
2134
2135
2136
2137
2138
2139
2140
2141
2142
2143
2144
2145
2146
2147static int
2148brcmf_sdio_txpkt_prep(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2149 uint chan)
2150{
2151 u16 head_pad, total_len;
2152 struct sk_buff *pkt_next;
2153 u8 txseq;
2154 int ret;
2155 struct brcmf_sdio_hdrinfo hd_info = {0};
2156
2157 txseq = bus->tx_seq;
2158 total_len = 0;
2159 skb_queue_walk(pktq, pkt_next) {
2160
2161
2162
2163
2164
2165 if (*(u16 *)(pkt_next->cb) & ALIGN_SKB_FLAG)
2166 continue;
2167
2168
2169 ret = brcmf_sdio_txpkt_hdalign(bus, pkt_next);
2170 if (ret < 0)
2171 return ret;
2172 head_pad = (u16)ret;
2173 if (head_pad)
2174 memset(pkt_next->data + bus->tx_hdrlen, 0, head_pad);
2175
2176 total_len += pkt_next->len;
2177
2178 hd_info.len = pkt_next->len;
2179 hd_info.lastfrm = skb_queue_is_last(pktq, pkt_next);
2180 if (bus->txglom && pktq->qlen > 1) {
2181 ret = brcmf_sdio_txpkt_prep_sg(bus, pktq,
2182 pkt_next, total_len);
2183 if (ret < 0)
2184 return ret;
2185 hd_info.tail_pad = (u16)ret;
2186 total_len += (u16)ret;
2187 }
2188
2189 hd_info.channel = chan;
2190 hd_info.dat_offset = head_pad + bus->tx_hdrlen;
2191 hd_info.seq_num = txseq++;
2192
2193
2194 brcmf_sdio_hdpack(bus, pkt_next->data, &hd_info);
2195
2196 if (BRCMF_BYTES_ON() &&
2197 ((BRCMF_CTL_ON() && chan == SDPCM_CONTROL_CHANNEL) ||
2198 (BRCMF_DATA_ON() && chan != SDPCM_CONTROL_CHANNEL)))
2199 brcmf_dbg_hex_dump(true, pkt_next->data, hd_info.len,
2200 "Tx Frame:\n");
2201 else if (BRCMF_HDRS_ON())
2202 brcmf_dbg_hex_dump(true, pkt_next->data,
2203 head_pad + bus->tx_hdrlen,
2204 "Tx Header:\n");
2205 }
2206
2207
2208
2209 if (bus->txglom)
2210 brcmf_sdio_update_hwhdr(__skb_peek(pktq)->data, total_len);
2211 return 0;
2212}
2213
2214
2215
2216
2217
2218
2219
2220
2221
2222
2223static void
2224brcmf_sdio_txpkt_postp(struct brcmf_sdio *bus, struct sk_buff_head *pktq)
2225{
2226 u8 *hdr;
2227 u32 dat_offset;
2228 u16 tail_pad;
2229 u16 dummy_flags, chop_len;
2230 struct sk_buff *pkt_next, *tmp, *pkt_prev;
2231
2232 skb_queue_walk_safe(pktq, pkt_next, tmp) {
2233 dummy_flags = *(u16 *)(pkt_next->cb);
2234 if (dummy_flags & ALIGN_SKB_FLAG) {
2235 chop_len = dummy_flags & ALIGN_SKB_CHOP_LEN_MASK;
2236 if (chop_len) {
2237 pkt_prev = pkt_next->prev;
2238 skb_put(pkt_prev, chop_len);
2239 }
2240 __skb_unlink(pkt_next, pktq);
2241 brcmu_pkt_buf_free_skb(pkt_next);
2242 } else {
2243 hdr = pkt_next->data + bus->tx_hdrlen - SDPCM_SWHDR_LEN;
2244 dat_offset = le32_to_cpu(*(__le32 *)hdr);
2245 dat_offset = (dat_offset & SDPCM_DOFFSET_MASK) >>
2246 SDPCM_DOFFSET_SHIFT;
2247 skb_pull(pkt_next, dat_offset);
2248 if (bus->txglom) {
2249 tail_pad = le16_to_cpu(*(__le16 *)(hdr - 2));
2250 skb_trim(pkt_next, pkt_next->len - tail_pad);
2251 }
2252 }
2253 }
2254}
2255
2256
2257
2258static int brcmf_sdio_txpkt(struct brcmf_sdio *bus, struct sk_buff_head *pktq,
2259 uint chan)
2260{
2261 int ret;
2262 struct sk_buff *pkt_next, *tmp;
2263
2264 brcmf_dbg(TRACE, "Enter\n");
2265
2266 ret = brcmf_sdio_txpkt_prep(bus, pktq, chan);
2267 if (ret)
2268 goto done;
2269
2270 sdio_claim_host(bus->sdiodev->func1);
2271 ret = brcmf_sdiod_send_pkt(bus->sdiodev, pktq);
2272 bus->sdcnt.f2txdata++;
2273
2274 if (ret < 0)
2275 brcmf_sdio_txfail(bus);
2276
2277 sdio_release_host(bus->sdiodev->func1);
2278
2279done:
2280 brcmf_sdio_txpkt_postp(bus, pktq);
2281 if (ret == 0)
2282 bus->tx_seq = (bus->tx_seq + pktq->qlen) % SDPCM_SEQ_WRAP;
2283 skb_queue_walk_safe(pktq, pkt_next, tmp) {
2284 __skb_unlink(pkt_next, pktq);
2285 brcmf_proto_bcdc_txcomplete(bus->sdiodev->dev, pkt_next,
2286 ret == 0);
2287 }
2288 return ret;
2289}
2290
2291static uint brcmf_sdio_sendfromq(struct brcmf_sdio *bus, uint maxframes)
2292{
2293 struct sk_buff *pkt;
2294 struct sk_buff_head pktq;
2295 u32 intstat_addr = bus->sdio_core->base + SD_REG(intstatus);
2296 u32 intstatus = 0;
2297 int ret = 0, prec_out, i;
2298 uint cnt = 0;
2299 u8 tx_prec_map, pkt_num;
2300
2301 brcmf_dbg(TRACE, "Enter\n");
2302
2303 tx_prec_map = ~bus->flowcontrol;
2304
2305
2306 for (cnt = 0; (cnt < maxframes) && data_ok(bus);) {
2307 pkt_num = 1;
2308 if (bus->txglom)
2309 pkt_num = min_t(u8, bus->tx_max - bus->tx_seq,
2310 bus->sdiodev->txglomsz);
2311 pkt_num = min_t(u32, pkt_num,
2312 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol));
2313 __skb_queue_head_init(&pktq);
2314 spin_lock_bh(&bus->txq_lock);
2315 for (i = 0; i < pkt_num; i++) {
2316 pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map,
2317 &prec_out);
2318 if (pkt == NULL)
2319 break;
2320 __skb_queue_tail(&pktq, pkt);
2321 }
2322 spin_unlock_bh(&bus->txq_lock);
2323 if (i == 0)
2324 break;
2325
2326 ret = brcmf_sdio_txpkt(bus, &pktq, SDPCM_DATA_CHANNEL);
2327
2328 cnt += i;
2329
2330
2331 if (!bus->intr) {
2332
2333 sdio_claim_host(bus->sdiodev->func1);
2334 intstatus = brcmf_sdiod_readl(bus->sdiodev,
2335 intstat_addr, &ret);
2336 sdio_release_host(bus->sdiodev->func1);
2337
2338 bus->sdcnt.f2txdata++;
2339 if (ret != 0)
2340 break;
2341 if (intstatus & bus->hostintmask)
2342 atomic_set(&bus->ipend, 1);
2343 }
2344 }
2345
2346
2347 if ((bus->sdiodev->state == BRCMF_SDIOD_DATA) &&
2348 bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
2349 bus->txoff = false;
2350 brcmf_proto_bcdc_txflowblock(bus->sdiodev->dev, false);
2351 }
2352
2353 return cnt;
2354}
2355
2356static int brcmf_sdio_tx_ctrlframe(struct brcmf_sdio *bus, u8 *frame, u16 len)
2357{
2358 u8 doff;
2359 u16 pad;
2360 uint retries = 0;
2361 struct brcmf_sdio_hdrinfo hd_info = {0};
2362 int ret;
2363
2364 brcmf_dbg(SDIO, "Enter\n");
2365
2366
2367 frame -= bus->tx_hdrlen;
2368 len += bus->tx_hdrlen;
2369
2370
2371 doff = ((unsigned long)frame % bus->head_align);
2372 if (doff) {
2373 frame -= doff;
2374 len += doff;
2375 memset(frame + bus->tx_hdrlen, 0, doff);
2376 }
2377
2378
2379 pad = 0;
2380 if (bus->roundup && bus->blocksize && (len > bus->blocksize)) {
2381 pad = bus->blocksize - (len % bus->blocksize);
2382 if ((pad > bus->roundup) || (pad >= bus->blocksize))
2383 pad = 0;
2384 } else if (len % bus->head_align) {
2385 pad = bus->head_align - (len % bus->head_align);
2386 }
2387 len += pad;
2388
2389 hd_info.len = len - pad;
2390 hd_info.channel = SDPCM_CONTROL_CHANNEL;
2391 hd_info.dat_offset = doff + bus->tx_hdrlen;
2392 hd_info.seq_num = bus->tx_seq;
2393 hd_info.lastfrm = true;
2394 hd_info.tail_pad = pad;
2395 brcmf_sdio_hdpack(bus, frame, &hd_info);
2396
2397 if (bus->txglom)
2398 brcmf_sdio_update_hwhdr(frame, len);
2399
2400 brcmf_dbg_hex_dump(BRCMF_BYTES_ON() && BRCMF_CTL_ON(),
2401 frame, len, "Tx Frame:\n");
2402 brcmf_dbg_hex_dump(!(BRCMF_BYTES_ON() && BRCMF_CTL_ON()) &&
2403 BRCMF_HDRS_ON(),
2404 frame, min_t(u16, len, 16), "TxHdr:\n");
2405
2406 do {
2407 ret = brcmf_sdiod_send_buf(bus->sdiodev, frame, len);
2408
2409 if (ret < 0)
2410 brcmf_sdio_txfail(bus);
2411 else
2412 bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQ_WRAP;
2413 } while (ret < 0 && retries++ < TXRETRIES);
2414
2415 return ret;
2416}
2417
2418static bool brcmf_chip_is_ulp(struct brcmf_chip *ci)
2419{
2420 if (ci->chip == CY_CC_43012_CHIP_ID)
2421 return true;
2422 else
2423 return false;
2424}
2425
2426static void brcmf_sdio_bus_stop(struct device *dev)
2427{
2428 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2429 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2430 struct brcmf_sdio *bus = sdiodev->bus;
2431 struct brcmf_core *core = bus->sdio_core;
2432 u32 local_hostintmask;
2433 u8 saveclk, bpreq;
2434 int err;
2435
2436 brcmf_dbg(TRACE, "Enter\n");
2437
2438 if (bus->watchdog_tsk) {
2439 send_sig(SIGTERM, bus->watchdog_tsk, 1);
2440 kthread_stop(bus->watchdog_tsk);
2441 bus->watchdog_tsk = NULL;
2442 }
2443
2444 if (sdiodev->state != BRCMF_SDIOD_NOMEDIUM) {
2445 sdio_claim_host(sdiodev->func1);
2446
2447
2448 brcmf_sdio_bus_sleep(bus, false, false);
2449
2450
2451 brcmf_sdiod_writel(sdiodev, core->base + SD_REG(hostintmask),
2452 0, NULL);
2453
2454 local_hostintmask = bus->hostintmask;
2455 bus->hostintmask = 0;
2456
2457
2458 saveclk = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
2459 &err);
2460 if (!err) {
2461 bpreq = saveclk;
2462 bpreq |= brcmf_chip_is_ulp(bus->ci) ?
2463 SBSDIO_HT_AVAIL_REQ : SBSDIO_FORCE_HT;
2464 brcmf_sdiod_writeb(sdiodev,
2465 SBSDIO_FUNC1_CHIPCLKCSR,
2466 bpreq, &err);
2467 }
2468 if (err)
2469 brcmf_err("Failed to force clock for F2: err %d\n",
2470 err);
2471
2472
2473 brcmf_dbg(INTR, "disable SDIO interrupts\n");
2474 sdio_disable_func(sdiodev->func2);
2475
2476
2477 brcmf_sdiod_writel(sdiodev, core->base + SD_REG(intstatus),
2478 local_hostintmask, NULL);
2479
2480 sdio_release_host(sdiodev->func1);
2481 }
2482
2483 brcmu_pktq_flush(&bus->txq, true, NULL, NULL);
2484
2485
2486 brcmu_pkt_buf_free_skb(bus->glomd);
2487 brcmf_sdio_free_glom(bus);
2488
2489
2490 spin_lock_bh(&bus->rxctl_lock);
2491 bus->rxlen = 0;
2492 spin_unlock_bh(&bus->rxctl_lock);
2493 brcmf_sdio_dcmd_resp_wake(bus);
2494
2495
2496 bus->rxskip = false;
2497 bus->tx_seq = bus->rx_seq = 0;
2498}
2499
2500static inline void brcmf_sdio_clrintr(struct brcmf_sdio *bus)
2501{
2502 struct brcmf_sdio_dev *sdiodev;
2503 unsigned long flags;
2504
2505 sdiodev = bus->sdiodev;
2506 if (sdiodev->oob_irq_requested) {
2507 spin_lock_irqsave(&sdiodev->irq_en_lock, flags);
2508 if (!sdiodev->irq_en && !atomic_read(&bus->ipend)) {
2509 enable_irq(sdiodev->settings->bus.sdio.oob_irq_nr);
2510 sdiodev->irq_en = true;
2511 }
2512 spin_unlock_irqrestore(&sdiodev->irq_en_lock, flags);
2513 }
2514}
2515
2516static int brcmf_sdio_intr_rstatus(struct brcmf_sdio *bus)
2517{
2518 struct brcmf_core *core = bus->sdio_core;
2519 u32 addr;
2520 unsigned long val;
2521 int ret;
2522
2523 addr = core->base + SD_REG(intstatus);
2524
2525 val = brcmf_sdiod_readl(bus->sdiodev, addr, &ret);
2526 bus->sdcnt.f1regdata++;
2527 if (ret != 0)
2528 return ret;
2529
2530 val &= bus->hostintmask;
2531 atomic_set(&bus->fcstate, !!(val & I_HMB_FC_STATE));
2532
2533
2534 if (val) {
2535 brcmf_sdiod_writel(bus->sdiodev, addr, val, &ret);
2536 bus->sdcnt.f1regdata++;
2537 atomic_or(val, &bus->intstatus);
2538 }
2539
2540 return ret;
2541}
2542
2543static void brcmf_sdio_dpc(struct brcmf_sdio *bus)
2544{
2545 struct brcmf_sdio_dev *sdiod = bus->sdiodev;
2546 u32 newstatus = 0;
2547 u32 intstat_addr = bus->sdio_core->base + SD_REG(intstatus);
2548 unsigned long intstatus;
2549 uint txlimit = bus->txbound;
2550 uint framecnt;
2551 int err = 0;
2552
2553 brcmf_dbg(SDIO, "Enter\n");
2554
2555 sdio_claim_host(bus->sdiodev->func1);
2556
2557
2558 if (!bus->sr_enabled && bus->clkstate == CLK_PENDING) {
2559 u8 clkctl, devctl = 0;
2560
2561#ifdef DEBUG
2562
2563 devctl = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_DEVICE_CTL,
2564 &err);
2565#endif
2566
2567
2568 clkctl = brcmf_sdiod_readb(bus->sdiodev,
2569 SBSDIO_FUNC1_CHIPCLKCSR, &err);
2570
2571 brcmf_dbg(SDIO, "DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n",
2572 devctl, clkctl);
2573
2574 if (SBSDIO_HTAV(clkctl)) {
2575 devctl = brcmf_sdiod_readb(bus->sdiodev,
2576 SBSDIO_DEVICE_CTL, &err);
2577 devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY;
2578 brcmf_sdiod_writeb(bus->sdiodev,
2579 SBSDIO_DEVICE_CTL, devctl, &err);
2580 bus->clkstate = CLK_AVAIL;
2581 }
2582 }
2583
2584
2585 brcmf_sdio_bus_sleep(bus, false, true);
2586
2587
2588 if (atomic_read(&bus->ipend) > 0) {
2589 atomic_set(&bus->ipend, 0);
2590 err = brcmf_sdio_intr_rstatus(bus);
2591 }
2592
2593
2594 intstatus = atomic_xchg(&bus->intstatus, 0);
2595
2596
2597
2598
2599
2600 if (intstatus & I_HMB_FC_CHANGE) {
2601 intstatus &= ~I_HMB_FC_CHANGE;
2602 brcmf_sdiod_writel(sdiod, intstat_addr, I_HMB_FC_CHANGE, &err);
2603
2604 newstatus = brcmf_sdiod_readl(sdiod, intstat_addr, &err);
2605
2606 bus->sdcnt.f1regdata += 2;
2607 atomic_set(&bus->fcstate,
2608 !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE)));
2609 intstatus |= (newstatus & bus->hostintmask);
2610 }
2611
2612
2613 if (intstatus & I_HMB_HOST_INT) {
2614 intstatus &= ~I_HMB_HOST_INT;
2615 intstatus |= brcmf_sdio_hostmail(bus);
2616 }
2617
2618 sdio_release_host(bus->sdiodev->func1);
2619
2620
2621 if (intstatus & I_WR_OOSYNC) {
2622 brcmf_err("Dongle reports WR_OOSYNC\n");
2623 intstatus &= ~I_WR_OOSYNC;
2624 }
2625
2626 if (intstatus & I_RD_OOSYNC) {
2627 brcmf_err("Dongle reports RD_OOSYNC\n");
2628 intstatus &= ~I_RD_OOSYNC;
2629 }
2630
2631 if (intstatus & I_SBINT) {
2632 brcmf_err("Dongle reports SBINT\n");
2633 intstatus &= ~I_SBINT;
2634 }
2635
2636
2637 if (intstatus & I_CHIPACTIVE) {
2638 brcmf_dbg(SDIO, "Dongle reports CHIPACTIVE\n");
2639 intstatus &= ~I_CHIPACTIVE;
2640 }
2641
2642
2643 if (bus->rxskip)
2644 intstatus &= ~I_HMB_FRAME_IND;
2645
2646
2647 if ((intstatus & I_HMB_FRAME_IND) && (bus->clkstate == CLK_AVAIL)) {
2648 brcmf_sdio_readframes(bus, bus->rxbound);
2649 if (!bus->rxpending)
2650 intstatus &= ~I_HMB_FRAME_IND;
2651 }
2652
2653
2654 if (intstatus)
2655 atomic_or(intstatus, &bus->intstatus);
2656
2657 brcmf_sdio_clrintr(bus);
2658
2659 if (bus->ctrl_frame_stat && (bus->clkstate == CLK_AVAIL) &&
2660 data_ok(bus)) {
2661 sdio_claim_host(bus->sdiodev->func1);
2662 if (bus->ctrl_frame_stat) {
2663 err = brcmf_sdio_tx_ctrlframe(bus, bus->ctrl_frame_buf,
2664 bus->ctrl_frame_len);
2665 bus->ctrl_frame_err = err;
2666 wmb();
2667 bus->ctrl_frame_stat = false;
2668 }
2669 sdio_release_host(bus->sdiodev->func1);
2670 brcmf_sdio_wait_event_wakeup(bus);
2671 }
2672
2673 if ((bus->clkstate == CLK_AVAIL) && !atomic_read(&bus->fcstate) &&
2674 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit &&
2675 data_ok(bus)) {
2676 framecnt = bus->rxpending ? min(txlimit, bus->txminmax) :
2677 txlimit;
2678 brcmf_sdio_sendfromq(bus, framecnt);
2679 }
2680
2681 if ((bus->sdiodev->state != BRCMF_SDIOD_DATA) || (err != 0)) {
2682 brcmf_err("failed backplane access over SDIO, halting operation\n");
2683 atomic_set(&bus->intstatus, 0);
2684 if (bus->ctrl_frame_stat) {
2685 sdio_claim_host(bus->sdiodev->func1);
2686 if (bus->ctrl_frame_stat) {
2687 bus->ctrl_frame_err = -ENODEV;
2688 wmb();
2689 bus->ctrl_frame_stat = false;
2690 brcmf_sdio_wait_event_wakeup(bus);
2691 }
2692 sdio_release_host(bus->sdiodev->func1);
2693 }
2694 } else if (atomic_read(&bus->intstatus) ||
2695 atomic_read(&bus->ipend) > 0 ||
2696 (!atomic_read(&bus->fcstate) &&
2697 brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) &&
2698 data_ok(bus))) {
2699 bus->dpc_triggered = true;
2700 }
2701}
2702
2703static struct pktq *brcmf_sdio_bus_gettxq(struct device *dev)
2704{
2705 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2706 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2707 struct brcmf_sdio *bus = sdiodev->bus;
2708
2709 return &bus->txq;
2710}
2711
2712static bool brcmf_sdio_prec_enq(struct pktq *q, struct sk_buff *pkt, int prec)
2713{
2714 struct sk_buff *p;
2715 int eprec = -1;
2716
2717
2718
2719
2720 if (!pktq_pfull(q, prec) && !pktq_full(q)) {
2721 brcmu_pktq_penq(q, prec, pkt);
2722 return true;
2723 }
2724
2725
2726 if (pktq_pfull(q, prec)) {
2727 eprec = prec;
2728 } else if (pktq_full(q)) {
2729 p = brcmu_pktq_peek_tail(q, &eprec);
2730 if (eprec > prec)
2731 return false;
2732 }
2733
2734
2735 if (eprec >= 0) {
2736
2737 if (eprec == prec)
2738 return false;
2739
2740 p = brcmu_pktq_pdeq_tail(q, eprec);
2741 if (p == NULL)
2742 brcmf_err("brcmu_pktq_pdeq_tail() failed\n");
2743 brcmu_pkt_buf_free_skb(p);
2744 }
2745
2746
2747 p = brcmu_pktq_penq(q, prec, pkt);
2748 if (p == NULL)
2749 brcmf_err("brcmu_pktq_penq() failed\n");
2750
2751 return p != NULL;
2752}
2753
2754static int brcmf_sdio_bus_txdata(struct device *dev, struct sk_buff *pkt)
2755{
2756 int ret = -EBADE;
2757 uint prec;
2758 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2759 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2760 struct brcmf_sdio *bus = sdiodev->bus;
2761
2762 brcmf_dbg(TRACE, "Enter: pkt: data %p len %d\n", pkt->data, pkt->len);
2763 if (sdiodev->state != BRCMF_SDIOD_DATA)
2764 return -EIO;
2765
2766
2767 skb_push(pkt, bus->tx_hdrlen);
2768
2769
2770 prec = prio2prec((pkt->priority & PRIOMASK));
2771
2772
2773
2774 brcmf_dbg(TRACE, "deferring pktq len %d\n", pktq_len(&bus->txq));
2775 bus->sdcnt.fcqueued++;
2776
2777
2778 spin_lock_bh(&bus->txq_lock);
2779
2780 *(u16 *)(pkt->cb) = 0;
2781 if (!brcmf_sdio_prec_enq(&bus->txq, pkt, prec)) {
2782 skb_pull(pkt, bus->tx_hdrlen);
2783 brcmf_err("out of bus->txq !!!\n");
2784 ret = -ENOSR;
2785 } else {
2786 ret = 0;
2787 }
2788
2789 if (pktq_len(&bus->txq) >= TXHI) {
2790 bus->txoff = true;
2791 brcmf_proto_bcdc_txflowblock(dev, true);
2792 }
2793 spin_unlock_bh(&bus->txq_lock);
2794
2795#ifdef DEBUG
2796 if (pktq_plen(&bus->txq, prec) > qcount[prec])
2797 qcount[prec] = pktq_plen(&bus->txq, prec);
2798#endif
2799
2800 brcmf_sdio_trigger_dpc(bus);
2801 return ret;
2802}
2803
2804#ifdef DEBUG
2805#define CONSOLE_LINE_MAX 192
2806
2807static int brcmf_sdio_readconsole(struct brcmf_sdio *bus)
2808{
2809 struct brcmf_console *c = &bus->console;
2810 u8 line[CONSOLE_LINE_MAX], ch;
2811 u32 n, idx, addr;
2812 int rv;
2813
2814
2815 if (bus->console_addr == 0)
2816 return 0;
2817
2818
2819 addr = bus->console_addr + offsetof(struct rte_console, log_le);
2820 rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, (u8 *)&c->log_le,
2821 sizeof(c->log_le));
2822 if (rv < 0)
2823 return rv;
2824
2825
2826 if (c->buf == NULL) {
2827 c->bufsize = le32_to_cpu(c->log_le.buf_size);
2828 c->buf = kmalloc(c->bufsize, GFP_ATOMIC);
2829 if (c->buf == NULL)
2830 return -ENOMEM;
2831 }
2832
2833 idx = le32_to_cpu(c->log_le.idx);
2834
2835
2836 if (idx > c->bufsize)
2837 return -EBADE;
2838
2839
2840
2841 if (idx == c->last)
2842 return 0;
2843
2844
2845 addr = le32_to_cpu(c->log_le.buf);
2846 rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr, c->buf, c->bufsize);
2847 if (rv < 0)
2848 return rv;
2849
2850 while (c->last != idx) {
2851 for (n = 0; n < CONSOLE_LINE_MAX - 2; n++) {
2852 if (c->last == idx) {
2853
2854
2855
2856
2857
2858 if (c->last >= n)
2859 c->last -= n;
2860 else
2861 c->last = c->bufsize - n;
2862 goto break2;
2863 }
2864 ch = c->buf[c->last];
2865 c->last = (c->last + 1) % c->bufsize;
2866 if (ch == '\n')
2867 break;
2868 line[n] = ch;
2869 }
2870
2871 if (n > 0) {
2872 if (line[n - 1] == '\r')
2873 n--;
2874 line[n] = 0;
2875 pr_debug("CONSOLE: %s\n", line);
2876 }
2877 }
2878break2:
2879
2880 return 0;
2881}
2882#endif
2883
2884static int
2885brcmf_sdio_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
2886{
2887 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
2888 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
2889 struct brcmf_sdio *bus = sdiodev->bus;
2890 int ret;
2891
2892 brcmf_dbg(TRACE, "Enter\n");
2893 if (sdiodev->state != BRCMF_SDIOD_DATA)
2894 return -EIO;
2895
2896
2897 bus->ctrl_frame_buf = msg;
2898 bus->ctrl_frame_len = msglen;
2899 wmb();
2900 bus->ctrl_frame_stat = true;
2901
2902 brcmf_sdio_trigger_dpc(bus);
2903 wait_event_interruptible_timeout(bus->ctrl_wait, !bus->ctrl_frame_stat,
2904 CTL_DONE_TIMEOUT);
2905 ret = 0;
2906 if (bus->ctrl_frame_stat) {
2907 sdio_claim_host(bus->sdiodev->func1);
2908 if (bus->ctrl_frame_stat) {
2909 brcmf_dbg(SDIO, "ctrl_frame timeout\n");
2910 bus->ctrl_frame_stat = false;
2911 ret = -ETIMEDOUT;
2912 }
2913 sdio_release_host(bus->sdiodev->func1);
2914 }
2915 if (!ret) {
2916 brcmf_dbg(SDIO, "ctrl_frame complete, err=%d\n",
2917 bus->ctrl_frame_err);
2918 rmb();
2919 ret = bus->ctrl_frame_err;
2920 }
2921
2922 if (ret)
2923 bus->sdcnt.tx_ctlerrs++;
2924 else
2925 bus->sdcnt.tx_ctlpkts++;
2926
2927 return ret;
2928}
2929
2930#ifdef DEBUG
2931static int brcmf_sdio_dump_console(struct seq_file *seq, struct brcmf_sdio *bus,
2932 struct sdpcm_shared *sh)
2933{
2934 u32 addr, console_ptr, console_size, console_index;
2935 char *conbuf = NULL;
2936 __le32 sh_val;
2937 int rv;
2938
2939
2940 addr = sh->console_addr + offsetof(struct rte_console, log_le);
2941 rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2942 (u8 *)&sh_val, sizeof(u32));
2943 if (rv < 0)
2944 return rv;
2945 console_ptr = le32_to_cpu(sh_val);
2946
2947 addr = sh->console_addr + offsetof(struct rte_console, log_le.buf_size);
2948 rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2949 (u8 *)&sh_val, sizeof(u32));
2950 if (rv < 0)
2951 return rv;
2952 console_size = le32_to_cpu(sh_val);
2953
2954 addr = sh->console_addr + offsetof(struct rte_console, log_le.idx);
2955 rv = brcmf_sdiod_ramrw(bus->sdiodev, false, addr,
2956 (u8 *)&sh_val, sizeof(u32));
2957 if (rv < 0)
2958 return rv;
2959 console_index = le32_to_cpu(sh_val);
2960
2961
2962 if (console_size <= CONSOLE_BUFFER_MAX)
2963 conbuf = vzalloc(console_size+1);
2964
2965 if (!conbuf)
2966 return -ENOMEM;
2967
2968
2969 conbuf[console_size] = '\0';
2970 rv = brcmf_sdiod_ramrw(bus->sdiodev, false, console_ptr, (u8 *)conbuf,
2971 console_size);
2972 if (rv < 0)
2973 goto done;
2974
2975 rv = seq_write(seq, conbuf + console_index,
2976 console_size - console_index);
2977 if (rv < 0)
2978 goto done;
2979
2980 if (console_index > 0)
2981 rv = seq_write(seq, conbuf, console_index - 1);
2982
2983done:
2984 vfree(conbuf);
2985 return rv;
2986}
2987
2988static int brcmf_sdio_trap_info(struct seq_file *seq, struct brcmf_sdio *bus,
2989 struct sdpcm_shared *sh)
2990{
2991 int error;
2992 struct brcmf_trap_info tr;
2993
2994 if ((sh->flags & SDPCM_SHARED_TRAP) == 0) {
2995 brcmf_dbg(INFO, "no trap in firmware\n");
2996 return 0;
2997 }
2998
2999 error = brcmf_sdiod_ramrw(bus->sdiodev, false, sh->trap_addr, (u8 *)&tr,
3000 sizeof(struct brcmf_trap_info));
3001 if (error < 0)
3002 return error;
3003
3004 if (seq)
3005 seq_printf(seq,
3006 "dongle trap info: type 0x%x @ epc 0x%08x\n"
3007 " cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
3008 " lr 0x%08x pc 0x%08x offset 0x%x\n"
3009 " r0 0x%08x r1 0x%08x r2 0x%08x r3 0x%08x\n"
3010 " r4 0x%08x r5 0x%08x r6 0x%08x r7 0x%08x\n",
3011 le32_to_cpu(tr.type), le32_to_cpu(tr.epc),
3012 le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr),
3013 le32_to_cpu(tr.r13), le32_to_cpu(tr.r14),
3014 le32_to_cpu(tr.pc), sh->trap_addr,
3015 le32_to_cpu(tr.r0), le32_to_cpu(tr.r1),
3016 le32_to_cpu(tr.r2), le32_to_cpu(tr.r3),
3017 le32_to_cpu(tr.r4), le32_to_cpu(tr.r5),
3018 le32_to_cpu(tr.r6), le32_to_cpu(tr.r7));
3019 else
3020 pr_debug("dongle trap info: type 0x%x @ epc 0x%08x\n"
3021 " cpsr 0x%08x spsr 0x%08x sp 0x%08x\n"
3022 " lr 0x%08x pc 0x%08x offset 0x%x\n"
3023 " r0 0x%08x r1 0x%08x r2 0x%08x r3 0x%08x\n"
3024 " r4 0x%08x r5 0x%08x r6 0x%08x r7 0x%08x\n",
3025 le32_to_cpu(tr.type), le32_to_cpu(tr.epc),
3026 le32_to_cpu(tr.cpsr), le32_to_cpu(tr.spsr),
3027 le32_to_cpu(tr.r13), le32_to_cpu(tr.r14),
3028 le32_to_cpu(tr.pc), sh->trap_addr,
3029 le32_to_cpu(tr.r0), le32_to_cpu(tr.r1),
3030 le32_to_cpu(tr.r2), le32_to_cpu(tr.r3),
3031 le32_to_cpu(tr.r4), le32_to_cpu(tr.r5),
3032 le32_to_cpu(tr.r6), le32_to_cpu(tr.r7));
3033 return 0;
3034}
3035
3036static int brcmf_sdio_assert_info(struct seq_file *seq, struct brcmf_sdio *bus,
3037 struct sdpcm_shared *sh)
3038{
3039 int error = 0;
3040 char file[80] = "?";
3041 char expr[80] = "<???>";
3042
3043 if ((sh->flags & SDPCM_SHARED_ASSERT_BUILT) == 0) {
3044 brcmf_dbg(INFO, "firmware not built with -assert\n");
3045 return 0;
3046 } else if ((sh->flags & SDPCM_SHARED_ASSERT) == 0) {
3047 brcmf_dbg(INFO, "no assert in dongle\n");
3048 return 0;
3049 }
3050
3051 sdio_claim_host(bus->sdiodev->func1);
3052 if (sh->assert_file_addr != 0) {
3053 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3054 sh->assert_file_addr, (u8 *)file, 80);
3055 if (error < 0)
3056 return error;
3057 }
3058 if (sh->assert_exp_addr != 0) {
3059 error = brcmf_sdiod_ramrw(bus->sdiodev, false,
3060 sh->assert_exp_addr, (u8 *)expr, 80);
3061 if (error < 0)
3062 return error;
3063 }
3064 sdio_release_host(bus->sdiodev->func1);
3065
3066 seq_printf(seq, "dongle assert: %s:%d: assert(%s)\n",
3067 file, sh->assert_line, expr);
3068 return 0;
3069}
3070
3071static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3072{
3073 int error;
3074 struct sdpcm_shared sh;
3075
3076 error = brcmf_sdio_readshared(bus, &sh);
3077
3078 if (error < 0)
3079 return error;
3080
3081 if ((sh.flags & SDPCM_SHARED_ASSERT_BUILT) == 0)
3082 brcmf_dbg(INFO, "firmware not built with -assert\n");
3083 else if (sh.flags & SDPCM_SHARED_ASSERT)
3084 brcmf_err("assertion in dongle\n");
3085
3086 if (sh.flags & SDPCM_SHARED_TRAP) {
3087 brcmf_err("firmware trap in dongle\n");
3088 brcmf_sdio_trap_info(NULL, bus, &sh);
3089 }
3090
3091 return 0;
3092}
3093
3094static int brcmf_sdio_died_dump(struct seq_file *seq, struct brcmf_sdio *bus)
3095{
3096 int error = 0;
3097 struct sdpcm_shared sh;
3098
3099 error = brcmf_sdio_readshared(bus, &sh);
3100 if (error < 0)
3101 goto done;
3102
3103 error = brcmf_sdio_assert_info(seq, bus, &sh);
3104 if (error < 0)
3105 goto done;
3106
3107 error = brcmf_sdio_trap_info(seq, bus, &sh);
3108 if (error < 0)
3109 goto done;
3110
3111 error = brcmf_sdio_dump_console(seq, bus, &sh);
3112
3113done:
3114 return error;
3115}
3116
3117static int brcmf_sdio_forensic_read(struct seq_file *seq, void *data)
3118{
3119 struct brcmf_bus *bus_if = dev_get_drvdata(seq->private);
3120 struct brcmf_sdio *bus = bus_if->bus_priv.sdio->bus;
3121
3122 return brcmf_sdio_died_dump(seq, bus);
3123}
3124
3125static int brcmf_debugfs_sdio_count_read(struct seq_file *seq, void *data)
3126{
3127 struct brcmf_bus *bus_if = dev_get_drvdata(seq->private);
3128 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3129 struct brcmf_sdio_count *sdcnt = &sdiodev->bus->sdcnt;
3130
3131 seq_printf(seq,
3132 "intrcount: %u\nlastintrs: %u\n"
3133 "pollcnt: %u\nregfails: %u\n"
3134 "tx_sderrs: %u\nfcqueued: %u\n"
3135 "rxrtx: %u\nrx_toolong: %u\n"
3136 "rxc_errors: %u\nrx_hdrfail: %u\n"
3137 "rx_badhdr: %u\nrx_badseq: %u\n"
3138 "fc_rcvd: %u\nfc_xoff: %u\n"
3139 "fc_xon: %u\nrxglomfail: %u\n"
3140 "rxglomframes: %u\nrxglompkts: %u\n"
3141 "f2rxhdrs: %u\nf2rxdata: %u\n"
3142 "f2txdata: %u\nf1regdata: %u\n"
3143 "tickcnt: %u\ntx_ctlerrs: %lu\n"
3144 "tx_ctlpkts: %lu\nrx_ctlerrs: %lu\n"
3145 "rx_ctlpkts: %lu\nrx_readahead: %lu\n",
3146 sdcnt->intrcount, sdcnt->lastintrs,
3147 sdcnt->pollcnt, sdcnt->regfails,
3148 sdcnt->tx_sderrs, sdcnt->fcqueued,
3149 sdcnt->rxrtx, sdcnt->rx_toolong,
3150 sdcnt->rxc_errors, sdcnt->rx_hdrfail,
3151 sdcnt->rx_badhdr, sdcnt->rx_badseq,
3152 sdcnt->fc_rcvd, sdcnt->fc_xoff,
3153 sdcnt->fc_xon, sdcnt->rxglomfail,
3154 sdcnt->rxglomframes, sdcnt->rxglompkts,
3155 sdcnt->f2rxhdrs, sdcnt->f2rxdata,
3156 sdcnt->f2txdata, sdcnt->f1regdata,
3157 sdcnt->tickcnt, sdcnt->tx_ctlerrs,
3158 sdcnt->tx_ctlpkts, sdcnt->rx_ctlerrs,
3159 sdcnt->rx_ctlpkts, sdcnt->rx_readahead_cnt);
3160
3161 return 0;
3162}
3163
3164static void brcmf_sdio_debugfs_create(struct device *dev)
3165{
3166 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3167 struct brcmf_pub *drvr = bus_if->drvr;
3168 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3169 struct brcmf_sdio *bus = sdiodev->bus;
3170 struct dentry *dentry = brcmf_debugfs_get_devdir(drvr);
3171
3172 if (IS_ERR_OR_NULL(dentry))
3173 return;
3174
3175 bus->console_interval = BRCMF_CONSOLE;
3176
3177 brcmf_debugfs_add_entry(drvr, "forensics", brcmf_sdio_forensic_read);
3178 brcmf_debugfs_add_entry(drvr, "counters",
3179 brcmf_debugfs_sdio_count_read);
3180 debugfs_create_u32("console_interval", 0644, dentry,
3181 &bus->console_interval);
3182}
3183#else
3184static int brcmf_sdio_checkdied(struct brcmf_sdio *bus)
3185{
3186 return 0;
3187}
3188
3189static void brcmf_sdio_debugfs_create(struct device *dev)
3190{
3191}
3192#endif
3193
3194static int
3195brcmf_sdio_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
3196{
3197 int timeleft;
3198 uint rxlen = 0;
3199 bool pending;
3200 u8 *buf;
3201 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3202 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3203 struct brcmf_sdio *bus = sdiodev->bus;
3204
3205 brcmf_dbg(TRACE, "Enter\n");
3206 if (sdiodev->state != BRCMF_SDIOD_DATA)
3207 return -EIO;
3208
3209
3210 timeleft = brcmf_sdio_dcmd_resp_wait(bus, &bus->rxlen, &pending);
3211
3212 spin_lock_bh(&bus->rxctl_lock);
3213 rxlen = bus->rxlen;
3214 memcpy(msg, bus->rxctl, min(msglen, rxlen));
3215 bus->rxctl = NULL;
3216 buf = bus->rxctl_orig;
3217 bus->rxctl_orig = NULL;
3218 bus->rxlen = 0;
3219 spin_unlock_bh(&bus->rxctl_lock);
3220 vfree(buf);
3221
3222 if (rxlen) {
3223 brcmf_dbg(CTL, "resumed on rxctl frame, got %d expected %d\n",
3224 rxlen, msglen);
3225 } else if (timeleft == 0) {
3226 brcmf_err("resumed on timeout\n");
3227 brcmf_sdio_checkdied(bus);
3228 } else if (pending) {
3229 brcmf_dbg(CTL, "cancelled\n");
3230 return -ERESTARTSYS;
3231 } else {
3232 brcmf_dbg(CTL, "resumed for unknown reason?\n");
3233 brcmf_sdio_checkdied(bus);
3234 }
3235
3236 if (rxlen)
3237 bus->sdcnt.rx_ctlpkts++;
3238 else
3239 bus->sdcnt.rx_ctlerrs++;
3240
3241 return rxlen ? (int)rxlen : -ETIMEDOUT;
3242}
3243
3244#ifdef DEBUG
3245static bool
3246brcmf_sdio_verifymemory(struct brcmf_sdio_dev *sdiodev, u32 ram_addr,
3247 u8 *ram_data, uint ram_sz)
3248{
3249 char *ram_cmp;
3250 int err;
3251 bool ret = true;
3252 int address;
3253 int offset;
3254 int len;
3255
3256
3257 brcmf_dbg(INFO, "Compare RAM dl & ul at 0x%08x; size=%d\n", ram_addr,
3258 ram_sz);
3259 ram_cmp = kmalloc(MEMBLOCK, GFP_KERNEL);
3260
3261 if (!ram_cmp)
3262 return true;
3263
3264 address = ram_addr;
3265 offset = 0;
3266 while (offset < ram_sz) {
3267 len = ((offset + MEMBLOCK) < ram_sz) ? MEMBLOCK :
3268 ram_sz - offset;
3269 err = brcmf_sdiod_ramrw(sdiodev, false, address, ram_cmp, len);
3270 if (err) {
3271 brcmf_err("error %d on reading %d membytes at 0x%08x\n",
3272 err, len, address);
3273 ret = false;
3274 break;
3275 } else if (memcmp(ram_cmp, &ram_data[offset], len)) {
3276 brcmf_err("Downloaded RAM image is corrupted, block offset is %d, len is %d\n",
3277 offset, len);
3278 ret = false;
3279 break;
3280 }
3281 offset += len;
3282 address += len;
3283 }
3284
3285 kfree(ram_cmp);
3286
3287 return ret;
3288}
3289#else
3290static bool
3291brcmf_sdio_verifymemory(struct brcmf_sdio_dev *sdiodev, u32 ram_addr,
3292 u8 *ram_data, uint ram_sz)
3293{
3294 return true;
3295}
3296#endif
3297
3298static int brcmf_sdio_download_code_file(struct brcmf_sdio *bus,
3299 const struct firmware *fw)
3300{
3301 int err;
3302
3303 brcmf_dbg(TRACE, "Enter\n");
3304
3305 err = brcmf_sdiod_ramrw(bus->sdiodev, true, bus->ci->rambase,
3306 (u8 *)fw->data, fw->size);
3307 if (err)
3308 brcmf_err("error %d on writing %d membytes at 0x%08x\n",
3309 err, (int)fw->size, bus->ci->rambase);
3310 else if (!brcmf_sdio_verifymemory(bus->sdiodev, bus->ci->rambase,
3311 (u8 *)fw->data, fw->size))
3312 err = -EIO;
3313
3314 return err;
3315}
3316
3317static int brcmf_sdio_download_nvram(struct brcmf_sdio *bus,
3318 void *vars, u32 varsz)
3319{
3320 int address;
3321 int err;
3322
3323 brcmf_dbg(TRACE, "Enter\n");
3324
3325 address = bus->ci->ramsize - varsz + bus->ci->rambase;
3326 err = brcmf_sdiod_ramrw(bus->sdiodev, true, address, vars, varsz);
3327 if (err)
3328 brcmf_err("error %d on writing %d nvram bytes at 0x%08x\n",
3329 err, varsz, address);
3330 else if (!brcmf_sdio_verifymemory(bus->sdiodev, address, vars, varsz))
3331 err = -EIO;
3332
3333 return err;
3334}
3335
3336static int brcmf_sdio_download_firmware(struct brcmf_sdio *bus,
3337 const struct firmware *fw,
3338 void *nvram, u32 nvlen)
3339{
3340 int bcmerror;
3341 u32 rstvec;
3342
3343 sdio_claim_host(bus->sdiodev->func1);
3344 brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
3345
3346 rstvec = get_unaligned_le32(fw->data);
3347 brcmf_dbg(SDIO, "firmware rstvec: %x\n", rstvec);
3348
3349 bcmerror = brcmf_sdio_download_code_file(bus, fw);
3350 release_firmware(fw);
3351 if (bcmerror) {
3352 brcmf_err("dongle image file download failed\n");
3353 brcmf_fw_nvram_free(nvram);
3354 goto err;
3355 }
3356
3357 bcmerror = brcmf_sdio_download_nvram(bus, nvram, nvlen);
3358 brcmf_fw_nvram_free(nvram);
3359 if (bcmerror) {
3360 brcmf_err("dongle nvram file download failed\n");
3361 goto err;
3362 }
3363
3364
3365 if (!brcmf_chip_set_active(bus->ci, rstvec)) {
3366 brcmf_err("error getting out of ARM core reset\n");
3367 goto err;
3368 }
3369
3370err:
3371 brcmf_sdio_clkctl(bus, CLK_SDONLY, false);
3372 sdio_release_host(bus->sdiodev->func1);
3373 return bcmerror;
3374}
3375
3376static bool brcmf_sdio_aos_no_decode(struct brcmf_sdio *bus)
3377{
3378 if (bus->ci->chip == CY_CC_43012_CHIP_ID)
3379 return true;
3380 else
3381 return false;
3382}
3383
3384static void brcmf_sdio_sr_init(struct brcmf_sdio *bus)
3385{
3386 int err = 0;
3387 u8 val;
3388 u8 wakeupctrl;
3389 u8 cardcap;
3390 u8 chipclkcsr;
3391
3392 brcmf_dbg(TRACE, "Enter\n");
3393
3394 if (brcmf_chip_is_ulp(bus->ci)) {
3395 wakeupctrl = SBSDIO_FUNC1_WCTRL_ALPWAIT_SHIFT;
3396 chipclkcsr = SBSDIO_HT_AVAIL_REQ;
3397 } else {
3398 wakeupctrl = SBSDIO_FUNC1_WCTRL_HTWAIT_SHIFT;
3399 chipclkcsr = SBSDIO_FORCE_HT;
3400 }
3401
3402 if (brcmf_sdio_aos_no_decode(bus)) {
3403 cardcap = SDIO_CCCR_BRCM_CARDCAP_CMD_NODEC;
3404 } else {
3405 cardcap = (SDIO_CCCR_BRCM_CARDCAP_CMD14_SUPPORT |
3406 SDIO_CCCR_BRCM_CARDCAP_CMD14_EXT);
3407 }
3408
3409 val = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, &err);
3410 if (err) {
3411 brcmf_err("error reading SBSDIO_FUNC1_WAKEUPCTRL\n");
3412 return;
3413 }
3414 val |= 1 << wakeupctrl;
3415 brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_WAKEUPCTRL, val, &err);
3416 if (err) {
3417 brcmf_err("error writing SBSDIO_FUNC1_WAKEUPCTRL\n");
3418 return;
3419 }
3420
3421
3422 brcmf_sdiod_func0_wb(bus->sdiodev, SDIO_CCCR_BRCM_CARDCAP,
3423 cardcap,
3424 &err);
3425 if (err) {
3426 brcmf_err("error writing SDIO_CCCR_BRCM_CARDCAP\n");
3427 return;
3428 }
3429
3430 brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3431 chipclkcsr, &err);
3432 if (err) {
3433 brcmf_err("error writing SBSDIO_FUNC1_CHIPCLKCSR\n");
3434 return;
3435 }
3436
3437
3438 bus->sr_enabled = true;
3439 brcmf_dbg(INFO, "SR enabled\n");
3440}
3441
3442
3443static int brcmf_sdio_kso_init(struct brcmf_sdio *bus)
3444{
3445 struct brcmf_core *core = bus->sdio_core;
3446 u8 val;
3447 int err = 0;
3448
3449 brcmf_dbg(TRACE, "Enter\n");
3450
3451
3452 if (core->rev < 12)
3453 return 0;
3454
3455 val = brcmf_sdiod_readb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR, &err);
3456 if (err) {
3457 brcmf_err("error reading SBSDIO_FUNC1_SLEEPCSR\n");
3458 return err;
3459 }
3460
3461 if (!(val & SBSDIO_FUNC1_SLEEPCSR_KSO_MASK)) {
3462 val |= (SBSDIO_FUNC1_SLEEPCSR_KSO_EN <<
3463 SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT);
3464 brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_SLEEPCSR,
3465 val, &err);
3466 if (err) {
3467 brcmf_err("error writing SBSDIO_FUNC1_SLEEPCSR\n");
3468 return err;
3469 }
3470 }
3471
3472 return 0;
3473}
3474
3475
3476static int brcmf_sdio_bus_preinit(struct device *dev)
3477{
3478 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3479 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3480 struct brcmf_sdio *bus = sdiodev->bus;
3481 struct brcmf_core *core = bus->sdio_core;
3482 u32 value;
3483 int err;
3484
3485
3486 if (WARN_ON(!bus_if->maxctl))
3487 return -EINVAL;
3488
3489
3490 bus_if->maxctl += bus->roundup;
3491 value = roundup((bus_if->maxctl + SDPCM_HDRLEN), ALIGNMENT);
3492 value += bus->head_align;
3493 bus->rxbuf = kmalloc(value, GFP_ATOMIC);
3494 if (bus->rxbuf)
3495 bus->rxblen = value;
3496
3497
3498
3499
3500
3501 if (core->rev < 12) {
3502
3503 value = 0;
3504 err = brcmf_iovar_data_set(dev, "bus:txglom", &value,
3505 sizeof(u32));
3506 } else {
3507
3508 value = sdiodev->settings->bus.sdio.sd_sgentry_align;
3509
3510 value = max_t(u32, value, ALIGNMENT);
3511 err = brcmf_iovar_data_set(dev, "bus:txglomalign", &value,
3512 sizeof(u32));
3513 }
3514
3515 if (err < 0)
3516 goto done;
3517
3518 bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
3519 if (sdiodev->sg_support) {
3520 bus->txglom = false;
3521 value = 1;
3522 err = brcmf_iovar_data_set(bus->sdiodev->dev, "bus:rxglom",
3523 &value, sizeof(u32));
3524 if (err < 0) {
3525
3526 err = 0;
3527 } else {
3528 bus->txglom = true;
3529 bus->tx_hdrlen += SDPCM_HWEXT_LEN;
3530 }
3531 }
3532 brcmf_bus_add_txhdrlen(bus->sdiodev->dev, bus->tx_hdrlen);
3533
3534done:
3535 return err;
3536}
3537
3538static size_t brcmf_sdio_bus_get_ramsize(struct device *dev)
3539{
3540 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3541 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3542 struct brcmf_sdio *bus = sdiodev->bus;
3543
3544 return bus->ci->ramsize - bus->ci->srsize;
3545}
3546
3547static int brcmf_sdio_bus_get_memdump(struct device *dev, void *data,
3548 size_t mem_size)
3549{
3550 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
3551 struct brcmf_sdio_dev *sdiodev = bus_if->bus_priv.sdio;
3552 struct brcmf_sdio *bus = sdiodev->bus;
3553 int err;
3554 int address;
3555 int offset;
3556 int len;
3557
3558 brcmf_dbg(INFO, "dump at 0x%08x: size=%zu\n", bus->ci->rambase,
3559 mem_size);
3560
3561 address = bus->ci->rambase;
3562 offset = err = 0;
3563 sdio_claim_host(sdiodev->func1);
3564 while (offset < mem_size) {
3565 len = ((offset + MEMBLOCK) < mem_size) ? MEMBLOCK :
3566 mem_size - offset;
3567 err = brcmf_sdiod_ramrw(sdiodev, false, address, data, len);
3568 if (err) {
3569 brcmf_err("error %d on reading %d membytes at 0x%08x\n",
3570 err, len, address);
3571 goto done;
3572 }
3573 data += len;
3574 offset += len;
3575 address += len;
3576 }
3577
3578done:
3579 sdio_release_host(sdiodev->func1);
3580 return err;
3581}
3582
3583void brcmf_sdio_trigger_dpc(struct brcmf_sdio *bus)
3584{
3585 if (!bus->dpc_triggered) {
3586 bus->dpc_triggered = true;
3587 queue_work(bus->brcmf_wq, &bus->datawork);
3588 }
3589}
3590
3591void brcmf_sdio_isr(struct brcmf_sdio *bus)
3592{
3593 brcmf_dbg(TRACE, "Enter\n");
3594
3595 if (!bus) {
3596 brcmf_err("bus is null pointer, exiting\n");
3597 return;
3598 }
3599
3600
3601 bus->sdcnt.intrcount++;
3602 if (in_interrupt())
3603 atomic_set(&bus->ipend, 1);
3604 else
3605 if (brcmf_sdio_intr_rstatus(bus)) {
3606 brcmf_err("failed backplane access\n");
3607 }
3608
3609
3610 if (!bus->intr)
3611 brcmf_err("isr w/o interrupt configured!\n");
3612
3613 bus->dpc_triggered = true;
3614 queue_work(bus->brcmf_wq, &bus->datawork);
3615}
3616
3617static void brcmf_sdio_bus_watchdog(struct brcmf_sdio *bus)
3618{
3619 brcmf_dbg(TIMER, "Enter\n");
3620
3621
3622 if (!bus->sr_enabled &&
3623 bus->poll && (++bus->polltick >= bus->pollrate)) {
3624 u32 intstatus = 0;
3625
3626
3627 bus->polltick = 0;
3628
3629
3630 if (!bus->intr ||
3631 (bus->sdcnt.intrcount == bus->sdcnt.lastintrs)) {
3632
3633 if (!bus->dpc_triggered) {
3634 u8 devpend;
3635
3636 sdio_claim_host(bus->sdiodev->func1);
3637 devpend = brcmf_sdiod_func0_rb(bus->sdiodev,
3638 SDIO_CCCR_INTx, NULL);
3639 sdio_release_host(bus->sdiodev->func1);
3640 intstatus = devpend & (INTR_STATUS_FUNC1 |
3641 INTR_STATUS_FUNC2);
3642 }
3643
3644
3645
3646 if (intstatus) {
3647 bus->sdcnt.pollcnt++;
3648 atomic_set(&bus->ipend, 1);
3649
3650 bus->dpc_triggered = true;
3651 queue_work(bus->brcmf_wq, &bus->datawork);
3652 }
3653 }
3654
3655
3656 bus->sdcnt.lastintrs = bus->sdcnt.intrcount;
3657 }
3658#ifdef DEBUG
3659
3660 if (bus->sdiodev->state == BRCMF_SDIOD_DATA && BRCMF_FWCON_ON() &&
3661 bus->console_interval != 0) {
3662 bus->console.count += jiffies_to_msecs(BRCMF_WD_POLL);
3663 if (bus->console.count >= bus->console_interval) {
3664 bus->console.count -= bus->console_interval;
3665 sdio_claim_host(bus->sdiodev->func1);
3666
3667 brcmf_sdio_bus_sleep(bus, false, false);
3668 if (brcmf_sdio_readconsole(bus) < 0)
3669
3670 bus->console_interval = 0;
3671 sdio_release_host(bus->sdiodev->func1);
3672 }
3673 }
3674#endif
3675
3676
3677 if (!bus->dpc_triggered) {
3678 rmb();
3679 if ((!bus->dpc_running) && (bus->idletime > 0) &&
3680 (bus->clkstate == CLK_AVAIL)) {
3681 bus->idlecount++;
3682 if (bus->idlecount > bus->idletime) {
3683 brcmf_dbg(SDIO, "idle\n");
3684 sdio_claim_host(bus->sdiodev->func1);
3685 brcmf_sdio_wd_timer(bus, false);
3686 bus->idlecount = 0;
3687 brcmf_sdio_bus_sleep(bus, true, false);
3688 sdio_release_host(bus->sdiodev->func1);
3689 }
3690 } else {
3691 bus->idlecount = 0;
3692 }
3693 } else {
3694 bus->idlecount = 0;
3695 }
3696}
3697
3698static void brcmf_sdio_dataworker(struct work_struct *work)
3699{
3700 struct brcmf_sdio *bus = container_of(work, struct brcmf_sdio,
3701 datawork);
3702
3703 bus->dpc_running = true;
3704 wmb();
3705 while (READ_ONCE(bus->dpc_triggered)) {
3706 bus->dpc_triggered = false;
3707 brcmf_sdio_dpc(bus);
3708 bus->idlecount = 0;
3709 }
3710 bus->dpc_running = false;
3711 if (brcmf_sdiod_freezing(bus->sdiodev)) {
3712 brcmf_sdiod_change_state(bus->sdiodev, BRCMF_SDIOD_DOWN);
3713 brcmf_sdiod_try_freeze(bus->sdiodev);
3714 brcmf_sdiod_change_state(bus->sdiodev, BRCMF_SDIOD_DATA);
3715 }
3716}
3717
3718static void
3719brcmf_sdio_drivestrengthinit(struct brcmf_sdio_dev *sdiodev,
3720 struct brcmf_chip *ci, u32 drivestrength)
3721{
3722 const struct sdiod_drive_str *str_tab = NULL;
3723 u32 str_mask;
3724 u32 str_shift;
3725 u32 i;
3726 u32 drivestrength_sel = 0;
3727 u32 cc_data_temp;
3728 u32 addr;
3729
3730 if (!(ci->cc_caps & CC_CAP_PMU))
3731 return;
3732
3733 switch (SDIOD_DRVSTR_KEY(ci->chip, ci->pmurev)) {
3734 case SDIOD_DRVSTR_KEY(BRCM_CC_4330_CHIP_ID, 12):
3735 str_tab = sdiod_drvstr_tab1_1v8;
3736 str_mask = 0x00003800;
3737 str_shift = 11;
3738 break;
3739 case SDIOD_DRVSTR_KEY(BRCM_CC_4334_CHIP_ID, 17):
3740 str_tab = sdiod_drvstr_tab6_1v8;
3741 str_mask = 0x00001800;
3742 str_shift = 11;
3743 break;
3744 case SDIOD_DRVSTR_KEY(BRCM_CC_43143_CHIP_ID, 17):
3745
3746 i = ARRAY_SIZE(sdiod_drvstr_tab2_3v3) - 1;
3747 if (drivestrength >= sdiod_drvstr_tab2_3v3[i].strength) {
3748 str_tab = sdiod_drvstr_tab2_3v3;
3749 str_mask = 0x00000007;
3750 str_shift = 0;
3751 } else
3752 brcmf_err("Invalid SDIO Drive strength for chip %s, strength=%d\n",
3753 ci->name, drivestrength);
3754 break;
3755 case SDIOD_DRVSTR_KEY(BRCM_CC_43362_CHIP_ID, 13):
3756 str_tab = sdiod_drive_strength_tab5_1v8;
3757 str_mask = 0x00003800;
3758 str_shift = 11;
3759 break;
3760 default:
3761 brcmf_dbg(INFO, "No SDIO driver strength init needed for chip %s rev %d pmurev %d\n",
3762 ci->name, ci->chiprev, ci->pmurev);
3763 break;
3764 }
3765
3766 if (str_tab != NULL) {
3767 struct brcmf_core *pmu = brcmf_chip_get_pmu(ci);
3768
3769 for (i = 0; str_tab[i].strength != 0; i++) {
3770 if (drivestrength >= str_tab[i].strength) {
3771 drivestrength_sel = str_tab[i].sel;
3772 break;
3773 }
3774 }
3775 addr = CORE_CC_REG(pmu->base, chipcontrol_addr);
3776 brcmf_sdiod_writel(sdiodev, addr, 1, NULL);
3777 cc_data_temp = brcmf_sdiod_readl(sdiodev, addr, NULL);
3778 cc_data_temp &= ~str_mask;
3779 drivestrength_sel <<= str_shift;
3780 cc_data_temp |= drivestrength_sel;
3781 brcmf_sdiod_writel(sdiodev, addr, cc_data_temp, NULL);
3782
3783 brcmf_dbg(INFO, "SDIO: %d mA (req=%d mA) drive strength selected, set to 0x%08x\n",
3784 str_tab[i].strength, drivestrength, cc_data_temp);
3785 }
3786}
3787
3788static int brcmf_sdio_buscoreprep(void *ctx)
3789{
3790 struct brcmf_sdio_dev *sdiodev = ctx;
3791 int err = 0;
3792 u8 clkval, clkset;
3793
3794
3795 clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_ALP_AVAIL_REQ;
3796 brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
3797 if (err) {
3798 brcmf_err("error writing for HT off\n");
3799 return err;
3800 }
3801
3802
3803
3804 clkval = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, NULL);
3805
3806 if ((clkval & ~SBSDIO_AVBITS) != clkset) {
3807 brcmf_err("ChipClkCSR access: wrote 0x%02x read 0x%02x\n",
3808 clkset, clkval);
3809 return -EACCES;
3810 }
3811
3812 SPINWAIT(((clkval = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3813 NULL)),
3814 !SBSDIO_ALPAV(clkval)),
3815 PMU_MAX_TRANSITION_DLY);
3816
3817 if (!SBSDIO_ALPAV(clkval)) {
3818 brcmf_err("timeout on ALPAV wait, clkval 0x%02x\n",
3819 clkval);
3820 return -EBUSY;
3821 }
3822
3823 clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_FORCE_ALP;
3824 brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err);
3825 udelay(65);
3826
3827
3828 brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_SDIOPULLUP, 0, NULL);
3829
3830 return 0;
3831}
3832
3833static void brcmf_sdio_buscore_activate(void *ctx, struct brcmf_chip *chip,
3834 u32 rstvec)
3835{
3836 struct brcmf_sdio_dev *sdiodev = ctx;
3837 struct brcmf_core *core = sdiodev->bus->sdio_core;
3838 u32 reg_addr;
3839
3840
3841 reg_addr = core->base + SD_REG(intstatus);
3842 brcmf_sdiod_writel(sdiodev, reg_addr, 0xFFFFFFFF, NULL);
3843
3844 if (rstvec)
3845
3846 brcmf_sdiod_ramrw(sdiodev, true, 0, (void *)&rstvec,
3847 sizeof(rstvec));
3848}
3849
3850static u32 brcmf_sdio_buscore_read32(void *ctx, u32 addr)
3851{
3852 struct brcmf_sdio_dev *sdiodev = ctx;
3853 u32 val, rev;
3854
3855 val = brcmf_sdiod_readl(sdiodev, addr, NULL);
3856
3857
3858
3859
3860
3861
3862
3863
3864 if (addr == CORE_CC_REG(SI_ENUM_BASE, chipid) &&
3865 (sdiodev->func1->device == SDIO_DEVICE_ID_BROADCOM_4339 ||
3866 sdiodev->func1->device == SDIO_DEVICE_ID_BROADCOM_4335_4339)) {
3867 rev = (val & CID_REV_MASK) >> CID_REV_SHIFT;
3868 if (rev >= 2) {
3869 val &= ~CID_ID_MASK;
3870 val |= BRCM_CC_4339_CHIP_ID;
3871 }
3872 }
3873
3874 return val;
3875}
3876
3877static void brcmf_sdio_buscore_write32(void *ctx, u32 addr, u32 val)
3878{
3879 struct brcmf_sdio_dev *sdiodev = ctx;
3880
3881 brcmf_sdiod_writel(sdiodev, addr, val, NULL);
3882}
3883
3884static const struct brcmf_buscore_ops brcmf_sdio_buscore_ops = {
3885 .prepare = brcmf_sdio_buscoreprep,
3886 .activate = brcmf_sdio_buscore_activate,
3887 .read32 = brcmf_sdio_buscore_read32,
3888 .write32 = brcmf_sdio_buscore_write32,
3889};
3890
3891static bool
3892brcmf_sdio_probe_attach(struct brcmf_sdio *bus)
3893{
3894 struct brcmf_sdio_dev *sdiodev;
3895 u8 clkctl = 0;
3896 int err = 0;
3897 int reg_addr;
3898 u32 reg_val;
3899 u32 drivestrength;
3900
3901 sdiodev = bus->sdiodev;
3902 sdio_claim_host(sdiodev->func1);
3903
3904 pr_debug("F1 signature read @0x18000000=0x%4x\n",
3905 brcmf_sdiod_readl(sdiodev, SI_ENUM_BASE, NULL));
3906
3907
3908
3909
3910
3911
3912 brcmf_sdiod_writeb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, BRCMF_INIT_CLKCTL1,
3913 &err);
3914 if (!err)
3915 clkctl = brcmf_sdiod_readb(sdiodev, SBSDIO_FUNC1_CHIPCLKCSR,
3916 &err);
3917
3918 if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) {
3919 brcmf_err("ChipClkCSR access: err %d wrote 0x%02x read 0x%02x\n",
3920 err, BRCMF_INIT_CLKCTL1, clkctl);
3921 goto fail;
3922 }
3923
3924 bus->ci = brcmf_chip_attach(sdiodev, &brcmf_sdio_buscore_ops);
3925 if (IS_ERR(bus->ci)) {
3926 brcmf_err("brcmf_chip_attach failed!\n");
3927 bus->ci = NULL;
3928 goto fail;
3929 }
3930
3931
3932 bus->sdio_core = brcmf_chip_get_core(bus->ci, BCMA_CORE_SDIO_DEV);
3933 if (!bus->sdio_core)
3934 goto fail;
3935
3936
3937 sdiodev->cc_core = brcmf_chip_get_core(bus->ci, BCMA_CORE_CHIPCOMMON);
3938 if (!sdiodev->cc_core)
3939 goto fail;
3940
3941 sdiodev->settings = brcmf_get_module_param(sdiodev->dev,
3942 BRCMF_BUSTYPE_SDIO,
3943 bus->ci->chip,
3944 bus->ci->chiprev);
3945 if (!sdiodev->settings) {
3946 brcmf_err("Failed to get device parameters\n");
3947 goto fail;
3948 }
3949
3950
3951
3952 bus->head_align = ALIGNMENT;
3953 bus->sgentry_align = ALIGNMENT;
3954 if (sdiodev->settings->bus.sdio.sd_head_align > ALIGNMENT)
3955 bus->head_align = sdiodev->settings->bus.sdio.sd_head_align;
3956 if (sdiodev->settings->bus.sdio.sd_sgentry_align > ALIGNMENT)
3957 bus->sgentry_align =
3958 sdiodev->settings->bus.sdio.sd_sgentry_align;
3959
3960
3961
3962
3963 brcmf_sdiod_sgtable_alloc(sdiodev);
3964
3965#ifdef CONFIG_PM_SLEEP
3966
3967
3968
3969 if ((sdio_get_host_pm_caps(sdiodev->func1) & MMC_PM_KEEP_POWER) &&
3970 ((sdio_get_host_pm_caps(sdiodev->func1) & MMC_PM_WAKE_SDIO_IRQ) ||
3971 (sdiodev->settings->bus.sdio.oob_irq_supported)))
3972 sdiodev->bus_if->wowl_supported = true;
3973#endif
3974
3975 if (brcmf_sdio_kso_init(bus)) {
3976 brcmf_err("error enabling KSO\n");
3977 goto fail;
3978 }
3979
3980 if (sdiodev->settings->bus.sdio.drive_strength)
3981 drivestrength = sdiodev->settings->bus.sdio.drive_strength;
3982 else
3983 drivestrength = DEFAULT_SDIO_DRIVE_STRENGTH;
3984 brcmf_sdio_drivestrengthinit(sdiodev, bus->ci, drivestrength);
3985
3986
3987 reg_val = brcmf_sdiod_func0_rb(sdiodev, SDIO_CCCR_BRCM_CARDCTRL, &err);
3988 if (err)
3989 goto fail;
3990
3991 reg_val |= SDIO_CCCR_BRCM_CARDCTRL_WLANRESET;
3992
3993 brcmf_sdiod_func0_wb(sdiodev, SDIO_CCCR_BRCM_CARDCTRL, reg_val, &err);
3994 if (err)
3995 goto fail;
3996
3997
3998 reg_addr = CORE_CC_REG(brcmf_chip_get_pmu(bus->ci)->base, pmucontrol);
3999 reg_val = brcmf_sdiod_readl(sdiodev, reg_addr, &err);
4000 if (err)
4001 goto fail;
4002
4003 reg_val |= (BCMA_CC_PMU_CTL_RES_RELOAD << BCMA_CC_PMU_CTL_RES_SHIFT);
4004
4005 brcmf_sdiod_writel(sdiodev, reg_addr, reg_val, &err);
4006 if (err)
4007 goto fail;
4008
4009 sdio_release_host(sdiodev->func1);
4010
4011 brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
4012
4013
4014 bus->hdrbuf = kzalloc(MAX_HDR_READ + bus->head_align, GFP_KERNEL);
4015 if (!bus->hdrbuf)
4016 return false;
4017
4018 bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0],
4019 bus->head_align);
4020
4021
4022 bus->intr = true;
4023 bus->poll = false;
4024 if (bus->poll)
4025 bus->pollrate = 1;
4026
4027 return true;
4028
4029fail:
4030 sdio_release_host(sdiodev->func1);
4031 return false;
4032}
4033
4034static int
4035brcmf_sdio_watchdog_thread(void *data)
4036{
4037 struct brcmf_sdio *bus = (struct brcmf_sdio *)data;
4038 int wait;
4039
4040 allow_signal(SIGTERM);
4041
4042 brcmf_sdiod_freezer_count(bus->sdiodev);
4043 while (1) {
4044 if (kthread_should_stop())
4045 break;
4046 brcmf_sdiod_freezer_uncount(bus->sdiodev);
4047 wait = wait_for_completion_interruptible(&bus->watchdog_wait);
4048 brcmf_sdiod_freezer_count(bus->sdiodev);
4049 brcmf_sdiod_try_freeze(bus->sdiodev);
4050 if (!wait) {
4051 brcmf_sdio_bus_watchdog(bus);
4052
4053 bus->sdcnt.tickcnt++;
4054 reinit_completion(&bus->watchdog_wait);
4055 } else
4056 break;
4057 }
4058 return 0;
4059}
4060
4061static void
4062brcmf_sdio_watchdog(struct timer_list *t)
4063{
4064 struct brcmf_sdio *bus = from_timer(bus, t, timer);
4065
4066 if (bus->watchdog_tsk) {
4067 complete(&bus->watchdog_wait);
4068
4069 if (bus->wd_active)
4070 mod_timer(&bus->timer,
4071 jiffies + BRCMF_WD_POLL);
4072 }
4073}
4074
4075static
4076int brcmf_sdio_get_fwname(struct device *dev, const char *ext, u8 *fw_name)
4077{
4078 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
4079 struct brcmf_fw_request *fwreq;
4080 struct brcmf_fw_name fwnames[] = {
4081 { ext, fw_name },
4082 };
4083
4084 fwreq = brcmf_fw_alloc_request(bus_if->chip, bus_if->chiprev,
4085 brcmf_sdio_fwnames,
4086 ARRAY_SIZE(brcmf_sdio_fwnames),
4087 fwnames, ARRAY_SIZE(fwnames));
4088 if (!fwreq)
4089 return -ENOMEM;
4090
4091 kfree(fwreq);
4092 return 0;
4093}
4094
4095static const struct brcmf_bus_ops brcmf_sdio_bus_ops = {
4096 .stop = brcmf_sdio_bus_stop,
4097 .preinit = brcmf_sdio_bus_preinit,
4098 .txdata = brcmf_sdio_bus_txdata,
4099 .txctl = brcmf_sdio_bus_txctl,
4100 .rxctl = brcmf_sdio_bus_rxctl,
4101 .gettxq = brcmf_sdio_bus_gettxq,
4102 .wowl_config = brcmf_sdio_wowl_config,
4103 .get_ramsize = brcmf_sdio_bus_get_ramsize,
4104 .get_memdump = brcmf_sdio_bus_get_memdump,
4105 .get_fwname = brcmf_sdio_get_fwname,
4106 .debugfs_create = brcmf_sdio_debugfs_create
4107};
4108
4109#define BRCMF_SDIO_FW_CODE 0
4110#define BRCMF_SDIO_FW_NVRAM 1
4111
4112static void brcmf_sdio_firmware_callback(struct device *dev, int err,
4113 struct brcmf_fw_request *fwreq)
4114{
4115 struct brcmf_bus *bus_if = dev_get_drvdata(dev);
4116 struct brcmf_sdio_dev *sdiod = bus_if->bus_priv.sdio;
4117 struct brcmf_sdio *bus = sdiod->bus;
4118 struct brcmf_core *core = bus->sdio_core;
4119 const struct firmware *code;
4120 void *nvram;
4121 u32 nvram_len;
4122 u8 saveclk, bpreq;
4123 u8 devctl;
4124
4125 brcmf_dbg(TRACE, "Enter: dev=%s, err=%d\n", dev_name(dev), err);
4126
4127 if (err)
4128 goto fail;
4129
4130 code = fwreq->items[BRCMF_SDIO_FW_CODE].binary;
4131 nvram = fwreq->items[BRCMF_SDIO_FW_NVRAM].nv_data.data;
4132 nvram_len = fwreq->items[BRCMF_SDIO_FW_NVRAM].nv_data.len;
4133 kfree(fwreq);
4134
4135
4136 bus->alp_only = true;
4137 err = brcmf_sdio_download_firmware(bus, code, nvram, nvram_len);
4138 if (err)
4139 goto fail;
4140 bus->alp_only = false;
4141
4142
4143 bus->sdcnt.tickcnt = 0;
4144 brcmf_sdio_wd_timer(bus, true);
4145
4146 sdio_claim_host(sdiod->func1);
4147
4148
4149 brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
4150 if (bus->clkstate != CLK_AVAIL)
4151 goto release;
4152
4153
4154 saveclk = brcmf_sdiod_readb(sdiod, SBSDIO_FUNC1_CHIPCLKCSR, &err);
4155 if (!err) {
4156 bpreq = saveclk;
4157 bpreq |= brcmf_chip_is_ulp(bus->ci) ?
4158 SBSDIO_HT_AVAIL_REQ : SBSDIO_FORCE_HT;
4159 brcmf_sdiod_writeb(sdiod, SBSDIO_FUNC1_CHIPCLKCSR,
4160 bpreq, &err);
4161 }
4162 if (err) {
4163 brcmf_err("Failed to force clock for F2: err %d\n", err);
4164 goto release;
4165 }
4166
4167
4168 brcmf_sdiod_writel(sdiod, core->base + SD_REG(tosbmailboxdata),
4169 SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT, NULL);
4170
4171 err = sdio_enable_func(sdiod->func2);
4172
4173 brcmf_dbg(INFO, "enable F2: err=%d\n", err);
4174
4175
4176 if (!err) {
4177
4178 bus->hostintmask = HOSTINTMASK;
4179 brcmf_sdiod_writel(sdiod, core->base + SD_REG(hostintmask),
4180 bus->hostintmask, NULL);
4181
4182 switch (sdiod->func1->device) {
4183 case SDIO_DEVICE_ID_CYPRESS_4373:
4184 brcmf_dbg(INFO, "set F2 watermark to 0x%x*4 bytes\n",
4185 CY_4373_F2_WATERMARK);
4186 brcmf_sdiod_writeb(sdiod, SBSDIO_WATERMARK,
4187 CY_4373_F2_WATERMARK, &err);
4188 devctl = brcmf_sdiod_readb(sdiod, SBSDIO_DEVICE_CTL,
4189 &err);
4190 devctl |= SBSDIO_DEVCTL_F2WM_ENAB;
4191 brcmf_sdiod_writeb(sdiod, SBSDIO_DEVICE_CTL, devctl,
4192 &err);
4193 brcmf_sdiod_writeb(sdiod, SBSDIO_FUNC1_MESBUSYCTRL,
4194 CY_4373_F2_WATERMARK |
4195 SBSDIO_MESBUSYCTRL_ENAB, &err);
4196 break;
4197 case SDIO_DEVICE_ID_CYPRESS_43012:
4198 brcmf_dbg(INFO, "set F2 watermark to 0x%x*4 bytes\n",
4199 CY_43012_F2_WATERMARK);
4200 brcmf_sdiod_writeb(sdiod, SBSDIO_WATERMARK,
4201 CY_43012_F2_WATERMARK, &err);
4202 devctl = brcmf_sdiod_readb(sdiod, SBSDIO_DEVICE_CTL,
4203 &err);
4204 devctl |= SBSDIO_DEVCTL_F2WM_ENAB;
4205 brcmf_sdiod_writeb(sdiod, SBSDIO_DEVICE_CTL, devctl,
4206 &err);
4207 break;
4208 default:
4209 brcmf_sdiod_writeb(sdiod, SBSDIO_WATERMARK,
4210 DEFAULT_F2_WATERMARK, &err);
4211 break;
4212 }
4213 } else {
4214
4215 sdio_disable_func(sdiod->func2);
4216 goto checkdied;
4217 }
4218
4219 if (brcmf_chip_sr_capable(bus->ci)) {
4220 brcmf_sdio_sr_init(bus);
4221 } else {
4222
4223 brcmf_sdiod_writeb(sdiod, SBSDIO_FUNC1_CHIPCLKCSR,
4224 saveclk, &err);
4225 }
4226
4227 if (err == 0) {
4228
4229 brcmf_sdiod_change_state(bus->sdiodev, BRCMF_SDIOD_DATA);
4230
4231 err = brcmf_sdiod_intr_register(sdiod);
4232 if (err != 0)
4233 brcmf_err("intr register failed:%d\n", err);
4234 }
4235
4236
4237 if (err != 0) {
4238 brcmf_sdio_clkctl(bus, CLK_NONE, false);
4239 goto checkdied;
4240 }
4241
4242 sdio_release_host(sdiod->func1);
4243
4244
4245 sdiod->bus_if->dev = sdiod->dev;
4246 sdiod->bus_if->ops = &brcmf_sdio_bus_ops;
4247 sdiod->bus_if->chip = bus->ci->chip;
4248 sdiod->bus_if->chiprev = bus->ci->chiprev;
4249
4250
4251 err = brcmf_attach(sdiod->dev, sdiod->settings);
4252 if (err != 0) {
4253 brcmf_err("brcmf_attach failed\n");
4254 sdio_claim_host(sdiod->func1);
4255 goto checkdied;
4256 }
4257
4258
4259 return;
4260
4261checkdied:
4262 brcmf_sdio_checkdied(bus);
4263release:
4264 sdio_release_host(sdiod->func1);
4265fail:
4266 brcmf_dbg(TRACE, "failed: dev=%s, err=%d\n", dev_name(dev), err);
4267 device_release_driver(&sdiod->func2->dev);
4268 device_release_driver(dev);
4269}
4270
4271static struct brcmf_fw_request *
4272brcmf_sdio_prepare_fw_request(struct brcmf_sdio *bus)
4273{
4274 struct brcmf_fw_request *fwreq;
4275 struct brcmf_fw_name fwnames[] = {
4276 { ".bin", bus->sdiodev->fw_name },
4277 { ".txt", bus->sdiodev->nvram_name },
4278 };
4279
4280 fwreq = brcmf_fw_alloc_request(bus->ci->chip, bus->ci->chiprev,
4281 brcmf_sdio_fwnames,
4282 ARRAY_SIZE(brcmf_sdio_fwnames),
4283 fwnames, ARRAY_SIZE(fwnames));
4284 if (!fwreq)
4285 return NULL;
4286
4287 fwreq->items[BRCMF_SDIO_FW_CODE].type = BRCMF_FW_TYPE_BINARY;
4288 fwreq->items[BRCMF_SDIO_FW_NVRAM].type = BRCMF_FW_TYPE_NVRAM;
4289 fwreq->board_type = bus->sdiodev->settings->board_type;
4290
4291 return fwreq;
4292}
4293
4294struct brcmf_sdio *brcmf_sdio_probe(struct brcmf_sdio_dev *sdiodev)
4295{
4296 int ret;
4297 struct brcmf_sdio *bus;
4298 struct workqueue_struct *wq;
4299 struct brcmf_fw_request *fwreq;
4300
4301 brcmf_dbg(TRACE, "Enter\n");
4302
4303
4304 bus = kzalloc(sizeof(struct brcmf_sdio), GFP_ATOMIC);
4305 if (!bus)
4306 goto fail;
4307
4308 bus->sdiodev = sdiodev;
4309 sdiodev->bus = bus;
4310 skb_queue_head_init(&bus->glom);
4311 bus->txbound = BRCMF_TXBOUND;
4312 bus->rxbound = BRCMF_RXBOUND;
4313 bus->txminmax = BRCMF_TXMINMAX;
4314 bus->tx_seq = SDPCM_SEQ_WRAP - 1;
4315
4316
4317 wq = alloc_ordered_workqueue("brcmf_wq/%s", WQ_MEM_RECLAIM,
4318 dev_name(&sdiodev->func1->dev));
4319 if (!wq) {
4320 brcmf_err("insufficient memory to create txworkqueue\n");
4321 goto fail;
4322 }
4323 brcmf_sdiod_freezer_count(sdiodev);
4324 INIT_WORK(&bus->datawork, brcmf_sdio_dataworker);
4325 bus->brcmf_wq = wq;
4326
4327
4328 if (!(brcmf_sdio_probe_attach(bus))) {
4329 brcmf_err("brcmf_sdio_probe_attach failed\n");
4330 goto fail;
4331 }
4332
4333 spin_lock_init(&bus->rxctl_lock);
4334 spin_lock_init(&bus->txq_lock);
4335 init_waitqueue_head(&bus->ctrl_wait);
4336 init_waitqueue_head(&bus->dcmd_resp_wait);
4337
4338
4339 timer_setup(&bus->timer, brcmf_sdio_watchdog, 0);
4340
4341 init_completion(&bus->watchdog_wait);
4342 bus->watchdog_tsk = kthread_run(brcmf_sdio_watchdog_thread,
4343 bus, "brcmf_wdog/%s",
4344 dev_name(&sdiodev->func1->dev));
4345 if (IS_ERR(bus->watchdog_tsk)) {
4346 pr_warn("brcmf_watchdog thread failed to start\n");
4347 bus->watchdog_tsk = NULL;
4348 }
4349
4350 bus->dpc_triggered = false;
4351 bus->dpc_running = false;
4352
4353
4354 bus->tx_hdrlen = SDPCM_HWHDR_LEN + SDPCM_SWHDR_LEN;
4355
4356
4357 bus->blocksize = bus->sdiodev->func2->cur_blksize;
4358 bus->roundup = min(max_roundup, bus->blocksize);
4359
4360 sdio_claim_host(bus->sdiodev->func1);
4361
4362
4363 sdio_disable_func(bus->sdiodev->func2);
4364
4365 bus->rxflow = false;
4366
4367
4368 brcmf_sdiod_writeb(bus->sdiodev, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL);
4369
4370 sdio_release_host(bus->sdiodev->func1);
4371
4372
4373 bus->clkstate = CLK_SDONLY;
4374 bus->idletime = BRCMF_IDLE_INTERVAL;
4375 bus->idleclock = BRCMF_IDLE_ACTIVE;
4376
4377
4378 bus->sr_enabled = false;
4379
4380 brcmf_dbg(INFO, "completed!!\n");
4381
4382 fwreq = brcmf_sdio_prepare_fw_request(bus);
4383 if (!fwreq) {
4384 ret = -ENOMEM;
4385 goto fail;
4386 }
4387
4388 ret = brcmf_fw_get_firmwares(sdiodev->dev, fwreq,
4389 brcmf_sdio_firmware_callback);
4390 if (ret != 0) {
4391 brcmf_err("async firmware request failed: %d\n", ret);
4392 kfree(fwreq);
4393 goto fail;
4394 }
4395
4396 return bus;
4397
4398fail:
4399 brcmf_sdio_remove(bus);
4400 return NULL;
4401}
4402
4403
4404void brcmf_sdio_remove(struct brcmf_sdio *bus)
4405{
4406 brcmf_dbg(TRACE, "Enter\n");
4407
4408 if (bus) {
4409
4410 if (bus->watchdog_tsk) {
4411 send_sig(SIGTERM, bus->watchdog_tsk, 1);
4412 kthread_stop(bus->watchdog_tsk);
4413 bus->watchdog_tsk = NULL;
4414 }
4415
4416
4417 brcmf_sdiod_intr_unregister(bus->sdiodev);
4418
4419 brcmf_detach(bus->sdiodev->dev);
4420
4421 cancel_work_sync(&bus->datawork);
4422 if (bus->brcmf_wq)
4423 destroy_workqueue(bus->brcmf_wq);
4424
4425 if (bus->ci) {
4426 if (bus->sdiodev->state != BRCMF_SDIOD_NOMEDIUM) {
4427 sdio_claim_host(bus->sdiodev->func1);
4428 brcmf_sdio_wd_timer(bus, false);
4429 brcmf_sdio_clkctl(bus, CLK_AVAIL, false);
4430
4431
4432
4433
4434 msleep(20);
4435 brcmf_chip_set_passive(bus->ci);
4436 brcmf_sdio_clkctl(bus, CLK_NONE, false);
4437 sdio_release_host(bus->sdiodev->func1);
4438 }
4439 brcmf_chip_detach(bus->ci);
4440 }
4441 if (bus->sdiodev->settings)
4442 brcmf_release_module_param(bus->sdiodev->settings);
4443
4444 kfree(bus->rxbuf);
4445 kfree(bus->hdrbuf);
4446 kfree(bus);
4447 }
4448
4449 brcmf_dbg(TRACE, "Disconnected\n");
4450}
4451
4452void brcmf_sdio_wd_timer(struct brcmf_sdio *bus, bool active)
4453{
4454
4455 if (!active && bus->wd_active) {
4456 del_timer_sync(&bus->timer);
4457 bus->wd_active = false;
4458 return;
4459 }
4460
4461
4462 if (bus->sdiodev->state != BRCMF_SDIOD_DATA)
4463 return;
4464
4465 if (active) {
4466 if (!bus->wd_active) {
4467
4468
4469
4470 bus->timer.expires = jiffies + BRCMF_WD_POLL;
4471 add_timer(&bus->timer);
4472 bus->wd_active = true;
4473 } else {
4474
4475 mod_timer(&bus->timer, jiffies + BRCMF_WD_POLL);
4476 }
4477 }
4478}
4479
4480int brcmf_sdio_sleep(struct brcmf_sdio *bus, bool sleep)
4481{
4482 int ret;
4483
4484 sdio_claim_host(bus->sdiodev->func1);
4485 ret = brcmf_sdio_bus_sleep(bus, sleep, false);
4486 sdio_release_host(bus->sdiodev->func1);
4487
4488 return ret;
4489}
4490
4491