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17#ifndef __MT76_H
18#define __MT76_H
19
20#include <linux/kernel.h>
21#include <linux/io.h>
22#include <linux/spinlock.h>
23#include <linux/skbuff.h>
24#include <linux/leds.h>
25#include <linux/usb.h>
26#include <linux/average.h>
27#include <net/mac80211.h>
28#include "util.h"
29
30#define MT_TX_RING_SIZE 256
31#define MT_MCU_RING_SIZE 32
32#define MT_RX_BUF_SIZE 2048
33#define MT_SKB_HEAD_LEN 128
34
35struct mt76_dev;
36struct mt76_wcid;
37
38struct mt76_reg_pair {
39 u32 reg;
40 u32 value;
41};
42
43enum mt76_bus_type {
44 MT76_BUS_MMIO,
45 MT76_BUS_USB,
46};
47
48struct mt76_bus_ops {
49 u32 (*rr)(struct mt76_dev *dev, u32 offset);
50 void (*wr)(struct mt76_dev *dev, u32 offset, u32 val);
51 u32 (*rmw)(struct mt76_dev *dev, u32 offset, u32 mask, u32 val);
52 void (*copy)(struct mt76_dev *dev, u32 offset, const void *data,
53 int len);
54 int (*wr_rp)(struct mt76_dev *dev, u32 base,
55 const struct mt76_reg_pair *rp, int len);
56 int (*rd_rp)(struct mt76_dev *dev, u32 base,
57 struct mt76_reg_pair *rp, int len);
58 enum mt76_bus_type type;
59};
60
61#define mt76_is_usb(dev) ((dev)->mt76.bus->type == MT76_BUS_USB)
62#define mt76_is_mmio(dev) ((dev)->mt76.bus->type == MT76_BUS_MMIO)
63
64enum mt76_txq_id {
65 MT_TXQ_VO = IEEE80211_AC_VO,
66 MT_TXQ_VI = IEEE80211_AC_VI,
67 MT_TXQ_BE = IEEE80211_AC_BE,
68 MT_TXQ_BK = IEEE80211_AC_BK,
69 MT_TXQ_PSD,
70 MT_TXQ_MCU,
71 MT_TXQ_BEACON,
72 MT_TXQ_CAB,
73 MT_TXQ_FWDL,
74 __MT_TXQ_MAX
75};
76
77enum mt76_rxq_id {
78 MT_RXQ_MAIN,
79 MT_RXQ_MCU,
80 __MT_RXQ_MAX
81};
82
83struct mt76_queue_buf {
84 dma_addr_t addr;
85 int len;
86};
87
88struct mt76_tx_info {
89 struct mt76_queue_buf buf[32];
90 struct sk_buff *skb;
91 int nbuf;
92 u32 info;
93};
94
95struct mt76_queue_entry {
96 union {
97 void *buf;
98 struct sk_buff *skb;
99 };
100 union {
101 struct mt76_txwi_cache *txwi;
102 struct urb *urb;
103 };
104 enum mt76_txq_id qid;
105 bool schedule;
106 bool done;
107};
108
109struct mt76_queue_regs {
110 u32 desc_base;
111 u32 ring_size;
112 u32 cpu_idx;
113 u32 dma_idx;
114} __packed __aligned(4);
115
116struct mt76_queue {
117 struct mt76_queue_regs __iomem *regs;
118
119 spinlock_t lock;
120 struct mt76_queue_entry *entry;
121 struct mt76_desc *desc;
122
123 u16 first;
124 u16 head;
125 u16 tail;
126 int ndesc;
127 int queued;
128 int buf_size;
129 bool stopped;
130
131 u8 buf_offset;
132 u8 hw_idx;
133
134 dma_addr_t desc_dma;
135 struct sk_buff *rx_head;
136 struct page_frag_cache rx_page;
137};
138
139struct mt76_sw_queue {
140 struct mt76_queue *q;
141
142 struct list_head swq;
143 int swq_queued;
144};
145
146struct mt76_mcu_ops {
147 int (*mcu_send_msg)(struct mt76_dev *dev, int cmd, const void *data,
148 int len, bool wait_resp);
149 int (*mcu_wr_rp)(struct mt76_dev *dev, u32 base,
150 const struct mt76_reg_pair *rp, int len);
151 int (*mcu_rd_rp)(struct mt76_dev *dev, u32 base,
152 struct mt76_reg_pair *rp, int len);
153 int (*mcu_restart)(struct mt76_dev *dev);
154};
155
156struct mt76_queue_ops {
157 int (*init)(struct mt76_dev *dev);
158
159 int (*alloc)(struct mt76_dev *dev, struct mt76_queue *q,
160 int idx, int n_desc, int bufsize,
161 u32 ring_base);
162
163 int (*add_buf)(struct mt76_dev *dev, struct mt76_queue *q,
164 struct mt76_queue_buf *buf, int nbufs, u32 info,
165 struct sk_buff *skb, void *txwi);
166
167 int (*tx_queue_skb)(struct mt76_dev *dev, enum mt76_txq_id qid,
168 struct sk_buff *skb, struct mt76_wcid *wcid,
169 struct ieee80211_sta *sta);
170
171 int (*tx_queue_skb_raw)(struct mt76_dev *dev, enum mt76_txq_id qid,
172 struct sk_buff *skb, u32 tx_info);
173
174 void *(*dequeue)(struct mt76_dev *dev, struct mt76_queue *q, bool flush,
175 int *len, u32 *info, bool *more);
176
177 void (*rx_reset)(struct mt76_dev *dev, enum mt76_rxq_id qid);
178
179 void (*tx_cleanup)(struct mt76_dev *dev, enum mt76_txq_id qid,
180 bool flush);
181
182 void (*kick)(struct mt76_dev *dev, struct mt76_queue *q);
183};
184
185enum mt76_wcid_flags {
186 MT_WCID_FLAG_CHECK_PS,
187 MT_WCID_FLAG_PS,
188};
189
190#define MT76_N_WCIDS 128
191
192DECLARE_EWMA(signal, 10, 8);
193
194#define MT_WCID_TX_INFO_RATE GENMASK(15, 0)
195#define MT_WCID_TX_INFO_NSS GENMASK(17, 16)
196#define MT_WCID_TX_INFO_TXPWR_ADJ GENMASK(25, 18)
197#define MT_WCID_TX_INFO_SET BIT(31)
198
199struct mt76_wcid {
200 struct mt76_rx_tid __rcu *aggr[IEEE80211_NUM_TIDS];
201
202 struct work_struct aggr_work;
203
204 unsigned long flags;
205
206 struct ewma_signal rssi;
207 int inactive_count;
208
209 u8 idx;
210 u8 hw_key_idx;
211
212 u8 sta:1;
213
214 u8 rx_check_pn;
215 u8 rx_key_pn[IEEE80211_NUM_TIDS][6];
216
217 u32 tx_info;
218 bool sw_iv;
219
220 u8 packet_id;
221};
222
223struct mt76_txq {
224 struct mt76_sw_queue *swq;
225 struct mt76_wcid *wcid;
226
227 struct sk_buff_head retry_q;
228
229 u16 agg_ssn;
230 bool send_bar;
231 bool aggr;
232};
233
234struct mt76_txwi_cache {
235 struct list_head list;
236 dma_addr_t dma_addr;
237
238 struct sk_buff *skb;
239};
240
241struct mt76_rx_tid {
242 struct rcu_head rcu_head;
243
244 struct mt76_dev *dev;
245
246 spinlock_t lock;
247 struct delayed_work reorder_work;
248
249 u16 head;
250 u8 size;
251 u8 nframes;
252
253 u8 started:1, stopped:1, timer_pending:1;
254
255 struct sk_buff *reorder_buf[];
256};
257
258#define MT_TX_CB_DMA_DONE BIT(0)
259#define MT_TX_CB_TXS_DONE BIT(1)
260#define MT_TX_CB_TXS_FAILED BIT(2)
261
262#define MT_PACKET_ID_MASK GENMASK(6, 0)
263#define MT_PACKET_ID_NO_ACK 0
264#define MT_PACKET_ID_NO_SKB 1
265#define MT_PACKET_ID_FIRST 2
266#define MT_PACKET_ID_HAS_RATE BIT(7)
267
268#define MT_TX_STATUS_SKB_TIMEOUT HZ
269
270struct mt76_tx_cb {
271 unsigned long jiffies;
272 u8 wcid;
273 u8 pktid;
274 u8 flags;
275};
276
277enum {
278 MT76_STATE_INITIALIZED,
279 MT76_STATE_RUNNING,
280 MT76_STATE_MCU_RUNNING,
281 MT76_SCANNING,
282 MT76_RESET,
283 MT76_OFFCHANNEL,
284 MT76_REMOVED,
285 MT76_READING_STATS,
286};
287
288struct mt76_hw_cap {
289 bool has_2ghz;
290 bool has_5ghz;
291};
292
293#define MT_TXWI_NO_FREE BIT(0)
294
295struct mt76_driver_ops {
296 bool tx_aligned4_skbs;
297 u32 txwi_flags;
298 u16 txwi_size;
299
300 void (*update_survey)(struct mt76_dev *dev);
301
302 int (*tx_prepare_skb)(struct mt76_dev *dev, void *txwi_ptr,
303 enum mt76_txq_id qid, struct mt76_wcid *wcid,
304 struct ieee80211_sta *sta,
305 struct mt76_tx_info *tx_info);
306
307 void (*tx_complete_skb)(struct mt76_dev *dev, enum mt76_txq_id qid,
308 struct mt76_queue_entry *e);
309
310 bool (*tx_status_data)(struct mt76_dev *dev, u8 *update);
311
312 void (*rx_skb)(struct mt76_dev *dev, enum mt76_rxq_id q,
313 struct sk_buff *skb);
314
315 void (*rx_poll_complete)(struct mt76_dev *dev, enum mt76_rxq_id q);
316
317 void (*sta_ps)(struct mt76_dev *dev, struct ieee80211_sta *sta,
318 bool ps);
319
320 int (*sta_add)(struct mt76_dev *dev, struct ieee80211_vif *vif,
321 struct ieee80211_sta *sta);
322
323 void (*sta_assoc)(struct mt76_dev *dev, struct ieee80211_vif *vif,
324 struct ieee80211_sta *sta);
325
326 void (*sta_remove)(struct mt76_dev *dev, struct ieee80211_vif *vif,
327 struct ieee80211_sta *sta);
328};
329
330struct mt76_channel_state {
331 u64 cc_active;
332 u64 cc_busy;
333};
334
335struct mt76_sband {
336 struct ieee80211_supported_band sband;
337 struct mt76_channel_state *chan;
338};
339
340struct mt76_rate_power {
341 union {
342 struct {
343 s8 cck[4];
344 s8 ofdm[8];
345 s8 stbc[10];
346 s8 ht[16];
347 s8 vht[10];
348 };
349 s8 all[48];
350 };
351};
352
353
354#define MT_VEND_TYPE_EEPROM BIT(31)
355#define MT_VEND_TYPE_CFG BIT(30)
356#define MT_VEND_TYPE_MASK (MT_VEND_TYPE_EEPROM | MT_VEND_TYPE_CFG)
357
358#define MT_VEND_ADDR(type, n) (MT_VEND_TYPE_##type | (n))
359enum mt_vendor_req {
360 MT_VEND_DEV_MODE = 0x1,
361 MT_VEND_WRITE = 0x2,
362 MT_VEND_MULTI_WRITE = 0x6,
363 MT_VEND_MULTI_READ = 0x7,
364 MT_VEND_READ_EEPROM = 0x9,
365 MT_VEND_WRITE_FCE = 0x42,
366 MT_VEND_WRITE_CFG = 0x46,
367 MT_VEND_READ_CFG = 0x47,
368};
369
370enum mt76u_in_ep {
371 MT_EP_IN_PKT_RX,
372 MT_EP_IN_CMD_RESP,
373 __MT_EP_IN_MAX,
374};
375
376enum mt76u_out_ep {
377 MT_EP_OUT_INBAND_CMD,
378 MT_EP_OUT_AC_BK,
379 MT_EP_OUT_AC_BE,
380 MT_EP_OUT_AC_VI,
381 MT_EP_OUT_AC_VO,
382 MT_EP_OUT_HCCA,
383 __MT_EP_OUT_MAX,
384};
385
386#define MT_TX_SG_MAX_SIZE 8
387#define MT_RX_SG_MAX_SIZE 1
388#define MT_NUM_TX_ENTRIES 256
389#define MT_NUM_RX_ENTRIES 128
390#define MCU_RESP_URB_SIZE 1024
391struct mt76_usb {
392 struct mutex usb_ctrl_mtx;
393 u8 data[32];
394
395 struct tasklet_struct rx_tasklet;
396 struct delayed_work stat_work;
397
398 u8 out_ep[__MT_EP_OUT_MAX];
399 u8 in_ep[__MT_EP_IN_MAX];
400 bool sg_en;
401
402 struct mt76u_mcu {
403 struct mutex mutex;
404 u8 *data;
405 u32 msg_seq;
406
407
408 struct mt76_reg_pair *rp;
409 int rp_len;
410 u32 base;
411 bool burst;
412 } mcu;
413};
414
415struct mt76_mmio {
416 struct mt76e_mcu {
417 struct mutex mutex;
418
419 wait_queue_head_t wait;
420 struct sk_buff_head res_q;
421
422 u32 msg_seq;
423 } mcu;
424 void __iomem *regs;
425 spinlock_t irq_lock;
426 u32 irqmask;
427};
428
429struct mt76_dev {
430 struct ieee80211_hw *hw;
431 struct cfg80211_chan_def chandef;
432 struct ieee80211_channel *main_chan;
433
434 spinlock_t lock;
435 spinlock_t cc_lock;
436
437 struct mutex mutex;
438
439 const struct mt76_bus_ops *bus;
440 const struct mt76_driver_ops *drv;
441 const struct mt76_mcu_ops *mcu_ops;
442 struct device *dev;
443
444 struct net_device napi_dev;
445 spinlock_t rx_lock;
446 struct napi_struct napi[__MT_RXQ_MAX];
447 struct sk_buff_head rx_skb[__MT_RXQ_MAX];
448
449 struct list_head txwi_cache;
450 struct mt76_sw_queue q_tx[__MT_TXQ_MAX];
451 struct mt76_queue q_rx[__MT_RXQ_MAX];
452 const struct mt76_queue_ops *queue_ops;
453 int tx_dma_idx[4];
454
455 struct tasklet_struct tx_tasklet;
456 struct napi_struct tx_napi;
457 struct delayed_work mac_work;
458
459 wait_queue_head_t tx_wait;
460 struct sk_buff_head status_list;
461
462 unsigned long wcid_mask[MT76_N_WCIDS / BITS_PER_LONG];
463
464 struct mt76_wcid global_wcid;
465 struct mt76_wcid __rcu *wcid[MT76_N_WCIDS];
466
467 u8 macaddr[ETH_ALEN];
468 u32 rev;
469 unsigned long state;
470
471 u8 antenna_mask;
472 u16 chainmask;
473
474 struct tasklet_struct pre_tbtt_tasklet;
475 int beacon_int;
476 u8 beacon_mask;
477
478 struct mt76_sband sband_2g;
479 struct mt76_sband sband_5g;
480 struct debugfs_blob_wrapper eeprom;
481 struct debugfs_blob_wrapper otp;
482 struct mt76_hw_cap cap;
483
484 struct mt76_rate_power rate_power;
485 int txpower_conf;
486 int txpower_cur;
487
488 enum nl80211_dfs_regions region;
489
490 u32 debugfs_reg;
491
492 struct led_classdev led_cdev;
493 char led_name[32];
494 bool led_al;
495 u8 led_pin;
496
497 u8 csa_complete;
498
499 u32 rxfilter;
500
501 union {
502 struct mt76_mmio mmio;
503 struct mt76_usb usb;
504 };
505};
506
507enum mt76_phy_type {
508 MT_PHY_TYPE_CCK,
509 MT_PHY_TYPE_OFDM,
510 MT_PHY_TYPE_HT,
511 MT_PHY_TYPE_HT_GF,
512 MT_PHY_TYPE_VHT,
513};
514
515struct mt76_rx_status {
516 struct mt76_wcid *wcid;
517
518 unsigned long reorder_time;
519
520 u8 iv[6];
521
522 u8 aggr:1;
523 u8 tid;
524 u16 seqno;
525
526 u16 freq;
527 u32 flag;
528 u8 enc_flags;
529 u8 encoding:2, bw:3;
530 u8 rate_idx;
531 u8 nss;
532 u8 band;
533 s8 signal;
534 u8 chains;
535 s8 chain_signal[IEEE80211_MAX_CHAINS];
536};
537
538#define __mt76_rr(dev, ...) (dev)->bus->rr((dev), __VA_ARGS__)
539#define __mt76_wr(dev, ...) (dev)->bus->wr((dev), __VA_ARGS__)
540#define __mt76_rmw(dev, ...) (dev)->bus->rmw((dev), __VA_ARGS__)
541#define __mt76_wr_copy(dev, ...) (dev)->bus->copy((dev), __VA_ARGS__)
542
543#define __mt76_set(dev, offset, val) __mt76_rmw(dev, offset, 0, val)
544#define __mt76_clear(dev, offset, val) __mt76_rmw(dev, offset, val, 0)
545
546#define mt76_rr(dev, ...) (dev)->mt76.bus->rr(&((dev)->mt76), __VA_ARGS__)
547#define mt76_wr(dev, ...) (dev)->mt76.bus->wr(&((dev)->mt76), __VA_ARGS__)
548#define mt76_rmw(dev, ...) (dev)->mt76.bus->rmw(&((dev)->mt76), __VA_ARGS__)
549#define mt76_wr_copy(dev, ...) (dev)->mt76.bus->copy(&((dev)->mt76), __VA_ARGS__)
550#define mt76_wr_rp(dev, ...) (dev)->mt76.bus->wr_rp(&((dev)->mt76), __VA_ARGS__)
551#define mt76_rd_rp(dev, ...) (dev)->mt76.bus->rd_rp(&((dev)->mt76), __VA_ARGS__)
552
553#define mt76_mcu_send_msg(dev, ...) (dev)->mt76.mcu_ops->mcu_send_msg(&((dev)->mt76), __VA_ARGS__)
554#define __mt76_mcu_send_msg(dev, ...) (dev)->mcu_ops->mcu_send_msg((dev), __VA_ARGS__)
555#define mt76_mcu_restart(dev, ...) (dev)->mt76.mcu_ops->mcu_restart(&((dev)->mt76))
556#define __mt76_mcu_restart(dev, ...) (dev)->mcu_ops->mcu_restart((dev))
557
558#define mt76_set(dev, offset, val) mt76_rmw(dev, offset, 0, val)
559#define mt76_clear(dev, offset, val) mt76_rmw(dev, offset, val, 0)
560
561#define mt76_get_field(_dev, _reg, _field) \
562 FIELD_GET(_field, mt76_rr(dev, _reg))
563
564#define mt76_rmw_field(_dev, _reg, _field, _val) \
565 mt76_rmw(_dev, _reg, _field, FIELD_PREP(_field, _val))
566
567#define __mt76_rmw_field(_dev, _reg, _field, _val) \
568 __mt76_rmw(_dev, _reg, _field, FIELD_PREP(_field, _val))
569
570#define mt76_hw(dev) (dev)->mt76.hw
571
572bool __mt76_poll(struct mt76_dev *dev, u32 offset, u32 mask, u32 val,
573 int timeout);
574
575#define mt76_poll(dev, ...) __mt76_poll(&((dev)->mt76), __VA_ARGS__)
576
577bool __mt76_poll_msec(struct mt76_dev *dev, u32 offset, u32 mask, u32 val,
578 int timeout);
579
580#define mt76_poll_msec(dev, ...) __mt76_poll_msec(&((dev)->mt76), __VA_ARGS__)
581
582void mt76_mmio_init(struct mt76_dev *dev, void __iomem *regs);
583
584static inline u16 mt76_chip(struct mt76_dev *dev)
585{
586 return dev->rev >> 16;
587}
588
589static inline u16 mt76_rev(struct mt76_dev *dev)
590{
591 return dev->rev & 0xffff;
592}
593
594#define mt76xx_chip(dev) mt76_chip(&((dev)->mt76))
595#define mt76xx_rev(dev) mt76_rev(&((dev)->mt76))
596
597#define mt76_init_queues(dev) (dev)->mt76.queue_ops->init(&((dev)->mt76))
598#define mt76_queue_alloc(dev, ...) (dev)->mt76.queue_ops->alloc(&((dev)->mt76), __VA_ARGS__)
599#define mt76_tx_queue_skb_raw(dev, ...) (dev)->mt76.queue_ops->tx_queue_skb_raw(&((dev)->mt76), __VA_ARGS__)
600#define mt76_tx_queue_skb(dev, ...) (dev)->mt76.queue_ops->tx_queue_skb(&((dev)->mt76), __VA_ARGS__)
601#define mt76_queue_rx_reset(dev, ...) (dev)->mt76.queue_ops->rx_reset(&((dev)->mt76), __VA_ARGS__)
602#define mt76_queue_tx_cleanup(dev, ...) (dev)->mt76.queue_ops->tx_cleanup(&((dev)->mt76), __VA_ARGS__)
603#define mt76_queue_kick(dev, ...) (dev)->mt76.queue_ops->kick(&((dev)->mt76), __VA_ARGS__)
604
605static inline struct mt76_channel_state *
606mt76_channel_state(struct mt76_dev *dev, struct ieee80211_channel *c)
607{
608 struct mt76_sband *msband;
609 int idx;
610
611 if (c->band == NL80211_BAND_2GHZ)
612 msband = &dev->sband_2g;
613 else
614 msband = &dev->sband_5g;
615
616 idx = c - &msband->sband.channels[0];
617 return &msband->chan[idx];
618}
619
620struct mt76_dev *mt76_alloc_device(struct device *pdev, unsigned int size,
621 const struct ieee80211_ops *ops,
622 const struct mt76_driver_ops *drv_ops);
623int mt76_register_device(struct mt76_dev *dev, bool vht,
624 struct ieee80211_rate *rates, int n_rates);
625void mt76_unregister_device(struct mt76_dev *dev);
626void mt76_free_device(struct mt76_dev *dev);
627
628struct dentry *mt76_register_debugfs(struct mt76_dev *dev);
629void mt76_seq_puts_array(struct seq_file *file, const char *str,
630 s8 *val, int len);
631
632int mt76_eeprom_init(struct mt76_dev *dev, int len);
633void mt76_eeprom_override(struct mt76_dev *dev);
634
635static inline u8 *
636mt76_get_txwi_ptr(struct mt76_dev *dev, struct mt76_txwi_cache *t)
637{
638 return (u8 *)t - dev->drv->txwi_size;
639}
640
641
642static inline int mt76_incr(int val, int size)
643{
644 return (val + 1) & (size - 1);
645}
646
647
648static inline int mt76_decr(int val, int size)
649{
650 return (val - 1) & (size - 1);
651}
652
653u8 mt76_ac_to_hwq(u8 ac);
654
655static inline struct ieee80211_txq *
656mtxq_to_txq(struct mt76_txq *mtxq)
657{
658 void *ptr = mtxq;
659
660 return container_of(ptr, struct ieee80211_txq, drv_priv);
661}
662
663static inline struct ieee80211_sta *
664wcid_to_sta(struct mt76_wcid *wcid)
665{
666 void *ptr = wcid;
667
668 if (!wcid || !wcid->sta)
669 return NULL;
670
671 return container_of(ptr, struct ieee80211_sta, drv_priv);
672}
673
674static inline struct mt76_tx_cb *mt76_tx_skb_cb(struct sk_buff *skb)
675{
676 BUILD_BUG_ON(sizeof(struct mt76_tx_cb) >
677 sizeof(IEEE80211_SKB_CB(skb)->status.status_driver_data));
678 return ((void *) IEEE80211_SKB_CB(skb)->status.status_driver_data);
679}
680
681static inline void mt76_insert_hdr_pad(struct sk_buff *skb)
682{
683 int len = ieee80211_get_hdrlen_from_skb(skb);
684
685 if (len % 4 == 0)
686 return;
687
688 skb_push(skb, 2);
689 memmove(skb->data, skb->data + 2, len);
690
691 skb->data[len] = 0;
692 skb->data[len + 1] = 0;
693}
694
695static inline bool mt76_is_skb_pktid(u8 pktid)
696{
697 if (pktid & MT_PACKET_ID_HAS_RATE)
698 return false;
699
700 return pktid >= MT_PACKET_ID_FIRST;
701}
702
703void mt76_rx(struct mt76_dev *dev, enum mt76_rxq_id q, struct sk_buff *skb);
704void mt76_tx(struct mt76_dev *dev, struct ieee80211_sta *sta,
705 struct mt76_wcid *wcid, struct sk_buff *skb);
706void mt76_txq_init(struct mt76_dev *dev, struct ieee80211_txq *txq);
707void mt76_txq_remove(struct mt76_dev *dev, struct ieee80211_txq *txq);
708void mt76_wake_tx_queue(struct ieee80211_hw *hw, struct ieee80211_txq *txq);
709void mt76_stop_tx_queues(struct mt76_dev *dev, struct ieee80211_sta *sta,
710 bool send_bar);
711void mt76_txq_schedule(struct mt76_dev *dev, enum mt76_txq_id qid);
712void mt76_txq_schedule_all(struct mt76_dev *dev);
713void mt76_release_buffered_frames(struct ieee80211_hw *hw,
714 struct ieee80211_sta *sta,
715 u16 tids, int nframes,
716 enum ieee80211_frame_release_type reason,
717 bool more_data);
718bool mt76_has_tx_pending(struct mt76_dev *dev);
719void mt76_set_channel(struct mt76_dev *dev);
720int mt76_get_survey(struct ieee80211_hw *hw, int idx,
721 struct survey_info *survey);
722void mt76_set_stream_caps(struct mt76_dev *dev, bool vht);
723
724int mt76_rx_aggr_start(struct mt76_dev *dev, struct mt76_wcid *wcid, u8 tid,
725 u16 ssn, u8 size);
726void mt76_rx_aggr_stop(struct mt76_dev *dev, struct mt76_wcid *wcid, u8 tid);
727
728void mt76_wcid_key_setup(struct mt76_dev *dev, struct mt76_wcid *wcid,
729 struct ieee80211_key_conf *key);
730
731void mt76_tx_status_lock(struct mt76_dev *dev, struct sk_buff_head *list)
732 __acquires(&dev->status_list.lock);
733void mt76_tx_status_unlock(struct mt76_dev *dev, struct sk_buff_head *list)
734 __releases(&dev->status_list.lock);
735
736int mt76_tx_status_skb_add(struct mt76_dev *dev, struct mt76_wcid *wcid,
737 struct sk_buff *skb);
738struct sk_buff *mt76_tx_status_skb_get(struct mt76_dev *dev,
739 struct mt76_wcid *wcid, int pktid,
740 struct sk_buff_head *list);
741void mt76_tx_status_skb_done(struct mt76_dev *dev, struct sk_buff *skb,
742 struct sk_buff_head *list);
743void mt76_tx_complete_skb(struct mt76_dev *dev, struct sk_buff *skb);
744void mt76_tx_status_check(struct mt76_dev *dev, struct mt76_wcid *wcid,
745 bool flush);
746int mt76_sta_state(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
747 struct ieee80211_sta *sta,
748 enum ieee80211_sta_state old_state,
749 enum ieee80211_sta_state new_state);
750void __mt76_sta_remove(struct mt76_dev *dev, struct ieee80211_vif *vif,
751 struct ieee80211_sta *sta);
752
753struct ieee80211_sta *mt76_rx_convert(struct sk_buff *skb);
754
755int mt76_get_min_avg_rssi(struct mt76_dev *dev);
756
757int mt76_get_txpower(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
758 int *dbm);
759
760void mt76_csa_check(struct mt76_dev *dev);
761void mt76_csa_finish(struct mt76_dev *dev);
762
763int mt76_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta, bool set);
764void mt76_insert_ccmp_hdr(struct sk_buff *skb, u8 key_id);
765int mt76_get_rate(struct mt76_dev *dev,
766 struct ieee80211_supported_band *sband,
767 int idx, bool cck);
768
769
770void mt76_tx_free(struct mt76_dev *dev);
771struct mt76_txwi_cache *mt76_get_txwi(struct mt76_dev *dev);
772void mt76_put_txwi(struct mt76_dev *dev, struct mt76_txwi_cache *t);
773void mt76_rx_complete(struct mt76_dev *dev, struct sk_buff_head *frames,
774 struct napi_struct *napi);
775void mt76_rx_poll_complete(struct mt76_dev *dev, enum mt76_rxq_id q,
776 struct napi_struct *napi);
777void mt76_rx_aggr_reorder(struct sk_buff *skb, struct sk_buff_head *frames);
778
779
780static inline bool mt76u_urb_error(struct urb *urb)
781{
782 return urb->status &&
783 urb->status != -ECONNRESET &&
784 urb->status != -ESHUTDOWN &&
785 urb->status != -ENOENT;
786}
787
788
789static inline u8 q2ep(u8 qid)
790{
791
792 return qid + 1;
793}
794
795static inline int
796mt76u_bulk_msg(struct mt76_dev *dev, void *data, int len, int *actual_len,
797 int timeout)
798{
799 struct usb_device *udev = to_usb_device(dev->dev);
800 struct mt76_usb *usb = &dev->usb;
801 unsigned int pipe;
802
803 if (actual_len)
804 pipe = usb_rcvbulkpipe(udev, usb->in_ep[MT_EP_IN_CMD_RESP]);
805 else
806 pipe = usb_sndbulkpipe(udev, usb->out_ep[MT_EP_OUT_INBAND_CMD]);
807
808 return usb_bulk_msg(udev, pipe, data, len, actual_len, timeout);
809}
810
811int mt76u_vendor_request(struct mt76_dev *dev, u8 req,
812 u8 req_type, u16 val, u16 offset,
813 void *buf, size_t len);
814void mt76u_single_wr(struct mt76_dev *dev, const u8 req,
815 const u16 offset, const u32 val);
816int mt76u_init(struct mt76_dev *dev, struct usb_interface *intf);
817int mt76u_alloc_queues(struct mt76_dev *dev);
818void mt76u_stop_tx(struct mt76_dev *dev);
819void mt76u_stop_rx(struct mt76_dev *dev);
820int mt76u_resume_rx(struct mt76_dev *dev);
821void mt76u_queues_deinit(struct mt76_dev *dev);
822
823struct sk_buff *
824mt76_mcu_msg_alloc(const void *data, int head_len,
825 int data_len, int tail_len);
826void mt76_mcu_rx_event(struct mt76_dev *dev, struct sk_buff *skb);
827struct sk_buff *mt76_mcu_get_response(struct mt76_dev *dev,
828 unsigned long expires);
829
830void mt76_set_irq_mask(struct mt76_dev *dev, u32 addr, u32 clear, u32 set);
831
832#endif
833