1
2
3
4#include "../wifi.h"
5#include "../pci.h"
6#include "../base.h"
7#include "../stats.h"
8#include "reg.h"
9#include "def.h"
10#include "phy.h"
11#include "trx.h"
12#include "led.h"
13#include "dm.h"
14#include "fw.h"
15
16static u8 _rtl8723be_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 hw_queue)
17{
18 __le16 fc = rtl_get_fc(skb);
19
20 if (unlikely(ieee80211_is_beacon(fc)))
21 return QSLT_BEACON;
22 if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
23 return QSLT_MGNT;
24
25 return skb->priority;
26}
27
28static void _rtl8723be_query_rxphystatus(struct ieee80211_hw *hw,
29 struct rtl_stats *pstatus, u8 *pdesc,
30 struct rx_fwinfo_8723be *p_drvinfo,
31 bool bpacket_match_bssid,
32 bool bpacket_toself,
33 bool packet_beacon)
34{
35 struct rtl_priv *rtlpriv = rtl_priv(hw);
36 struct phy_status_rpt *p_phystrpt = (struct phy_status_rpt *)p_drvinfo;
37 s8 rx_pwr_all = 0, rx_pwr[4];
38 u8 rf_rx_num = 0, evm, pwdb_all, pwdb_all_bt = 0;
39 u8 i, max_spatial_stream;
40 u32 rssi, total_rssi = 0;
41 bool is_cck = pstatus->is_cck;
42 u8 lan_idx, vga_idx;
43
44
45 pstatus->packet_matchbssid = bpacket_match_bssid;
46 pstatus->packet_toself = bpacket_toself;
47 pstatus->packet_beacon = packet_beacon;
48 pstatus->rx_mimo_signalquality[0] = -1;
49 pstatus->rx_mimo_signalquality[1] = -1;
50
51 if (is_cck) {
52 u8 cck_highpwr;
53 u8 cck_agc_rpt;
54
55 cck_agc_rpt = p_phystrpt->cck_agc_rpt_ofdm_cfosho_a;
56
57
58
59
60
61 cck_highpwr = (u8)rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2,
62 BIT(9));
63
64 lan_idx = ((cck_agc_rpt & 0xE0) >> 5);
65 vga_idx = (cck_agc_rpt & 0x1f);
66
67 switch (lan_idx) {
68
69
70 case 6:
71 rx_pwr_all = -34 - (2 * vga_idx);
72 break;
73 case 4:
74 rx_pwr_all = -14 - (2 * vga_idx);
75 break;
76 case 1:
77 rx_pwr_all = 6 - (2 * vga_idx);
78 break;
79 case 0:
80 rx_pwr_all = 16 - (2 * vga_idx);
81 break;
82 default:
83 break;
84 }
85
86 pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
87 if (pwdb_all > 100)
88 pwdb_all = 100;
89
90 pstatus->rx_pwdb_all = pwdb_all;
91 pstatus->bt_rx_rssi_percentage = pwdb_all;
92 pstatus->recvsignalpower = rx_pwr_all;
93
94
95 if (bpacket_match_bssid) {
96 u8 sq, sq_rpt;
97 if (pstatus->rx_pwdb_all > 40) {
98 sq = 100;
99 } else {
100 sq_rpt = p_phystrpt->cck_sig_qual_ofdm_pwdb_all;
101 if (sq_rpt > 64)
102 sq = 0;
103 else if (sq_rpt < 20)
104 sq = 100;
105 else
106 sq = ((64 - sq_rpt) * 100) / 44;
107 }
108 pstatus->signalquality = sq;
109 pstatus->rx_mimo_signalquality[0] = sq;
110 pstatus->rx_mimo_signalquality[1] = -1;
111 }
112 } else {
113
114 for (i = RF90_PATH_A; i < RF6052_MAX_PATH; i++) {
115
116 if (rtlpriv->dm.rfpath_rxenable[i])
117 rf_rx_num++;
118
119 rx_pwr[i] = ((p_phystrpt->path_agc[i].gain & 0x3f) * 2)
120 - 110;
121
122 pstatus->rx_pwr[i] = rx_pwr[i];
123
124 rssi = rtl_query_rxpwrpercentage(rx_pwr[i]);
125 total_rssi += rssi;
126
127 pstatus->rx_mimo_signalstrength[i] = (u8)rssi;
128 }
129
130
131
132
133 rx_pwr_all = ((p_phystrpt->cck_sig_qual_ofdm_pwdb_all >> 1) &
134 0x7f) - 110;
135
136 pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
137 pwdb_all_bt = pwdb_all;
138 pstatus->rx_pwdb_all = pwdb_all;
139 pstatus->bt_rx_rssi_percentage = pwdb_all_bt;
140 pstatus->rxpower = rx_pwr_all;
141 pstatus->recvsignalpower = rx_pwr_all;
142
143
144 if (pstatus->rate >= DESC92C_RATEMCS8 &&
145 pstatus->rate <= DESC92C_RATEMCS15)
146 max_spatial_stream = 2;
147 else
148 max_spatial_stream = 1;
149
150 for (i = 0; i < max_spatial_stream; i++) {
151 evm = rtl_evm_db_to_percentage(
152 p_phystrpt->stream_rxevm[i]);
153
154 if (bpacket_match_bssid) {
155
156
157
158 if (i == 0)
159 pstatus->signalquality =
160 (u8)(evm & 0xff);
161 pstatus->rx_mimo_signalquality[i] =
162 (u8)(evm & 0xff);
163 }
164 }
165
166 if (bpacket_match_bssid) {
167 for (i = RF90_PATH_A; i <= RF90_PATH_B; i++)
168 rtl_priv(hw)->dm.cfo_tail[i] =
169 (int)p_phystrpt->path_cfotail[i];
170
171 if (rtl_priv(hw)->dm.packet_count == 0xffffffff)
172 rtl_priv(hw)->dm.packet_count = 0;
173 else
174 rtl_priv(hw)->dm.packet_count++;
175 }
176 }
177
178
179
180
181 if (is_cck)
182 pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
183 pwdb_all));
184 else if (rf_rx_num != 0)
185 pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
186 total_rssi /= rf_rx_num));
187}
188
189static void _rtl8723be_translate_rx_signal_stuff(struct ieee80211_hw *hw,
190 struct sk_buff *skb,
191 struct rtl_stats *pstatus,
192 u8 *pdesc,
193 struct rx_fwinfo_8723be *p_drvinfo)
194{
195 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
196 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
197 struct ieee80211_hdr *hdr;
198 u8 *tmp_buf;
199 u8 *praddr;
200 u8 *psaddr;
201 u16 fc, type;
202 bool packet_matchbssid, packet_toself, packet_beacon;
203
204 tmp_buf = skb->data + pstatus->rx_drvinfo_size + pstatus->rx_bufshift;
205
206 hdr = (struct ieee80211_hdr *)tmp_buf;
207 fc = le16_to_cpu(hdr->frame_control);
208 type = WLAN_FC_GET_TYPE(hdr->frame_control);
209 praddr = hdr->addr1;
210 psaddr = ieee80211_get_SA(hdr);
211 memcpy(pstatus->psaddr, psaddr, ETH_ALEN);
212
213 packet_matchbssid = ((IEEE80211_FTYPE_CTL != type) &&
214 (ether_addr_equal(mac->bssid, (fc & IEEE80211_FCTL_TODS) ?
215 hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS) ?
216 hdr->addr2 : hdr->addr3)) &&
217 (!pstatus->hwerror) &&
218 (!pstatus->crc) && (!pstatus->icv));
219
220 packet_toself = packet_matchbssid &&
221 (ether_addr_equal(praddr, rtlefuse->dev_addr));
222
223
224
225
226
227
228 if (ieee80211_is_beacon(hdr->frame_control))
229 packet_beacon = true;
230 else
231 packet_beacon = false;
232
233 if (packet_beacon && packet_matchbssid)
234 rtl_priv(hw)->dm.dbginfo.num_qry_beacon_pkt++;
235
236 _rtl8723be_query_rxphystatus(hw, pstatus, pdesc, p_drvinfo,
237 packet_matchbssid,
238 packet_toself,
239 packet_beacon);
240
241 rtl_process_phyinfo(hw, tmp_buf, pstatus);
242}
243
244static void _rtl8723be_insert_emcontent(struct rtl_tcb_desc *ptcb_desc,
245 u8 *virtualaddress)
246{
247 u32 dwtmp = 0;
248 memset(virtualaddress, 0, 8);
249
250 SET_EARLYMODE_PKTNUM(virtualaddress, ptcb_desc->empkt_num);
251 if (ptcb_desc->empkt_num == 1) {
252 dwtmp = ptcb_desc->empkt_len[0];
253 } else {
254 dwtmp = ptcb_desc->empkt_len[0];
255 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
256 dwtmp += ptcb_desc->empkt_len[1];
257 }
258 SET_EARLYMODE_LEN0(virtualaddress, dwtmp);
259
260 if (ptcb_desc->empkt_num <= 3) {
261 dwtmp = ptcb_desc->empkt_len[2];
262 } else {
263 dwtmp = ptcb_desc->empkt_len[2];
264 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
265 dwtmp += ptcb_desc->empkt_len[3];
266 }
267 SET_EARLYMODE_LEN1(virtualaddress, dwtmp);
268 if (ptcb_desc->empkt_num <= 5) {
269 dwtmp = ptcb_desc->empkt_len[4];
270 } else {
271 dwtmp = ptcb_desc->empkt_len[4];
272 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
273 dwtmp += ptcb_desc->empkt_len[5];
274 }
275 SET_EARLYMODE_LEN2_1(virtualaddress, dwtmp & 0xF);
276 SET_EARLYMODE_LEN2_2(virtualaddress, dwtmp >> 4);
277 if (ptcb_desc->empkt_num <= 7) {
278 dwtmp = ptcb_desc->empkt_len[6];
279 } else {
280 dwtmp = ptcb_desc->empkt_len[6];
281 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
282 dwtmp += ptcb_desc->empkt_len[7];
283 }
284 SET_EARLYMODE_LEN3(virtualaddress, dwtmp);
285 if (ptcb_desc->empkt_num <= 9) {
286 dwtmp = ptcb_desc->empkt_len[8];
287 } else {
288 dwtmp = ptcb_desc->empkt_len[8];
289 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
290 dwtmp += ptcb_desc->empkt_len[9];
291 }
292 SET_EARLYMODE_LEN4(virtualaddress, dwtmp);
293}
294
295bool rtl8723be_rx_query_desc(struct ieee80211_hw *hw,
296 struct rtl_stats *status,
297 struct ieee80211_rx_status *rx_status,
298 u8 *pdesc, struct sk_buff *skb)
299{
300 struct rtl_priv *rtlpriv = rtl_priv(hw);
301 struct rx_fwinfo_8723be *p_drvinfo;
302 struct ieee80211_hdr *hdr;
303 u8 wake_match;
304 u32 phystatus = GET_RX_DESC_PHYST(pdesc);
305
306 status->length = (u16)GET_RX_DESC_PKT_LEN(pdesc);
307 status->rx_drvinfo_size = (u8)GET_RX_DESC_DRV_INFO_SIZE(pdesc) *
308 RX_DRV_INFO_SIZE_UNIT;
309 status->rx_bufshift = (u8)(GET_RX_DESC_SHIFT(pdesc) & 0x03);
310 status->icv = (u16) GET_RX_DESC_ICV(pdesc);
311 status->crc = (u16) GET_RX_DESC_CRC32(pdesc);
312 status->hwerror = (status->crc | status->icv);
313 status->decrypted = !GET_RX_DESC_SWDEC(pdesc);
314 status->rate = (u8)GET_RX_DESC_RXMCS(pdesc);
315 status->shortpreamble = (u16)GET_RX_DESC_SPLCP(pdesc);
316 status->isampdu = (bool)(GET_RX_DESC_PAGGR(pdesc) == 1);
317 status->isfirst_ampdu = (bool)(GET_RX_DESC_PAGGR(pdesc) == 1);
318 status->timestamp_low = GET_RX_DESC_TSFL(pdesc);
319 status->rx_is40mhzpacket = (bool)GET_RX_DESC_BW(pdesc);
320 status->bandwidth = (u8)GET_RX_DESC_BW(pdesc);
321 status->macid = GET_RX_DESC_MACID(pdesc);
322 status->is_ht = (bool)GET_RX_DESC_RXHT(pdesc);
323
324 status->is_cck = RX_HAL_IS_CCK_RATE(status->rate);
325
326 if (GET_RX_STATUS_DESC_RPT_SEL(pdesc))
327 status->packet_report_type = C2H_PACKET;
328 else
329 status->packet_report_type = NORMAL_RX;
330
331
332 if (GET_RX_STATUS_DESC_PATTERN_MATCH(pdesc))
333 wake_match = BIT(2);
334 else if (GET_RX_STATUS_DESC_MAGIC_MATCH(pdesc))
335 wake_match = BIT(1);
336 else if (GET_RX_STATUS_DESC_UNICAST_MATCH(pdesc))
337 wake_match = BIT(0);
338 else
339 wake_match = 0;
340 if (wake_match)
341 RT_TRACE(rtlpriv, COMP_RXDESC, DBG_LOUD,
342 "GGGGGGGGGGGGGet Wakeup Packet!! WakeMatch=%d\n",
343 wake_match);
344 rx_status->freq = hw->conf.chandef.chan->center_freq;
345 rx_status->band = hw->conf.chandef.chan->band;
346
347 hdr = (struct ieee80211_hdr *)(skb->data + status->rx_drvinfo_size +
348 status->rx_bufshift);
349
350 if (status->crc)
351 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
352
353 if (status->rx_is40mhzpacket)
354 rx_status->bw = RATE_INFO_BW_40;
355
356 if (status->is_ht)
357 rx_status->encoding = RX_ENC_HT;
358
359 rx_status->flag |= RX_FLAG_MACTIME_START;
360
361
362
363
364
365
366
367
368
369 if (status->decrypted) {
370 if ((!_ieee80211_is_robust_mgmt_frame(hdr)) &&
371 (ieee80211_has_protected(hdr->frame_control)))
372 rx_status->flag |= RX_FLAG_DECRYPTED;
373 else
374 rx_status->flag &= ~RX_FLAG_DECRYPTED;
375 }
376
377
378
379
380
381 rx_status->rate_idx = rtlwifi_rate_mapping(hw, status->is_ht,
382 false, status->rate);
383
384 rx_status->mactime = status->timestamp_low;
385 if (phystatus) {
386 p_drvinfo = (struct rx_fwinfo_8723be *)(skb->data +
387 status->rx_bufshift);
388
389 _rtl8723be_translate_rx_signal_stuff(hw, skb, status,
390 pdesc, p_drvinfo);
391 }
392 rx_status->signal = status->recvsignalpower + 10;
393 if (status->packet_report_type == TX_REPORT2) {
394 status->macid_valid_entry[0] =
395 GET_RX_RPT2_DESC_MACID_VALID_1(pdesc);
396 status->macid_valid_entry[1] =
397 GET_RX_RPT2_DESC_MACID_VALID_2(pdesc);
398 }
399 return true;
400}
401
402void rtl8723be_tx_fill_desc(struct ieee80211_hw *hw,
403 struct ieee80211_hdr *hdr, u8 *pdesc_tx,
404 u8 *txbd, struct ieee80211_tx_info *info,
405 struct ieee80211_sta *sta, struct sk_buff *skb,
406 u8 hw_queue, struct rtl_tcb_desc *ptcb_desc)
407{
408 struct rtl_priv *rtlpriv = rtl_priv(hw);
409 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
410 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
411 struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
412 struct rtlwifi_tx_info *tx_info = rtl_tx_skb_cb_info(skb);
413 u8 *pdesc = (u8 *)pdesc_tx;
414 u16 seq_number;
415 __le16 fc = hdr->frame_control;
416 unsigned int buf_len = 0;
417 unsigned int skb_len = skb->len;
418 u8 fw_qsel = _rtl8723be_map_hwqueue_to_fwqueue(skb, hw_queue);
419 bool firstseg = ((hdr->seq_ctrl &
420 cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0);
421 bool lastseg = ((hdr->frame_control &
422 cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0);
423 dma_addr_t mapping;
424 u8 bw_40 = 0;
425 u8 short_gi = 0;
426
427 if (mac->opmode == NL80211_IFTYPE_STATION) {
428 bw_40 = mac->bw_40;
429 } else if (mac->opmode == NL80211_IFTYPE_AP ||
430 mac->opmode == NL80211_IFTYPE_ADHOC) {
431 if (sta)
432 bw_40 = sta->ht_cap.cap &
433 IEEE80211_HT_CAP_SUP_WIDTH_20_40;
434 }
435 seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
436 rtl_get_tcb_desc(hw, info, sta, skb, ptcb_desc);
437
438 if (rtlhal->earlymode_enable) {
439 skb_push(skb, EM_HDR_LEN);
440 memset(skb->data, 0, EM_HDR_LEN);
441 }
442 buf_len = skb->len;
443 mapping = pci_map_single(rtlpci->pdev, skb->data, skb->len,
444 PCI_DMA_TODEVICE);
445 if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
446 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, "DMA mapping error\n");
447 return;
448 }
449 CLEAR_PCI_TX_DESC_CONTENT(pdesc, sizeof(struct tx_desc_8723be));
450 if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) {
451 firstseg = true;
452 lastseg = true;
453 }
454 if (firstseg) {
455 if (rtlhal->earlymode_enable) {
456 SET_TX_DESC_PKT_OFFSET(pdesc, 1);
457 SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN +
458 EM_HDR_LEN);
459 if (ptcb_desc->empkt_num) {
460 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
461 "Insert 8 byte.pTcb->EMPktNum:%d\n",
462 ptcb_desc->empkt_num);
463 _rtl8723be_insert_emcontent(ptcb_desc,
464 (u8 *)(skb->data));
465 }
466 } else {
467 SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
468 }
469
470
471
472 SET_TX_DESC_TX_RATE(pdesc, ptcb_desc->hw_rate);
473 if (ptcb_desc->hw_rate > DESC92C_RATEMCS0)
474 short_gi = (ptcb_desc->use_shortgi) ? 1 : 0;
475 else
476 short_gi = (ptcb_desc->use_shortpreamble) ? 1 : 0;
477
478 SET_TX_DESC_DATA_SHORTGI(pdesc, short_gi);
479
480 if (info->flags & IEEE80211_TX_CTL_AMPDU) {
481 SET_TX_DESC_AGG_ENABLE(pdesc, 1);
482 SET_TX_DESC_MAX_AGG_NUM(pdesc, 0x14);
483 }
484 SET_TX_DESC_SEQ(pdesc, seq_number);
485 SET_TX_DESC_RTS_ENABLE(pdesc, ((ptcb_desc->rts_enable &&
486 !ptcb_desc->cts_enable) ?
487 1 : 0));
488 SET_TX_DESC_HW_RTS_ENABLE(pdesc, 0);
489 SET_TX_DESC_CTS2SELF(pdesc, ((ptcb_desc->cts_enable) ?
490 1 : 0));
491
492 SET_TX_DESC_RTS_RATE(pdesc, ptcb_desc->rts_rate);
493
494 SET_TX_DESC_RTS_SC(pdesc, ptcb_desc->rts_sc);
495 SET_TX_DESC_RTS_SHORT(pdesc,
496 ((ptcb_desc->rts_rate <= DESC92C_RATE54M) ?
497 (ptcb_desc->rts_use_shortpreamble ? 1 : 0) :
498 (ptcb_desc->rts_use_shortgi ? 1 : 0)));
499
500 if (ptcb_desc->tx_enable_sw_calc_duration)
501 SET_TX_DESC_NAV_USE_HDR(pdesc, 1);
502
503 if (bw_40) {
504 if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) {
505 SET_TX_DESC_DATA_BW(pdesc, 1);
506 SET_TX_DESC_TX_SUB_CARRIER(pdesc, 3);
507 } else {
508 SET_TX_DESC_DATA_BW(pdesc, 0);
509 SET_TX_DESC_TX_SUB_CARRIER(pdesc, mac->cur_40_prime_sc);
510 }
511 } else {
512 SET_TX_DESC_DATA_BW(pdesc, 0);
513 SET_TX_DESC_TX_SUB_CARRIER(pdesc, 0);
514 }
515
516 SET_TX_DESC_LINIP(pdesc, 0);
517 SET_TX_DESC_PKT_SIZE(pdesc, (u16) skb_len);
518 if (sta) {
519 u8 ampdu_density = sta->ht_cap.ampdu_density;
520 SET_TX_DESC_AMPDU_DENSITY(pdesc, ampdu_density);
521 }
522 if (info->control.hw_key) {
523 struct ieee80211_key_conf *keyconf =
524 info->control.hw_key;
525 switch (keyconf->cipher) {
526 case WLAN_CIPHER_SUITE_WEP40:
527 case WLAN_CIPHER_SUITE_WEP104:
528 case WLAN_CIPHER_SUITE_TKIP:
529 SET_TX_DESC_SEC_TYPE(pdesc, 0x1);
530 break;
531 case WLAN_CIPHER_SUITE_CCMP:
532 SET_TX_DESC_SEC_TYPE(pdesc, 0x3);
533 break;
534 default:
535 SET_TX_DESC_SEC_TYPE(pdesc, 0x0);
536 break;
537 }
538 }
539
540 SET_TX_DESC_QUEUE_SEL(pdesc, fw_qsel);
541 SET_TX_DESC_DATA_RATE_FB_LIMIT(pdesc, 0x1F);
542 SET_TX_DESC_RTS_RATE_FB_LIMIT(pdesc, 0xF);
543 SET_TX_DESC_DISABLE_FB(pdesc, ptcb_desc->disable_ratefallback ?
544 1 : 0);
545 SET_TX_DESC_USE_RATE(pdesc, ptcb_desc->use_driver_rate ? 1 : 0);
546
547
548
549
550 if (ieee80211_is_data_qos(fc)) {
551 if (mac->rdg_en) {
552 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
553 "Enable RDG function.\n");
554 SET_TX_DESC_RDG_ENABLE(pdesc, 1);
555 SET_TX_DESC_HTC(pdesc, 1);
556 }
557 }
558
559 rtl_set_tx_report(ptcb_desc, pdesc, hw, tx_info);
560 }
561
562 SET_TX_DESC_FIRST_SEG(pdesc, (firstseg ? 1 : 0));
563 SET_TX_DESC_LAST_SEG(pdesc, (lastseg ? 1 : 0));
564 SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16) buf_len);
565 SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
566
567 if (1) {
568 SET_TX_DESC_RATE_ID(pdesc, ptcb_desc->ratr_index);
569 SET_TX_DESC_MACID(pdesc, ptcb_desc->mac_id);
570 } else {
571 SET_TX_DESC_RATE_ID(pdesc, 0xC + ptcb_desc->ratr_index);
572 SET_TX_DESC_MACID(pdesc, ptcb_desc->mac_id);
573 }
574 if (!ieee80211_is_data_qos(fc)) {
575 SET_TX_DESC_HWSEQ_EN(pdesc, 1);
576 SET_TX_DESC_HWSEQ_SEL(pdesc, 0);
577 }
578 SET_TX_DESC_MORE_FRAG(pdesc, (lastseg ? 0 : 1));
579 if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) ||
580 is_broadcast_ether_addr(ieee80211_get_DA(hdr))) {
581 SET_TX_DESC_BMC(pdesc, 1);
582 }
583
584 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, "\n");
585}
586
587void rtl8723be_tx_fill_cmddesc(struct ieee80211_hw *hw, u8 *pdesc,
588 bool firstseg, bool lastseg,
589 struct sk_buff *skb)
590{
591 struct rtl_priv *rtlpriv = rtl_priv(hw);
592 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
593 u8 fw_queue = QSLT_BEACON;
594
595 dma_addr_t mapping = pci_map_single(rtlpci->pdev,
596 skb->data, skb->len,
597 PCI_DMA_TODEVICE);
598
599 if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
600 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
601 "DMA mapping error\n");
602 return;
603 }
604 CLEAR_PCI_TX_DESC_CONTENT(pdesc, TX_DESC_SIZE);
605
606 SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
607
608 SET_TX_DESC_TX_RATE(pdesc, DESC92C_RATE1M);
609
610 SET_TX_DESC_SEQ(pdesc, 0);
611
612 SET_TX_DESC_LINIP(pdesc, 0);
613
614 SET_TX_DESC_QUEUE_SEL(pdesc, fw_queue);
615
616 SET_TX_DESC_FIRST_SEG(pdesc, 1);
617 SET_TX_DESC_LAST_SEG(pdesc, 1);
618
619 SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16)(skb->len));
620
621 SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
622
623 SET_TX_DESC_RATE_ID(pdesc, 0);
624 SET_TX_DESC_MACID(pdesc, 0);
625
626 SET_TX_DESC_OWN(pdesc, 1);
627
628 SET_TX_DESC_PKT_SIZE((u8 *)pdesc, (u16)(skb->len));
629
630 SET_TX_DESC_FIRST_SEG(pdesc, 1);
631 SET_TX_DESC_LAST_SEG(pdesc, 1);
632
633 SET_TX_DESC_USE_RATE(pdesc, 1);
634
635 RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
636 "H2C Tx Cmd Content\n", pdesc, TX_DESC_SIZE);
637}
638
639void rtl8723be_set_desc(struct ieee80211_hw *hw, u8 *pdesc,
640 bool istx, u8 desc_name, u8 *val)
641{
642 if (istx) {
643 switch (desc_name) {
644 case HW_DESC_OWN:
645 SET_TX_DESC_OWN(pdesc, 1);
646 break;
647 case HW_DESC_TX_NEXTDESC_ADDR:
648 SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *)val);
649 break;
650 default:
651 WARN_ONCE(true, "rtl8723be: ERR txdesc :%d not processed\n",
652 desc_name);
653 break;
654 }
655 } else {
656 switch (desc_name) {
657 case HW_DESC_RXOWN:
658 SET_RX_DESC_OWN(pdesc, 1);
659 break;
660 case HW_DESC_RXBUFF_ADDR:
661 SET_RX_DESC_BUFF_ADDR(pdesc, *(u32 *)val);
662 break;
663 case HW_DESC_RXPKT_LEN:
664 SET_RX_DESC_PKT_LEN(pdesc, *(u32 *)val);
665 break;
666 case HW_DESC_RXERO:
667 SET_RX_DESC_EOR(pdesc, 1);
668 break;
669 default:
670 WARN_ONCE(true, "rtl8723be: ERR rxdesc :%d not process\n",
671 desc_name);
672 break;
673 }
674 }
675}
676
677u64 rtl8723be_get_desc(struct ieee80211_hw *hw,
678 u8 *pdesc, bool istx, u8 desc_name)
679{
680 u32 ret = 0;
681
682 if (istx) {
683 switch (desc_name) {
684 case HW_DESC_OWN:
685 ret = GET_TX_DESC_OWN(pdesc);
686 break;
687 case HW_DESC_TXBUFF_ADDR:
688 ret = GET_TX_DESC_TX_BUFFER_ADDRESS(pdesc);
689 break;
690 default:
691 WARN_ONCE(true, "rtl8723be: ERR txdesc :%d not process\n",
692 desc_name);
693 break;
694 }
695 } else {
696 switch (desc_name) {
697 case HW_DESC_OWN:
698 ret = GET_RX_DESC_OWN(pdesc);
699 break;
700 case HW_DESC_RXPKT_LEN:
701 ret = GET_RX_DESC_PKT_LEN(pdesc);
702 break;
703 case HW_DESC_RXBUFF_ADDR:
704 ret = GET_RX_DESC_BUFF_ADDR(pdesc);
705 break;
706 default:
707 WARN_ONCE(true, "rtl8723be: ERR rxdesc :%d not processed\n",
708 desc_name);
709 break;
710 }
711 }
712 return ret;
713}
714
715bool rtl8723be_is_tx_desc_closed(struct ieee80211_hw *hw,
716 u8 hw_queue, u16 index)
717{
718 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
719 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
720 u8 *entry = (u8 *)(&ring->desc[ring->idx]);
721 u8 own = (u8)rtl8723be_get_desc(hw, entry, true, HW_DESC_OWN);
722
723
724
725
726
727 if (own)
728 return false;
729 return true;
730}
731
732void rtl8723be_tx_polling(struct ieee80211_hw *hw, u8 hw_queue)
733{
734 struct rtl_priv *rtlpriv = rtl_priv(hw);
735 if (hw_queue == BEACON_QUEUE) {
736 rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG, BIT(4));
737 } else {
738 rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG,
739 BIT(0) << (hw_queue));
740 }
741}
742
