1
2
3
4
5#include "main.h"
6#include "regd.h"
7#include "fw.h"
8#include "ps.h"
9#include "sec.h"
10#include "mac.h"
11#include "phy.h"
12#include "reg.h"
13#include "efuse.h"
14#include "debug.h"
15
16static bool rtw_fw_support_lps;
17unsigned int rtw_debug_mask;
18EXPORT_SYMBOL(rtw_debug_mask);
19
20module_param_named(support_lps, rtw_fw_support_lps, bool, 0644);
21module_param_named(debug_mask, rtw_debug_mask, uint, 0644);
22
23MODULE_PARM_DESC(support_lps, "Set Y to enable Leisure Power Save support, to turn radio off between beacons");
24MODULE_PARM_DESC(debug_mask, "Debugging mask");
25
26static struct ieee80211_channel rtw_channeltable_2g[] = {
27 {.center_freq = 2412, .hw_value = 1,},
28 {.center_freq = 2417, .hw_value = 2,},
29 {.center_freq = 2422, .hw_value = 3,},
30 {.center_freq = 2427, .hw_value = 4,},
31 {.center_freq = 2432, .hw_value = 5,},
32 {.center_freq = 2437, .hw_value = 6,},
33 {.center_freq = 2442, .hw_value = 7,},
34 {.center_freq = 2447, .hw_value = 8,},
35 {.center_freq = 2452, .hw_value = 9,},
36 {.center_freq = 2457, .hw_value = 10,},
37 {.center_freq = 2462, .hw_value = 11,},
38 {.center_freq = 2467, .hw_value = 12,},
39 {.center_freq = 2472, .hw_value = 13,},
40 {.center_freq = 2484, .hw_value = 14,},
41};
42
43static struct ieee80211_channel rtw_channeltable_5g[] = {
44 {.center_freq = 5180, .hw_value = 36,},
45 {.center_freq = 5200, .hw_value = 40,},
46 {.center_freq = 5220, .hw_value = 44,},
47 {.center_freq = 5240, .hw_value = 48,},
48 {.center_freq = 5260, .hw_value = 52,},
49 {.center_freq = 5280, .hw_value = 56,},
50 {.center_freq = 5300, .hw_value = 60,},
51 {.center_freq = 5320, .hw_value = 64,},
52 {.center_freq = 5500, .hw_value = 100,},
53 {.center_freq = 5520, .hw_value = 104,},
54 {.center_freq = 5540, .hw_value = 108,},
55 {.center_freq = 5560, .hw_value = 112,},
56 {.center_freq = 5580, .hw_value = 116,},
57 {.center_freq = 5600, .hw_value = 120,},
58 {.center_freq = 5620, .hw_value = 124,},
59 {.center_freq = 5640, .hw_value = 128,},
60 {.center_freq = 5660, .hw_value = 132,},
61 {.center_freq = 5680, .hw_value = 136,},
62 {.center_freq = 5700, .hw_value = 140,},
63 {.center_freq = 5745, .hw_value = 149,},
64 {.center_freq = 5765, .hw_value = 153,},
65 {.center_freq = 5785, .hw_value = 157,},
66 {.center_freq = 5805, .hw_value = 161,},
67 {.center_freq = 5825, .hw_value = 165,
68 .flags = IEEE80211_CHAN_NO_HT40MINUS},
69};
70
71static struct ieee80211_rate rtw_ratetable[] = {
72 {.bitrate = 10, .hw_value = 0x00,},
73 {.bitrate = 20, .hw_value = 0x01,},
74 {.bitrate = 55, .hw_value = 0x02,},
75 {.bitrate = 110, .hw_value = 0x03,},
76 {.bitrate = 60, .hw_value = 0x04,},
77 {.bitrate = 90, .hw_value = 0x05,},
78 {.bitrate = 120, .hw_value = 0x06,},
79 {.bitrate = 180, .hw_value = 0x07,},
80 {.bitrate = 240, .hw_value = 0x08,},
81 {.bitrate = 360, .hw_value = 0x09,},
82 {.bitrate = 480, .hw_value = 0x0a,},
83 {.bitrate = 540, .hw_value = 0x0b,},
84};
85
86static struct ieee80211_supported_band rtw_band_2ghz = {
87 .band = NL80211_BAND_2GHZ,
88
89 .channels = rtw_channeltable_2g,
90 .n_channels = ARRAY_SIZE(rtw_channeltable_2g),
91
92 .bitrates = rtw_ratetable,
93 .n_bitrates = ARRAY_SIZE(rtw_ratetable),
94
95 .ht_cap = {0},
96 .vht_cap = {0},
97};
98
99static struct ieee80211_supported_band rtw_band_5ghz = {
100 .band = NL80211_BAND_5GHZ,
101
102 .channels = rtw_channeltable_5g,
103 .n_channels = ARRAY_SIZE(rtw_channeltable_5g),
104
105
106 .bitrates = rtw_ratetable + 4,
107 .n_bitrates = ARRAY_SIZE(rtw_ratetable) - 4,
108
109 .ht_cap = {0},
110 .vht_cap = {0},
111};
112
113struct rtw_watch_dog_iter_data {
114 struct rtw_vif *rtwvif;
115 bool active;
116 u8 assoc_cnt;
117};
118
119static void rtw_vif_watch_dog_iter(void *data, u8 *mac,
120 struct ieee80211_vif *vif)
121{
122 struct rtw_watch_dog_iter_data *iter_data = data;
123 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
124
125 if (vif->type == NL80211_IFTYPE_STATION) {
126 if (vif->bss_conf.assoc) {
127 iter_data->assoc_cnt++;
128 iter_data->rtwvif = rtwvif;
129 }
130 if (rtwvif->stats.tx_cnt > RTW_LPS_THRESHOLD ||
131 rtwvif->stats.rx_cnt > RTW_LPS_THRESHOLD)
132 iter_data->active = true;
133 } else {
134
135 iter_data->active = true;
136 }
137
138 rtwvif->stats.tx_unicast = 0;
139 rtwvif->stats.rx_unicast = 0;
140 rtwvif->stats.tx_cnt = 0;
141 rtwvif->stats.rx_cnt = 0;
142}
143
144
145
146
147static void rtw_watch_dog_work(struct work_struct *work)
148{
149 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev,
150 watch_dog_work.work);
151 struct rtw_watch_dog_iter_data data = {};
152
153 if (!rtw_flag_check(rtwdev, RTW_FLAG_RUNNING))
154 return;
155
156 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work,
157 RTW_WATCH_DOG_DELAY_TIME);
158
159
160 rtwdev->stats.tx_unicast = 0;
161 rtwdev->stats.rx_unicast = 0;
162 rtwdev->stats.tx_cnt = 0;
163 rtwdev->stats.rx_cnt = 0;
164
165
166 rtw_iterate_vifs_atomic(rtwdev, rtw_vif_watch_dog_iter, &data);
167
168
169
170
171
172 if (rtw_fw_support_lps &&
173 data.rtwvif && !data.active && data.assoc_cnt == 1)
174 rtw_enter_lps(rtwdev, data.rtwvif);
175
176 if (rtw_flag_check(rtwdev, RTW_FLAG_SCANNING))
177 return;
178
179 rtw_phy_dynamic_mechanism(rtwdev);
180
181 rtwdev->watch_dog_cnt++;
182}
183
184static void rtw_c2h_work(struct work_struct *work)
185{
186 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, c2h_work);
187 struct sk_buff *skb, *tmp;
188
189 skb_queue_walk_safe(&rtwdev->c2h_queue, skb, tmp) {
190 skb_unlink(skb, &rtwdev->c2h_queue);
191 rtw_fw_c2h_cmd_handle(rtwdev, skb);
192 dev_kfree_skb_any(skb);
193 }
194}
195
196void rtw_get_channel_params(struct cfg80211_chan_def *chandef,
197 struct rtw_channel_params *chan_params)
198{
199 struct ieee80211_channel *channel = chandef->chan;
200 enum nl80211_chan_width width = chandef->width;
201 u8 *cch_by_bw = chan_params->cch_by_bw;
202 u32 primary_freq, center_freq;
203 u8 center_chan;
204 u8 bandwidth = RTW_CHANNEL_WIDTH_20;
205 u8 primary_chan_idx = 0;
206 u8 i;
207
208 center_chan = channel->hw_value;
209 primary_freq = channel->center_freq;
210 center_freq = chandef->center_freq1;
211
212
213 cch_by_bw[RTW_CHANNEL_WIDTH_20] = channel->hw_value;
214
215 switch (width) {
216 case NL80211_CHAN_WIDTH_20_NOHT:
217 case NL80211_CHAN_WIDTH_20:
218 bandwidth = RTW_CHANNEL_WIDTH_20;
219 primary_chan_idx = 0;
220 break;
221 case NL80211_CHAN_WIDTH_40:
222 bandwidth = RTW_CHANNEL_WIDTH_40;
223 if (primary_freq > center_freq) {
224 primary_chan_idx = 1;
225 center_chan -= 2;
226 } else {
227 primary_chan_idx = 2;
228 center_chan += 2;
229 }
230 break;
231 case NL80211_CHAN_WIDTH_80:
232 bandwidth = RTW_CHANNEL_WIDTH_80;
233 if (primary_freq > center_freq) {
234 if (primary_freq - center_freq == 10) {
235 primary_chan_idx = 1;
236 center_chan -= 2;
237 } else {
238 primary_chan_idx = 3;
239 center_chan -= 6;
240 }
241
242
243
244 cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_chan + 4;
245 } else {
246 if (center_freq - primary_freq == 10) {
247 primary_chan_idx = 2;
248 center_chan += 2;
249 } else {
250 primary_chan_idx = 4;
251 center_chan += 6;
252 }
253
254
255
256 cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_chan - 4;
257 }
258 break;
259 default:
260 center_chan = 0;
261 break;
262 }
263
264 chan_params->center_chan = center_chan;
265 chan_params->bandwidth = bandwidth;
266 chan_params->primary_chan_idx = primary_chan_idx;
267
268
269 cch_by_bw[bandwidth] = center_chan;
270
271 for (i = bandwidth + 1; i <= RTW_MAX_CHANNEL_WIDTH; i++)
272 cch_by_bw[i] = 0;
273}
274
275void rtw_set_channel(struct rtw_dev *rtwdev)
276{
277 struct ieee80211_hw *hw = rtwdev->hw;
278 struct rtw_hal *hal = &rtwdev->hal;
279 struct rtw_chip_info *chip = rtwdev->chip;
280 struct rtw_channel_params ch_param;
281 u8 center_chan, bandwidth, primary_chan_idx;
282 u8 i;
283
284 rtw_get_channel_params(&hw->conf.chandef, &ch_param);
285 if (WARN(ch_param.center_chan == 0, "Invalid channel\n"))
286 return;
287
288 center_chan = ch_param.center_chan;
289 bandwidth = ch_param.bandwidth;
290 primary_chan_idx = ch_param.primary_chan_idx;
291
292 hal->current_band_width = bandwidth;
293 hal->current_channel = center_chan;
294 hal->current_band_type = center_chan > 14 ? RTW_BAND_5G : RTW_BAND_2G;
295
296 for (i = RTW_CHANNEL_WIDTH_20; i <= RTW_MAX_CHANNEL_WIDTH; i++)
297 hal->cch_by_bw[i] = ch_param.cch_by_bw[i];
298
299 chip->ops->set_channel(rtwdev, center_chan, bandwidth, primary_chan_idx);
300
301 rtw_phy_set_tx_power_level(rtwdev, center_chan);
302}
303
304static void rtw_vif_write_addr(struct rtw_dev *rtwdev, u32 start, u8 *addr)
305{
306 int i;
307
308 for (i = 0; i < ETH_ALEN; i++)
309 rtw_write8(rtwdev, start + i, addr[i]);
310}
311
312void rtw_vif_port_config(struct rtw_dev *rtwdev,
313 struct rtw_vif *rtwvif,
314 u32 config)
315{
316 u32 addr, mask;
317
318 if (config & PORT_SET_MAC_ADDR) {
319 addr = rtwvif->conf->mac_addr.addr;
320 rtw_vif_write_addr(rtwdev, addr, rtwvif->mac_addr);
321 }
322 if (config & PORT_SET_BSSID) {
323 addr = rtwvif->conf->bssid.addr;
324 rtw_vif_write_addr(rtwdev, addr, rtwvif->bssid);
325 }
326 if (config & PORT_SET_NET_TYPE) {
327 addr = rtwvif->conf->net_type.addr;
328 mask = rtwvif->conf->net_type.mask;
329 rtw_write32_mask(rtwdev, addr, mask, rtwvif->net_type);
330 }
331 if (config & PORT_SET_AID) {
332 addr = rtwvif->conf->aid.addr;
333 mask = rtwvif->conf->aid.mask;
334 rtw_write32_mask(rtwdev, addr, mask, rtwvif->aid);
335 }
336 if (config & PORT_SET_BCN_CTRL) {
337 addr = rtwvif->conf->bcn_ctrl.addr;
338 mask = rtwvif->conf->bcn_ctrl.mask;
339 rtw_write8_mask(rtwdev, addr, mask, rtwvif->bcn_ctrl);
340 }
341}
342
343static u8 hw_bw_cap_to_bitamp(u8 bw_cap)
344{
345 u8 bw = 0;
346
347 switch (bw_cap) {
348 case EFUSE_HW_CAP_IGNORE:
349 case EFUSE_HW_CAP_SUPP_BW80:
350 bw |= BIT(RTW_CHANNEL_WIDTH_80);
351
352 case EFUSE_HW_CAP_SUPP_BW40:
353 bw |= BIT(RTW_CHANNEL_WIDTH_40);
354
355 default:
356 bw |= BIT(RTW_CHANNEL_WIDTH_20);
357 break;
358 }
359
360 return bw;
361}
362
363static void rtw_hw_config_rf_ant_num(struct rtw_dev *rtwdev, u8 hw_ant_num)
364{
365 struct rtw_hal *hal = &rtwdev->hal;
366
367 if (hw_ant_num == EFUSE_HW_CAP_IGNORE ||
368 hw_ant_num >= hal->rf_path_num)
369 return;
370
371 switch (hw_ant_num) {
372 case 1:
373 hal->rf_type = RF_1T1R;
374 hal->rf_path_num = 1;
375 hal->antenna_tx = BB_PATH_A;
376 hal->antenna_rx = BB_PATH_A;
377 break;
378 default:
379 WARN(1, "invalid hw configuration from efuse\n");
380 break;
381 }
382}
383
384static u64 get_vht_ra_mask(struct ieee80211_sta *sta)
385{
386 u64 ra_mask = 0;
387 u16 mcs_map = le16_to_cpu(sta->vht_cap.vht_mcs.rx_mcs_map);
388 u8 vht_mcs_cap;
389 int i, nss;
390
391
392 for (i = 0, nss = 12; i < 4; i++, mcs_map >>= 2, nss += 10) {
393 vht_mcs_cap = mcs_map & 0x3;
394 switch (vht_mcs_cap) {
395 case 2:
396 ra_mask |= 0x3ffULL << nss;
397 break;
398 case 1:
399 ra_mask |= 0x1ffULL << nss;
400 break;
401 case 0:
402 ra_mask |= 0x0ffULL << nss;
403 break;
404 default:
405 break;
406 }
407 }
408
409 return ra_mask;
410}
411
412static u8 get_rate_id(u8 wireless_set, enum rtw_bandwidth bw_mode, u8 tx_num)
413{
414 u8 rate_id = 0;
415
416 switch (wireless_set) {
417 case WIRELESS_CCK:
418 rate_id = RTW_RATEID_B_20M;
419 break;
420 case WIRELESS_OFDM:
421 rate_id = RTW_RATEID_G;
422 break;
423 case WIRELESS_CCK | WIRELESS_OFDM:
424 rate_id = RTW_RATEID_BG;
425 break;
426 case WIRELESS_OFDM | WIRELESS_HT:
427 if (tx_num == 1)
428 rate_id = RTW_RATEID_GN_N1SS;
429 else if (tx_num == 2)
430 rate_id = RTW_RATEID_GN_N2SS;
431 else if (tx_num == 3)
432 rate_id = RTW_RATEID_ARFR5_N_3SS;
433 break;
434 case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_HT:
435 if (bw_mode == RTW_CHANNEL_WIDTH_40) {
436 if (tx_num == 1)
437 rate_id = RTW_RATEID_BGN_40M_1SS;
438 else if (tx_num == 2)
439 rate_id = RTW_RATEID_BGN_40M_2SS;
440 else if (tx_num == 3)
441 rate_id = RTW_RATEID_ARFR5_N_3SS;
442 else if (tx_num == 4)
443 rate_id = RTW_RATEID_ARFR7_N_4SS;
444 } else {
445 if (tx_num == 1)
446 rate_id = RTW_RATEID_BGN_20M_1SS;
447 else if (tx_num == 2)
448 rate_id = RTW_RATEID_BGN_20M_2SS;
449 else if (tx_num == 3)
450 rate_id = RTW_RATEID_ARFR5_N_3SS;
451 else if (tx_num == 4)
452 rate_id = RTW_RATEID_ARFR7_N_4SS;
453 }
454 break;
455 case WIRELESS_OFDM | WIRELESS_VHT:
456 if (tx_num == 1)
457 rate_id = RTW_RATEID_ARFR1_AC_1SS;
458 else if (tx_num == 2)
459 rate_id = RTW_RATEID_ARFR0_AC_2SS;
460 else if (tx_num == 3)
461 rate_id = RTW_RATEID_ARFR4_AC_3SS;
462 else if (tx_num == 4)
463 rate_id = RTW_RATEID_ARFR6_AC_4SS;
464 break;
465 case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_VHT:
466 if (bw_mode >= RTW_CHANNEL_WIDTH_80) {
467 if (tx_num == 1)
468 rate_id = RTW_RATEID_ARFR1_AC_1SS;
469 else if (tx_num == 2)
470 rate_id = RTW_RATEID_ARFR0_AC_2SS;
471 else if (tx_num == 3)
472 rate_id = RTW_RATEID_ARFR4_AC_3SS;
473 else if (tx_num == 4)
474 rate_id = RTW_RATEID_ARFR6_AC_4SS;
475 } else {
476 if (tx_num == 1)
477 rate_id = RTW_RATEID_ARFR2_AC_2G_1SS;
478 else if (tx_num == 2)
479 rate_id = RTW_RATEID_ARFR3_AC_2G_2SS;
480 else if (tx_num == 3)
481 rate_id = RTW_RATEID_ARFR4_AC_3SS;
482 else if (tx_num == 4)
483 rate_id = RTW_RATEID_ARFR6_AC_4SS;
484 }
485 break;
486 default:
487 break;
488 }
489
490 return rate_id;
491}
492
493#define RA_MASK_CCK_RATES 0x0000f
494#define RA_MASK_OFDM_RATES 0x00ff0
495#define RA_MASK_HT_RATES_1SS (0xff000ULL << 0)
496#define RA_MASK_HT_RATES_2SS (0xff000ULL << 8)
497#define RA_MASK_HT_RATES_3SS (0xff000ULL << 16)
498#define RA_MASK_HT_RATES (RA_MASK_HT_RATES_1SS | \
499 RA_MASK_HT_RATES_2SS | \
500 RA_MASK_HT_RATES_3SS)
501#define RA_MASK_VHT_RATES_1SS (0x3ff000ULL << 0)
502#define RA_MASK_VHT_RATES_2SS (0x3ff000ULL << 10)
503#define RA_MASK_VHT_RATES_3SS (0x3ff000ULL << 20)
504#define RA_MASK_VHT_RATES (RA_MASK_VHT_RATES_1SS | \
505 RA_MASK_VHT_RATES_2SS | \
506 RA_MASK_VHT_RATES_3SS)
507#define RA_MASK_CCK_IN_HT 0x00005
508#define RA_MASK_CCK_IN_VHT 0x00005
509#define RA_MASK_OFDM_IN_VHT 0x00010
510#define RA_MASK_OFDM_IN_HT_2G 0x00010
511#define RA_MASK_OFDM_IN_HT_5G 0x00030
512
513void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si)
514{
515 struct ieee80211_sta *sta = si->sta;
516 struct rtw_efuse *efuse = &rtwdev->efuse;
517 struct rtw_hal *hal = &rtwdev->hal;
518 u8 rssi_level;
519 u8 wireless_set;
520 u8 bw_mode;
521 u8 rate_id;
522 u8 rf_type = RF_1T1R;
523 u8 stbc_en = 0;
524 u8 ldpc_en = 0;
525 u8 tx_num = 1;
526 u64 ra_mask = 0;
527 bool is_vht_enable = false;
528 bool is_support_sgi = false;
529
530 if (sta->vht_cap.vht_supported) {
531 is_vht_enable = true;
532 ra_mask |= get_vht_ra_mask(sta);
533 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK)
534 stbc_en = VHT_STBC_EN;
535 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC)
536 ldpc_en = VHT_LDPC_EN;
537 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80)
538 is_support_sgi = true;
539 } else if (sta->ht_cap.ht_supported) {
540 ra_mask |= (sta->ht_cap.mcs.rx_mask[NL80211_BAND_5GHZ] << 20) |
541 (sta->ht_cap.mcs.rx_mask[NL80211_BAND_2GHZ] << 12);
542 if (sta->ht_cap.cap & IEEE80211_HT_CAP_RX_STBC)
543 stbc_en = HT_STBC_EN;
544 if (sta->ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING)
545 ldpc_en = HT_LDPC_EN;
546 if (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20 ||
547 sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40)
548 is_support_sgi = true;
549 }
550
551 if (hal->current_band_type == RTW_BAND_5G) {
552 ra_mask |= (u64)sta->supp_rates[NL80211_BAND_5GHZ] << 4;
553 if (sta->vht_cap.vht_supported) {
554 ra_mask &= RA_MASK_VHT_RATES | RA_MASK_OFDM_IN_VHT;
555 wireless_set = WIRELESS_OFDM | WIRELESS_VHT;
556 } else if (sta->ht_cap.ht_supported) {
557 ra_mask &= RA_MASK_HT_RATES | RA_MASK_OFDM_IN_HT_5G;
558 wireless_set = WIRELESS_OFDM | WIRELESS_HT;
559 } else {
560 wireless_set = WIRELESS_OFDM;
561 }
562 } else if (hal->current_band_type == RTW_BAND_2G) {
563 ra_mask |= sta->supp_rates[NL80211_BAND_2GHZ];
564 if (sta->vht_cap.vht_supported) {
565 ra_mask &= RA_MASK_VHT_RATES | RA_MASK_CCK_IN_VHT |
566 RA_MASK_OFDM_IN_VHT;
567 wireless_set = WIRELESS_CCK | WIRELESS_OFDM |
568 WIRELESS_HT | WIRELESS_VHT;
569 } else if (sta->ht_cap.ht_supported) {
570 ra_mask &= RA_MASK_HT_RATES | RA_MASK_CCK_IN_HT |
571 RA_MASK_OFDM_IN_HT_2G;
572 wireless_set = WIRELESS_CCK | WIRELESS_OFDM |
573 WIRELESS_HT;
574 } else if (sta->supp_rates[0] <= 0xf) {
575 wireless_set = WIRELESS_CCK;
576 } else {
577 wireless_set = WIRELESS_CCK | WIRELESS_OFDM;
578 }
579 } else {
580 rtw_err(rtwdev, "Unknown band type\n");
581 wireless_set = 0;
582 }
583
584 if (efuse->hw_cap.nss == 1) {
585 ra_mask &= RA_MASK_VHT_RATES_1SS;
586 ra_mask &= RA_MASK_HT_RATES_1SS;
587 }
588
589 switch (sta->bandwidth) {
590 case IEEE80211_STA_RX_BW_80:
591 bw_mode = RTW_CHANNEL_WIDTH_80;
592 break;
593 case IEEE80211_STA_RX_BW_40:
594 bw_mode = RTW_CHANNEL_WIDTH_40;
595 break;
596 default:
597 bw_mode = RTW_CHANNEL_WIDTH_20;
598 break;
599 }
600
601 if (sta->vht_cap.vht_supported && ra_mask & 0xffc00000) {
602 tx_num = 2;
603 rf_type = RF_2T2R;
604 } else if (sta->ht_cap.ht_supported && ra_mask & 0xfff00000) {
605 tx_num = 2;
606 rf_type = RF_2T2R;
607 }
608
609 rate_id = get_rate_id(wireless_set, bw_mode, tx_num);
610
611 if (wireless_set != WIRELESS_CCK) {
612 rssi_level = si->rssi_level;
613 if (rssi_level == 0)
614 ra_mask &= 0xffffffffffffffffULL;
615 else if (rssi_level == 1)
616 ra_mask &= 0xfffffffffffffff0ULL;
617 else if (rssi_level == 2)
618 ra_mask &= 0xffffffffffffefe0ULL;
619 else if (rssi_level == 3)
620 ra_mask &= 0xffffffffffffcfc0ULL;
621 else if (rssi_level == 4)
622 ra_mask &= 0xffffffffffff8f80ULL;
623 else if (rssi_level >= 5)
624 ra_mask &= 0xffffffffffff0f00ULL;
625 }
626
627 si->bw_mode = bw_mode;
628 si->stbc_en = stbc_en;
629 si->ldpc_en = ldpc_en;
630 si->rf_type = rf_type;
631 si->wireless_set = wireless_set;
632 si->sgi_enable = is_support_sgi;
633 si->vht_enable = is_vht_enable;
634 si->ra_mask = ra_mask;
635 si->rate_id = rate_id;
636
637 rtw_fw_send_ra_info(rtwdev, si);
638}
639
640static int rtw_power_on(struct rtw_dev *rtwdev)
641{
642 struct rtw_chip_info *chip = rtwdev->chip;
643 struct rtw_fw_state *fw = &rtwdev->fw;
644 int ret;
645
646 ret = rtw_hci_setup(rtwdev);
647 if (ret) {
648 rtw_err(rtwdev, "failed to setup hci\n");
649 goto err;
650 }
651
652
653 ret = rtw_mac_power_on(rtwdev);
654 if (ret) {
655 rtw_err(rtwdev, "failed to power on mac\n");
656 goto err;
657 }
658
659 wait_for_completion(&fw->completion);
660 if (!fw->firmware) {
661 ret = -EINVAL;
662 rtw_err(rtwdev, "failed to load firmware\n");
663 goto err;
664 }
665
666 ret = rtw_download_firmware(rtwdev, fw);
667 if (ret) {
668 rtw_err(rtwdev, "failed to download firmware\n");
669 goto err_off;
670 }
671
672
673 ret = rtw_mac_init(rtwdev);
674 if (ret) {
675 rtw_err(rtwdev, "failed to configure mac\n");
676 goto err_off;
677 }
678
679 chip->ops->phy_set_param(rtwdev);
680
681 ret = rtw_hci_start(rtwdev);
682 if (ret) {
683 rtw_err(rtwdev, "failed to start hci\n");
684 goto err_off;
685 }
686
687 return 0;
688
689err_off:
690 rtw_mac_power_off(rtwdev);
691
692err:
693 return ret;
694}
695
696int rtw_core_start(struct rtw_dev *rtwdev)
697{
698 int ret;
699
700 ret = rtw_power_on(rtwdev);
701 if (ret)
702 return ret;
703
704 rtw_sec_enable_sec_engine(rtwdev);
705
706
707 rtw_write32(rtwdev, REG_RCR, rtwdev->hal.rcr);
708
709 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work,
710 RTW_WATCH_DOG_DELAY_TIME);
711
712 rtw_flag_set(rtwdev, RTW_FLAG_RUNNING);
713
714 return 0;
715}
716
717static void rtw_power_off(struct rtw_dev *rtwdev)
718{
719 rtwdev->hci.ops->stop(rtwdev);
720 rtw_mac_power_off(rtwdev);
721}
722
723void rtw_core_stop(struct rtw_dev *rtwdev)
724{
725 rtw_flag_clear(rtwdev, RTW_FLAG_RUNNING);
726 rtw_flag_clear(rtwdev, RTW_FLAG_FW_RUNNING);
727
728 cancel_delayed_work_sync(&rtwdev->watch_dog_work);
729
730 rtw_power_off(rtwdev);
731}
732
733static void rtw_init_ht_cap(struct rtw_dev *rtwdev,
734 struct ieee80211_sta_ht_cap *ht_cap)
735{
736 struct rtw_efuse *efuse = &rtwdev->efuse;
737
738 ht_cap->ht_supported = true;
739 ht_cap->cap = 0;
740 ht_cap->cap |= IEEE80211_HT_CAP_SGI_20 |
741 IEEE80211_HT_CAP_MAX_AMSDU |
742 IEEE80211_HT_CAP_LDPC_CODING |
743 (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
744 if (efuse->hw_cap.bw & BIT(RTW_CHANNEL_WIDTH_40))
745 ht_cap->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
746 IEEE80211_HT_CAP_DSSSCCK40 |
747 IEEE80211_HT_CAP_SGI_40;
748 ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
749 ht_cap->ampdu_density = IEEE80211_HT_MPDU_DENSITY_16;
750 ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
751 if (efuse->hw_cap.nss > 1) {
752 ht_cap->mcs.rx_mask[0] = 0xFF;
753 ht_cap->mcs.rx_mask[1] = 0xFF;
754 ht_cap->mcs.rx_mask[4] = 0x01;
755 ht_cap->mcs.rx_highest = cpu_to_le16(300);
756 } else {
757 ht_cap->mcs.rx_mask[0] = 0xFF;
758 ht_cap->mcs.rx_mask[1] = 0x00;
759 ht_cap->mcs.rx_mask[4] = 0x01;
760 ht_cap->mcs.rx_highest = cpu_to_le16(150);
761 }
762}
763
764static void rtw_init_vht_cap(struct rtw_dev *rtwdev,
765 struct ieee80211_sta_vht_cap *vht_cap)
766{
767 struct rtw_efuse *efuse = &rtwdev->efuse;
768 u16 mcs_map;
769 __le16 highest;
770
771 if (efuse->hw_cap.ptcl != EFUSE_HW_CAP_IGNORE &&
772 efuse->hw_cap.ptcl != EFUSE_HW_CAP_PTCL_VHT)
773 return;
774
775 vht_cap->vht_supported = true;
776 vht_cap->cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 |
777 IEEE80211_VHT_CAP_RXLDPC |
778 IEEE80211_VHT_CAP_SHORT_GI_80 |
779 IEEE80211_VHT_CAP_TXSTBC |
780 IEEE80211_VHT_CAP_RXSTBC_1 |
781 IEEE80211_VHT_CAP_HTC_VHT |
782 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK |
783 0;
784 mcs_map = IEEE80211_VHT_MCS_SUPPORT_0_9 << 0 |
785 IEEE80211_VHT_MCS_NOT_SUPPORTED << 4 |
786 IEEE80211_VHT_MCS_NOT_SUPPORTED << 6 |
787 IEEE80211_VHT_MCS_NOT_SUPPORTED << 8 |
788 IEEE80211_VHT_MCS_NOT_SUPPORTED << 10 |
789 IEEE80211_VHT_MCS_NOT_SUPPORTED << 12 |
790 IEEE80211_VHT_MCS_NOT_SUPPORTED << 14;
791 if (efuse->hw_cap.nss > 1) {
792 highest = cpu_to_le16(780);
793 mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << 2;
794 } else {
795 highest = cpu_to_le16(390);
796 mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << 2;
797 }
798
799 vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(mcs_map);
800 vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(mcs_map);
801 vht_cap->vht_mcs.rx_highest = highest;
802 vht_cap->vht_mcs.tx_highest = highest;
803}
804
805static void rtw_set_supported_band(struct ieee80211_hw *hw,
806 struct rtw_chip_info *chip)
807{
808 struct rtw_dev *rtwdev = hw->priv;
809 struct ieee80211_supported_band *sband;
810
811 if (chip->band & RTW_BAND_2G) {
812 sband = kmemdup(&rtw_band_2ghz, sizeof(*sband), GFP_KERNEL);
813 if (!sband)
814 goto err_out;
815 if (chip->ht_supported)
816 rtw_init_ht_cap(rtwdev, &sband->ht_cap);
817 hw->wiphy->bands[NL80211_BAND_2GHZ] = sband;
818 }
819
820 if (chip->band & RTW_BAND_5G) {
821 sband = kmemdup(&rtw_band_5ghz, sizeof(*sband), GFP_KERNEL);
822 if (!sband)
823 goto err_out;
824 if (chip->ht_supported)
825 rtw_init_ht_cap(rtwdev, &sband->ht_cap);
826 if (chip->vht_supported)
827 rtw_init_vht_cap(rtwdev, &sband->vht_cap);
828 hw->wiphy->bands[NL80211_BAND_5GHZ] = sband;
829 }
830
831 return;
832
833err_out:
834 rtw_err(rtwdev, "failed to set supported band\n");
835 kfree(sband);
836}
837
838static void rtw_unset_supported_band(struct ieee80211_hw *hw,
839 struct rtw_chip_info *chip)
840{
841 kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]);
842 kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]);
843}
844
845static void rtw_load_firmware_cb(const struct firmware *firmware, void *context)
846{
847 struct rtw_dev *rtwdev = context;
848 struct rtw_fw_state *fw = &rtwdev->fw;
849
850 if (!firmware)
851 rtw_err(rtwdev, "failed to request firmware\n");
852
853 fw->firmware = firmware;
854 complete_all(&fw->completion);
855}
856
857static int rtw_load_firmware(struct rtw_dev *rtwdev, const char *fw_name)
858{
859 struct rtw_fw_state *fw = &rtwdev->fw;
860 int ret;
861
862 init_completion(&fw->completion);
863
864 ret = request_firmware_nowait(THIS_MODULE, true, fw_name, rtwdev->dev,
865 GFP_KERNEL, rtwdev, rtw_load_firmware_cb);
866 if (ret) {
867 rtw_err(rtwdev, "async firmware request failed\n");
868 return ret;
869 }
870
871 return 0;
872}
873
874static int rtw_chip_parameter_setup(struct rtw_dev *rtwdev)
875{
876 struct rtw_chip_info *chip = rtwdev->chip;
877 struct rtw_hal *hal = &rtwdev->hal;
878 struct rtw_efuse *efuse = &rtwdev->efuse;
879 u32 wl_bt_pwr_ctrl;
880 int ret = 0;
881
882 switch (rtw_hci_type(rtwdev)) {
883 case RTW_HCI_TYPE_PCIE:
884 rtwdev->hci.rpwm_addr = 0x03d9;
885 break;
886 default:
887 rtw_err(rtwdev, "unsupported hci type\n");
888 return -EINVAL;
889 }
890
891 wl_bt_pwr_ctrl = rtw_read32(rtwdev, REG_WL_BT_PWR_CTRL);
892 if (wl_bt_pwr_ctrl & BIT_BT_FUNC_EN)
893 rtwdev->efuse.btcoex = true;
894 hal->chip_version = rtw_read32(rtwdev, REG_SYS_CFG1);
895 hal->fab_version = BIT_GET_VENDOR_ID(hal->chip_version) >> 2;
896 hal->cut_version = BIT_GET_CHIP_VER(hal->chip_version);
897 hal->mp_chip = (hal->chip_version & BIT_RTL_ID) ? 0 : 1;
898 if (hal->chip_version & BIT_RF_TYPE_ID) {
899 hal->rf_type = RF_2T2R;
900 hal->rf_path_num = 2;
901 hal->antenna_tx = BB_PATH_AB;
902 hal->antenna_rx = BB_PATH_AB;
903 } else {
904 hal->rf_type = RF_1T1R;
905 hal->rf_path_num = 1;
906 hal->antenna_tx = BB_PATH_A;
907 hal->antenna_rx = BB_PATH_A;
908 }
909
910 if (hal->fab_version == 2)
911 hal->fab_version = 1;
912 else if (hal->fab_version == 1)
913 hal->fab_version = 2;
914
915 efuse->physical_size = chip->phy_efuse_size;
916 efuse->logical_size = chip->log_efuse_size;
917 efuse->protect_size = chip->ptct_efuse_size;
918
919
920 rtwdev->hal.rcr |= BIT_VHT_DACK;
921
922 return ret;
923}
924
925static int rtw_chip_efuse_enable(struct rtw_dev *rtwdev)
926{
927 struct rtw_fw_state *fw = &rtwdev->fw;
928 int ret;
929
930 ret = rtw_hci_setup(rtwdev);
931 if (ret) {
932 rtw_err(rtwdev, "failed to setup hci\n");
933 goto err;
934 }
935
936 ret = rtw_mac_power_on(rtwdev);
937 if (ret) {
938 rtw_err(rtwdev, "failed to power on mac\n");
939 goto err;
940 }
941
942 rtw_write8(rtwdev, REG_C2HEVT, C2H_HW_FEATURE_DUMP);
943
944 wait_for_completion(&fw->completion);
945 if (!fw->firmware) {
946 ret = -EINVAL;
947 rtw_err(rtwdev, "failed to load firmware\n");
948 goto err;
949 }
950
951 ret = rtw_download_firmware(rtwdev, fw);
952 if (ret) {
953 rtw_err(rtwdev, "failed to download firmware\n");
954 goto err_off;
955 }
956
957 return 0;
958
959err_off:
960 rtw_mac_power_off(rtwdev);
961
962err:
963 return ret;
964}
965
966static int rtw_dump_hw_feature(struct rtw_dev *rtwdev)
967{
968 struct rtw_efuse *efuse = &rtwdev->efuse;
969 u8 hw_feature[HW_FEATURE_LEN];
970 u8 id;
971 u8 bw;
972 int i;
973
974 id = rtw_read8(rtwdev, REG_C2HEVT);
975 if (id != C2H_HW_FEATURE_REPORT) {
976 rtw_err(rtwdev, "failed to read hw feature report\n");
977 return -EBUSY;
978 }
979
980 for (i = 0; i < HW_FEATURE_LEN; i++)
981 hw_feature[i] = rtw_read8(rtwdev, REG_C2HEVT + 2 + i);
982
983 rtw_write8(rtwdev, REG_C2HEVT, 0);
984
985 bw = GET_EFUSE_HW_CAP_BW(hw_feature);
986 efuse->hw_cap.bw = hw_bw_cap_to_bitamp(bw);
987 efuse->hw_cap.hci = GET_EFUSE_HW_CAP_HCI(hw_feature);
988 efuse->hw_cap.nss = GET_EFUSE_HW_CAP_NSS(hw_feature);
989 efuse->hw_cap.ptcl = GET_EFUSE_HW_CAP_PTCL(hw_feature);
990 efuse->hw_cap.ant_num = GET_EFUSE_HW_CAP_ANT_NUM(hw_feature);
991
992 rtw_hw_config_rf_ant_num(rtwdev, efuse->hw_cap.ant_num);
993
994 if (efuse->hw_cap.nss == EFUSE_HW_CAP_IGNORE)
995 efuse->hw_cap.nss = rtwdev->hal.rf_path_num;
996
997 rtw_dbg(rtwdev, RTW_DBG_EFUSE,
998 "hw cap: hci=0x%02x, bw=0x%02x, ptcl=0x%02x, ant_num=%d, nss=%d\n",
999 efuse->hw_cap.hci, efuse->hw_cap.bw, efuse->hw_cap.ptcl,
1000 efuse->hw_cap.ant_num, efuse->hw_cap.nss);
1001
1002 return 0;
1003}
1004
1005static void rtw_chip_efuse_disable(struct rtw_dev *rtwdev)
1006{
1007 rtw_hci_stop(rtwdev);
1008 rtw_mac_power_off(rtwdev);
1009}
1010
1011static int rtw_chip_efuse_info_setup(struct rtw_dev *rtwdev)
1012{
1013 struct rtw_efuse *efuse = &rtwdev->efuse;
1014 int ret;
1015
1016 mutex_lock(&rtwdev->mutex);
1017
1018
1019 ret = rtw_chip_efuse_enable(rtwdev);
1020 if (ret)
1021 goto out;
1022
1023 ret = rtw_parse_efuse_map(rtwdev);
1024 if (ret)
1025 goto out;
1026
1027 ret = rtw_dump_hw_feature(rtwdev);
1028 if (ret)
1029 goto out;
1030
1031 ret = rtw_check_supported_rfe(rtwdev);
1032 if (ret)
1033 goto out;
1034
1035 if (efuse->crystal_cap == 0xff)
1036 efuse->crystal_cap = 0;
1037 if (efuse->pa_type_2g == 0xff)
1038 efuse->pa_type_2g = 0;
1039 if (efuse->pa_type_5g == 0xff)
1040 efuse->pa_type_5g = 0;
1041 if (efuse->lna_type_2g == 0xff)
1042 efuse->lna_type_2g = 0;
1043 if (efuse->lna_type_5g == 0xff)
1044 efuse->lna_type_5g = 0;
1045 if (efuse->channel_plan == 0xff)
1046 efuse->channel_plan = 0x7f;
1047 if (efuse->bt_setting & BIT(0))
1048 efuse->share_ant = true;
1049 if (efuse->regd == 0xff)
1050 efuse->regd = 0;
1051
1052 efuse->ext_pa_2g = efuse->pa_type_2g & BIT(4) ? 1 : 0;
1053 efuse->ext_lna_2g = efuse->lna_type_2g & BIT(3) ? 1 : 0;
1054 efuse->ext_pa_5g = efuse->pa_type_5g & BIT(0) ? 1 : 0;
1055 efuse->ext_lna_2g = efuse->lna_type_5g & BIT(3) ? 1 : 0;
1056
1057 rtw_chip_efuse_disable(rtwdev);
1058
1059out:
1060 mutex_unlock(&rtwdev->mutex);
1061 return ret;
1062}
1063
1064static int rtw_chip_board_info_setup(struct rtw_dev *rtwdev)
1065{
1066 struct rtw_hal *hal = &rtwdev->hal;
1067 const struct rtw_rfe_def *rfe_def = rtw_get_rfe_def(rtwdev);
1068
1069 if (!rfe_def)
1070 return -ENODEV;
1071
1072 rtw_phy_setup_phy_cond(rtwdev, 0);
1073
1074 rtw_phy_init_tx_power(rtwdev);
1075 rtw_load_table(rtwdev, rfe_def->phy_pg_tbl);
1076 rtw_load_table(rtwdev, rfe_def->txpwr_lmt_tbl);
1077 rtw_phy_tx_power_by_rate_config(hal);
1078 rtw_phy_tx_power_limit_config(hal);
1079
1080 return 0;
1081}
1082
1083int rtw_chip_info_setup(struct rtw_dev *rtwdev)
1084{
1085 int ret;
1086
1087 ret = rtw_chip_parameter_setup(rtwdev);
1088 if (ret) {
1089 rtw_err(rtwdev, "failed to setup chip parameters\n");
1090 goto err_out;
1091 }
1092
1093 ret = rtw_chip_efuse_info_setup(rtwdev);
1094 if (ret) {
1095 rtw_err(rtwdev, "failed to setup chip efuse info\n");
1096 goto err_out;
1097 }
1098
1099 ret = rtw_chip_board_info_setup(rtwdev);
1100 if (ret) {
1101 rtw_err(rtwdev, "failed to setup chip board info\n");
1102 goto err_out;
1103 }
1104
1105 return 0;
1106
1107err_out:
1108 return ret;
1109}
1110EXPORT_SYMBOL(rtw_chip_info_setup);
1111
1112int rtw_core_init(struct rtw_dev *rtwdev)
1113{
1114 int ret;
1115
1116 INIT_LIST_HEAD(&rtwdev->rsvd_page_list);
1117
1118 timer_setup(&rtwdev->tx_report.purge_timer,
1119 rtw_tx_report_purge_timer, 0);
1120
1121 INIT_DELAYED_WORK(&rtwdev->watch_dog_work, rtw_watch_dog_work);
1122 INIT_DELAYED_WORK(&rtwdev->lps_work, rtw_lps_work);
1123 INIT_WORK(&rtwdev->c2h_work, rtw_c2h_work);
1124 skb_queue_head_init(&rtwdev->c2h_queue);
1125 skb_queue_head_init(&rtwdev->tx_report.queue);
1126
1127 spin_lock_init(&rtwdev->dm_lock);
1128 spin_lock_init(&rtwdev->rf_lock);
1129 spin_lock_init(&rtwdev->h2c.lock);
1130 spin_lock_init(&rtwdev->tx_report.q_lock);
1131
1132 mutex_init(&rtwdev->mutex);
1133 mutex_init(&rtwdev->hal.tx_power_mutex);
1134
1135 rtwdev->sec.total_cam_num = 32;
1136 rtwdev->hal.current_channel = 1;
1137 set_bit(RTW_BC_MC_MACID, rtwdev->mac_id_map);
1138
1139 mutex_lock(&rtwdev->mutex);
1140 rtw_add_rsvd_page(rtwdev, RSVD_BEACON, false);
1141 mutex_unlock(&rtwdev->mutex);
1142
1143
1144 rtwdev->hal.rcr = BIT_APP_FCS | BIT_APP_MIC | BIT_APP_ICV |
1145 BIT_HTC_LOC_CTRL | BIT_APP_PHYSTS |
1146 BIT_AB | BIT_AM | BIT_APM;
1147
1148 ret = rtw_load_firmware(rtwdev, rtwdev->chip->fw_name);
1149 if (ret) {
1150 rtw_warn(rtwdev, "no firmware loaded\n");
1151 return ret;
1152 }
1153
1154 return 0;
1155}
1156EXPORT_SYMBOL(rtw_core_init);
1157
1158void rtw_core_deinit(struct rtw_dev *rtwdev)
1159{
1160 struct rtw_fw_state *fw = &rtwdev->fw;
1161 struct rtw_rsvd_page *rsvd_pkt, *tmp;
1162 unsigned long flags;
1163
1164 if (fw->firmware)
1165 release_firmware(fw->firmware);
1166
1167 spin_lock_irqsave(&rtwdev->tx_report.q_lock, flags);
1168 skb_queue_purge(&rtwdev->tx_report.queue);
1169 spin_unlock_irqrestore(&rtwdev->tx_report.q_lock, flags);
1170
1171 list_for_each_entry_safe(rsvd_pkt, tmp, &rtwdev->rsvd_page_list, list) {
1172 list_del(&rsvd_pkt->list);
1173 kfree(rsvd_pkt);
1174 }
1175
1176 mutex_destroy(&rtwdev->mutex);
1177 mutex_destroy(&rtwdev->hal.tx_power_mutex);
1178}
1179EXPORT_SYMBOL(rtw_core_deinit);
1180
1181int rtw_register_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw)
1182{
1183 int max_tx_headroom = 0;
1184 int ret;
1185
1186
1187 max_tx_headroom = rtwdev->chip->tx_pkt_desc_sz;
1188
1189 hw->extra_tx_headroom = max_tx_headroom;
1190 hw->queues = IEEE80211_NUM_ACS;
1191 hw->sta_data_size = sizeof(struct rtw_sta_info);
1192 hw->vif_data_size = sizeof(struct rtw_vif);
1193
1194 ieee80211_hw_set(hw, SIGNAL_DBM);
1195 ieee80211_hw_set(hw, RX_INCLUDES_FCS);
1196 ieee80211_hw_set(hw, AMPDU_AGGREGATION);
1197 ieee80211_hw_set(hw, MFP_CAPABLE);
1198 ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS);
1199 ieee80211_hw_set(hw, SUPPORTS_PS);
1200 ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
1201 ieee80211_hw_set(hw, SUPPORT_FAST_XMIT);
1202
1203 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
1204 BIT(NL80211_IFTYPE_AP) |
1205 BIT(NL80211_IFTYPE_ADHOC) |
1206 BIT(NL80211_IFTYPE_MESH_POINT);
1207
1208 hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS |
1209 WIPHY_FLAG_TDLS_EXTERNAL_SETUP;
1210
1211 hw->wiphy->features |= NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR;
1212
1213 rtw_set_supported_band(hw, rtwdev->chip);
1214 SET_IEEE80211_PERM_ADDR(hw, rtwdev->efuse.addr);
1215
1216 rtw_regd_init(rtwdev, rtw_regd_notifier);
1217
1218 ret = ieee80211_register_hw(hw);
1219 if (ret) {
1220 rtw_err(rtwdev, "failed to register hw\n");
1221 return ret;
1222 }
1223
1224 if (regulatory_hint(hw->wiphy, rtwdev->regd.alpha2))
1225 rtw_err(rtwdev, "regulatory_hint fail\n");
1226
1227 rtw_debugfs_init(rtwdev);
1228
1229 return 0;
1230}
1231EXPORT_SYMBOL(rtw_register_hw);
1232
1233void rtw_unregister_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw)
1234{
1235 struct rtw_chip_info *chip = rtwdev->chip;
1236
1237 ieee80211_unregister_hw(hw);
1238 rtw_unset_supported_band(hw, chip);
1239}
1240EXPORT_SYMBOL(rtw_unregister_hw);
1241
1242MODULE_AUTHOR("Realtek Corporation");
1243MODULE_DESCRIPTION("Realtek 802.11ac wireless core module");
1244MODULE_LICENSE("Dual BSD/GPL");
1245
