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43#include <linux/delay.h>
44#include <linux/types.h>
45#include <linux/kernel.h>
46#include <linux/pci.h>
47#include <linux/init.h>
48#include <linux/ioport.h>
49#include <linux/slab.h>
50#include <linux/interrupt.h>
51#include <linux/spinlock.h>
52
53#include <asm/pdc.h>
54#include <asm/page.h>
55#include <asm/io.h>
56#include <asm/hardware.h>
57
58#include "gsc.h"
59#include "iommu.h"
60
61#undef DINO_DEBUG
62
63#ifdef DINO_DEBUG
64#define DBG(x...) printk(x)
65#else
66#define DBG(x...)
67#endif
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83#define is_card_dino(id) ((id)->hw_type == HPHW_A_DMA)
84#define is_cujo(id) ((id)->hversion == 0x682)
85
86#define DINO_IAR0 0x004
87#define DINO_IODC_ADDR 0x008
88#define DINO_IODC_DATA_0 0x008
89#define DINO_IODC_DATA_1 0x008
90#define DINO_IRR0 0x00C
91#define DINO_IAR1 0x010
92#define DINO_IRR1 0x014
93#define DINO_IMR 0x018
94#define DINO_IPR 0x01C
95#define DINO_TOC_ADDR 0x020
96#define DINO_ICR 0x024
97#define DINO_ILR 0x028
98#define DINO_IO_COMMAND 0x030
99#define DINO_IO_STATUS 0x034
100#define DINO_IO_CONTROL 0x038
101#define DINO_IO_GSC_ERR_RESP 0x040
102#define DINO_IO_ERR_INFO 0x044
103#define DINO_IO_PCI_ERR_RESP 0x048
104#define DINO_IO_FBB_EN 0x05c
105#define DINO_IO_ADDR_EN 0x060
106#define DINO_PCI_ADDR 0x064
107#define DINO_CONFIG_DATA 0x068
108#define DINO_IO_DATA 0x06c
109#define DINO_MEM_DATA 0x070
110#define DINO_GSC2X_CONFIG 0x7b4
111#define DINO_GMASK 0x800
112#define DINO_PAMR 0x804
113#define DINO_PAPR 0x808
114#define DINO_DAMODE 0x80c
115#define DINO_PCICMD 0x810
116#define DINO_PCISTS 0x814
117#define DINO_MLTIM 0x81c
118#define DINO_BRDG_FEAT 0x820
119#define DINO_PCIROR 0x824
120#define DINO_PCIWOR 0x828
121#define DINO_TLTIM 0x830
122
123#define DINO_IRQS 11
124#define DINO_IRR_MASK 0x5ff
125#define DINO_LOCAL_IRQS (DINO_IRQS+1)
126
127#define DINO_MASK_IRQ(x) (1<<(x))
128
129#define PCIINTA 0x001
130#define PCIINTB 0x002
131#define PCIINTC 0x004
132#define PCIINTD 0x008
133#define PCIINTE 0x010
134#define PCIINTF 0x020
135#define GSCEXTINT 0x040
136
137
138
139#define RS232INT 0x400
140
141struct dino_device
142{
143 struct pci_hba_data hba;
144 spinlock_t dinosaur_pen;
145 unsigned long txn_addr;
146 u32 txn_data;
147 u32 imr;
148 int global_irq[DINO_LOCAL_IRQS];
149#ifdef DINO_DEBUG
150 unsigned int dino_irr0;
151#endif
152};
153
154static inline struct dino_device *DINO_DEV(struct pci_hba_data *hba)
155{
156 return container_of(hba, struct dino_device, hba);
157}
158
159
160
161
162
163#define DINO_CFG_TOK(bus,dfn,pos) ((u32) ((bus)<<16 | (dfn)<<8 | (pos)))
164
165
166
167
168
169
170static int dino_current_bus = 0;
171
172static int dino_cfg_read(struct pci_bus *bus, unsigned int devfn, int where,
173 int size, u32 *val)
174{
175 struct dino_device *d = DINO_DEV(parisc_walk_tree(bus->bridge));
176 u32 local_bus = (bus->parent == NULL) ? 0 : bus->busn_res.start;
177 u32 v = DINO_CFG_TOK(local_bus, devfn, where & ~3);
178 void __iomem *base_addr = d->hba.base_addr;
179 unsigned long flags;
180
181 DBG("%s: %p, %d, %d, %d\n", __func__, base_addr, devfn, where,
182 size);
183 spin_lock_irqsave(&d->dinosaur_pen, flags);
184
185
186 __raw_writel(v, base_addr + DINO_PCI_ADDR);
187
188
189 if (size == 1) {
190 *val = readb(base_addr + DINO_CONFIG_DATA + (where & 3));
191 } else if (size == 2) {
192 *val = readw(base_addr + DINO_CONFIG_DATA + (where & 2));
193 } else if (size == 4) {
194 *val = readl(base_addr + DINO_CONFIG_DATA);
195 }
196
197 spin_unlock_irqrestore(&d->dinosaur_pen, flags);
198 return 0;
199}
200
201
202
203
204
205
206
207static int dino_cfg_write(struct pci_bus *bus, unsigned int devfn, int where,
208 int size, u32 val)
209{
210 struct dino_device *d = DINO_DEV(parisc_walk_tree(bus->bridge));
211 u32 local_bus = (bus->parent == NULL) ? 0 : bus->busn_res.start;
212 u32 v = DINO_CFG_TOK(local_bus, devfn, where & ~3);
213 void __iomem *base_addr = d->hba.base_addr;
214 unsigned long flags;
215
216 DBG("%s: %p, %d, %d, %d\n", __func__, base_addr, devfn, where,
217 size);
218 spin_lock_irqsave(&d->dinosaur_pen, flags);
219
220
221 __raw_writel(v & 0xffffff00, base_addr + DINO_PCI_ADDR);
222 __raw_readl(base_addr + DINO_CONFIG_DATA);
223
224
225 __raw_writel(v, base_addr + DINO_PCI_ADDR);
226
227 if (size == 1) {
228 writeb(val, base_addr + DINO_CONFIG_DATA + (where & 3));
229 } else if (size == 2) {
230 writew(val, base_addr + DINO_CONFIG_DATA + (where & 2));
231 } else if (size == 4) {
232 writel(val, base_addr + DINO_CONFIG_DATA);
233 }
234
235 spin_unlock_irqrestore(&d->dinosaur_pen, flags);
236 return 0;
237}
238
239static struct pci_ops dino_cfg_ops = {
240 .read = dino_cfg_read,
241 .write = dino_cfg_write,
242};
243
244
245
246
247
248
249
250
251
252
253
254#define DINO_PORT_IN(type, size, mask) \
255static u##size dino_in##size (struct pci_hba_data *d, u16 addr) \
256{ \
257 u##size v; \
258 unsigned long flags; \
259 spin_lock_irqsave(&(DINO_DEV(d)->dinosaur_pen), flags); \
260 \
261 __raw_writel((u32) addr, d->base_addr + DINO_PCI_ADDR); \
262 \
263 v = read##type(d->base_addr+DINO_IO_DATA+(addr&mask)); \
264 spin_unlock_irqrestore(&(DINO_DEV(d)->dinosaur_pen), flags); \
265 return v; \
266}
267
268DINO_PORT_IN(b, 8, 3)
269DINO_PORT_IN(w, 16, 2)
270DINO_PORT_IN(l, 32, 0)
271
272#define DINO_PORT_OUT(type, size, mask) \
273static void dino_out##size (struct pci_hba_data *d, u16 addr, u##size val) \
274{ \
275 unsigned long flags; \
276 spin_lock_irqsave(&(DINO_DEV(d)->dinosaur_pen), flags); \
277 \
278 __raw_writel((u32) addr, d->base_addr + DINO_PCI_ADDR); \
279 \
280 write##type(val, d->base_addr+DINO_IO_DATA+(addr&mask)); \
281 spin_unlock_irqrestore(&(DINO_DEV(d)->dinosaur_pen), flags); \
282}
283
284DINO_PORT_OUT(b, 8, 3)
285DINO_PORT_OUT(w, 16, 2)
286DINO_PORT_OUT(l, 32, 0)
287
288static struct pci_port_ops dino_port_ops = {
289 .inb = dino_in8,
290 .inw = dino_in16,
291 .inl = dino_in32,
292 .outb = dino_out8,
293 .outw = dino_out16,
294 .outl = dino_out32
295};
296
297static void dino_mask_irq(struct irq_data *d)
298{
299 struct dino_device *dino_dev = irq_data_get_irq_chip_data(d);
300 int local_irq = gsc_find_local_irq(d->irq, dino_dev->global_irq, DINO_LOCAL_IRQS);
301
302 DBG(KERN_WARNING "%s(0x%px, %d)\n", __func__, dino_dev, d->irq);
303
304
305 dino_dev->imr &= ~(DINO_MASK_IRQ(local_irq));
306 __raw_writel(dino_dev->imr, dino_dev->hba.base_addr+DINO_IMR);
307}
308
309static void dino_unmask_irq(struct irq_data *d)
310{
311 struct dino_device *dino_dev = irq_data_get_irq_chip_data(d);
312 int local_irq = gsc_find_local_irq(d->irq, dino_dev->global_irq, DINO_LOCAL_IRQS);
313 u32 tmp;
314
315 DBG(KERN_WARNING "%s(0x%px, %d)\n", __func__, dino_dev, d->irq);
316
317
318
319
320
321
322
323 __raw_readl(dino_dev->hba.base_addr+DINO_IPR);
324
325
326 dino_dev->imr |= DINO_MASK_IRQ(local_irq);
327 __raw_writel( dino_dev->imr, dino_dev->hba.base_addr+DINO_IMR);
328
329
330
331
332
333
334
335
336
337
338 tmp = __raw_readl(dino_dev->hba.base_addr+DINO_ILR);
339 if (tmp & DINO_MASK_IRQ(local_irq)) {
340 DBG(KERN_WARNING "%s(): IRQ asserted! (ILR 0x%x)\n",
341 __func__, tmp);
342 gsc_writel(dino_dev->txn_data, dino_dev->txn_addr);
343 }
344}
345
346static struct irq_chip dino_interrupt_type = {
347 .name = "GSC-PCI",
348 .irq_unmask = dino_unmask_irq,
349 .irq_mask = dino_mask_irq,
350};
351
352
353
354
355
356
357
358
359static irqreturn_t dino_isr(int irq, void *intr_dev)
360{
361 struct dino_device *dino_dev = intr_dev;
362 u32 mask;
363 int ilr_loop = 100;
364
365
366#ifdef DINO_DEBUG
367 dino_dev->dino_irr0 =
368#endif
369 mask = __raw_readl(dino_dev->hba.base_addr+DINO_IRR0) & DINO_IRR_MASK;
370
371 if (mask == 0)
372 return IRQ_NONE;
373
374ilr_again:
375 do {
376 int local_irq = __ffs(mask);
377 int irq = dino_dev->global_irq[local_irq];
378 DBG(KERN_DEBUG "%s(%d, %p) mask 0x%x\n",
379 __func__, irq, intr_dev, mask);
380 generic_handle_irq(irq);
381 mask &= ~DINO_MASK_IRQ(local_irq);
382 } while (mask);
383
384
385
386
387
388
389
390
391 mask = __raw_readl(dino_dev->hba.base_addr+DINO_ILR) & dino_dev->imr;
392 if (mask) {
393 if (--ilr_loop > 0)
394 goto ilr_again;
395 pr_warn_ratelimited("Dino 0x%px: stuck interrupt %d\n",
396 dino_dev->hba.base_addr, mask);
397 }
398 return IRQ_HANDLED;
399}
400
401static void dino_assign_irq(struct dino_device *dino, int local_irq, int *irqp)
402{
403 int irq = gsc_assign_irq(&dino_interrupt_type, dino);
404 if (irq == NO_IRQ)
405 return;
406
407 *irqp = irq;
408 dino->global_irq[local_irq] = irq;
409}
410
411static void dino_choose_irq(struct parisc_device *dev, void *ctrl)
412{
413 int irq;
414 struct dino_device *dino = ctrl;
415
416 switch (dev->id.sversion) {
417 case 0x00084: irq = 8; break;
418 case 0x0008c: irq = 10; break;
419 case 0x00096: irq = 8; break;
420 default: return;
421 }
422
423 dino_assign_irq(dino, irq, &dev->irq);
424}
425
426
427
428
429
430
431static void quirk_cirrus_cardbus(struct pci_dev *dev)
432{
433 u8 new_irq = dev->irq - 1;
434 printk(KERN_INFO "PCI: Cirrus Cardbus IRQ fixup for %s, from %d to %d\n",
435 pci_name(dev), dev->irq, new_irq);
436 dev->irq = new_irq;
437}
438DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_CIRRUS, PCI_DEVICE_ID_CIRRUS_6832, quirk_cirrus_cardbus );
439
440
441static void __init
442dino_bios_init(void)
443{
444 DBG("dino_bios_init\n");
445}
446
447
448
449
450
451
452
453
454#define _8MB 0x00800000UL
455static void __init
456dino_card_setup(struct pci_bus *bus, void __iomem *base_addr)
457{
458 int i;
459 struct dino_device *dino_dev = DINO_DEV(parisc_walk_tree(bus->bridge));
460 struct resource *res;
461 char name[128];
462 int size;
463
464 res = &dino_dev->hba.lmmio_space;
465 res->flags = IORESOURCE_MEM;
466 size = scnprintf(name, sizeof(name), "Dino LMMIO (%s)",
467 dev_name(bus->bridge));
468 res->name = kmalloc(size+1, GFP_KERNEL);
469 if(res->name)
470 strcpy((char *)res->name, name);
471 else
472 res->name = dino_dev->hba.lmmio_space.name;
473
474
475 if (ccio_allocate_resource(dino_dev->hba.dev, res, _8MB,
476 F_EXTEND(0xf0000000UL) | _8MB,
477 F_EXTEND(0xffffffffUL) &~ _8MB, _8MB) < 0) {
478 struct pci_dev *dev, *tmp;
479
480 printk(KERN_ERR "Dino: cannot attach bus %s\n",
481 dev_name(bus->bridge));
482
483 list_for_each_entry_safe(dev, tmp, &bus->devices, bus_list) {
484 list_del(&dev->bus_list);
485 }
486
487 return;
488 }
489 bus->resource[1] = res;
490 bus->resource[0] = &(dino_dev->hba.io_space);
491
492
493 for (i = 1; i < 31; i++) {
494 if (res->start == F_EXTEND(0xf0000000UL | (i * _8MB)))
495 break;
496 }
497 DBG("DINO GSC WRITE i=%d, start=%lx, dino addr = %p\n",
498 i, res->start, base_addr + DINO_IO_ADDR_EN);
499 __raw_writel(1 << i, base_addr + DINO_IO_ADDR_EN);
500}
501
502static void __init
503dino_card_fixup(struct pci_dev *dev)
504{
505 u32 irq_pin;
506
507
508
509
510
511
512 if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
513 panic("Card-Mode Dino: PCI-PCI Bridge not supported\n");
514 }
515
516
517
518
519
520 dino_cfg_write(dev->bus, dev->devfn,
521 PCI_CACHE_LINE_SIZE, 2, 0xff00 | L1_CACHE_BYTES/4);
522
523
524
525
526
527
528
529
530
531
532 dino_cfg_read(dev->bus, dev->devfn, PCI_INTERRUPT_PIN, 1, &irq_pin);
533 dev->irq = pci_swizzle_interrupt_pin(dev, irq_pin) - 1;
534
535
536
537
538 dino_cfg_write(dev->bus, dev->devfn, PCI_INTERRUPT_LINE, 1, dev->irq);
539}
540
541
542#define DINO_BRIDGE_ALIGN 0x100000
543
544
545static void __init
546dino_fixup_bus(struct pci_bus *bus)
547{
548 struct pci_dev *dev;
549 struct dino_device *dino_dev = DINO_DEV(parisc_walk_tree(bus->bridge));
550
551 DBG(KERN_WARNING "%s(0x%px) bus %d platform_data 0x%px\n",
552 __func__, bus, bus->busn_res.start,
553 bus->bridge->platform_data);
554
555
556 if (is_card_dino(&dino_dev->hba.dev->id)) {
557 dino_card_setup(bus, dino_dev->hba.base_addr);
558 } else if (bus->parent) {
559 int i;
560
561 pci_read_bridge_bases(bus);
562
563
564 for(i = PCI_BRIDGE_RESOURCES; i < PCI_NUM_RESOURCES; i++) {
565 if((bus->self->resource[i].flags &
566 (IORESOURCE_IO | IORESOURCE_MEM)) == 0)
567 continue;
568
569 if(bus->self->resource[i].flags & IORESOURCE_MEM) {
570
571
572
573
574
575
576 bus->self->resource[i].end = bus->self->resource[i].end - bus->self->resource[i].start + DINO_BRIDGE_ALIGN;
577 bus->self->resource[i].start = DINO_BRIDGE_ALIGN;
578
579 }
580
581 DBG("DEBUG %s assigning %d [%pR]\n",
582 dev_name(&bus->self->dev), i,
583 &bus->self->resource[i]);
584 WARN_ON(pci_assign_resource(bus->self, i));
585 DBG("DEBUG %s after assign %d [%pR]\n",
586 dev_name(&bus->self->dev), i,
587 &bus->self->resource[i]);
588 }
589 }
590
591
592 list_for_each_entry(dev, &bus->devices, bus_list) {
593 if (is_card_dino(&dino_dev->hba.dev->id))
594 dino_card_fixup(dev);
595
596
597
598
599
600 if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
601 pcibios_init_bridge(dev);
602 continue;
603 }
604
605
606
607
608 dev->resource[PCI_ROM_RESOURCE].flags = 0;
609
610 if(dev->irq == 255) {
611
612#define DINO_FIX_UNASSIGNED_INTERRUPTS
613#ifdef DINO_FIX_UNASSIGNED_INTERRUPTS
614
615
616
617
618
619
620
621 u32 irq_pin;
622
623 dino_cfg_read(dev->bus, dev->devfn,
624 PCI_INTERRUPT_PIN, 1, &irq_pin);
625 irq_pin = pci_swizzle_interrupt_pin(dev, irq_pin) - 1;
626 printk(KERN_WARNING "Device %s has undefined IRQ, "
627 "setting to %d\n", pci_name(dev), irq_pin);
628 dino_cfg_write(dev->bus, dev->devfn,
629 PCI_INTERRUPT_LINE, 1, irq_pin);
630 dino_assign_irq(dino_dev, irq_pin, &dev->irq);
631#else
632 dev->irq = 65535;
633 printk(KERN_WARNING "Device %s has unassigned IRQ\n", pci_name(dev));
634#endif
635 } else {
636
637 dino_assign_irq(dino_dev, dev->irq, &dev->irq);
638 }
639 }
640}
641
642
643static struct pci_bios_ops dino_bios_ops = {
644 .init = dino_bios_init,
645 .fixup_bus = dino_fixup_bus
646};
647
648
649
650
651
652static void __init
653dino_card_init(struct dino_device *dino_dev)
654{
655 u32 brdg_feat = 0x00784e05;
656 unsigned long status;
657
658 status = __raw_readl(dino_dev->hba.base_addr+DINO_IO_STATUS);
659 if (status & 0x0000ff80) {
660 __raw_writel(0x00000005,
661 dino_dev->hba.base_addr+DINO_IO_COMMAND);
662 udelay(1);
663 }
664
665 __raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_GMASK);
666 __raw_writel(0x00000001, dino_dev->hba.base_addr+DINO_IO_FBB_EN);
667 __raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_ICR);
668
669#if 1
670
671
672
673
674
675 brdg_feat &= ~0x4;
676#endif
677 __raw_writel( brdg_feat, dino_dev->hba.base_addr+DINO_BRDG_FEAT);
678
679
680
681
682
683
684 __raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_IO_ADDR_EN);
685
686 __raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_DAMODE);
687 __raw_writel(0x00222222, dino_dev->hba.base_addr+DINO_PCIROR);
688 __raw_writel(0x00222222, dino_dev->hba.base_addr+DINO_PCIWOR);
689
690 __raw_writel(0x00000040, dino_dev->hba.base_addr+DINO_MLTIM);
691 __raw_writel(0x00000080, dino_dev->hba.base_addr+DINO_IO_CONTROL);
692 __raw_writel(0x0000008c, dino_dev->hba.base_addr+DINO_TLTIM);
693
694
695 __raw_writel(0x0000007e, dino_dev->hba.base_addr+DINO_PAMR);
696 __raw_writel(0x0000007f, dino_dev->hba.base_addr+DINO_PAPR);
697 __raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_PAMR);
698
699
700
701
702
703
704 __raw_writel(0x0000004f, dino_dev->hba.base_addr+DINO_PCICMD);
705
706
707
708
709
710
711 mdelay(pci_post_reset_delay);
712}
713
714static int __init
715dino_bridge_init(struct dino_device *dino_dev, const char *name)
716{
717 unsigned long io_addr;
718 int result, i, count=0;
719 struct resource *res, *prevres = NULL;
720
721
722
723
724
725 io_addr = __raw_readl(dino_dev->hba.base_addr + DINO_IO_ADDR_EN);
726 if (io_addr == 0) {
727 printk(KERN_WARNING "%s: No PCI devices enabled.\n", name);
728 return -ENODEV;
729 }
730
731 res = &dino_dev->hba.lmmio_space;
732 for (i = 0; i < 32; i++) {
733 unsigned long start, end;
734
735 if((io_addr & (1 << i)) == 0)
736 continue;
737
738 start = F_EXTEND(0xf0000000UL) | (i << 23);
739 end = start + 8 * 1024 * 1024 - 1;
740
741 DBG("DINO RANGE %d is at 0x%lx-0x%lx\n", count,
742 start, end);
743
744 if(prevres && prevres->end + 1 == start) {
745 prevres->end = end;
746 } else {
747 if(count >= DINO_MAX_LMMIO_RESOURCES) {
748 printk(KERN_ERR "%s is out of resource windows for range %d (0x%lx-0x%lx)\n", name, count, start, end);
749 break;
750 }
751 prevres = res;
752 res->start = start;
753 res->end = end;
754 res->flags = IORESOURCE_MEM;
755 res->name = kmalloc(64, GFP_KERNEL);
756 if(res->name)
757 snprintf((char *)res->name, 64, "%s LMMIO %d",
758 name, count);
759 res++;
760 count++;
761 }
762 }
763
764 res = &dino_dev->hba.lmmio_space;
765
766 for(i = 0; i < DINO_MAX_LMMIO_RESOURCES; i++) {
767 if(res[i].flags == 0)
768 break;
769
770 result = ccio_request_resource(dino_dev->hba.dev, &res[i]);
771 if (result < 0) {
772 printk(KERN_ERR "%s: failed to claim PCI Bus address "
773 "space %d (%pR)!\n", name, i, &res[i]);
774 return result;
775 }
776 }
777 return 0;
778}
779
780static int __init dino_common_init(struct parisc_device *dev,
781 struct dino_device *dino_dev, const char *name)
782{
783 int status;
784 u32 eim;
785 struct gsc_irq gsc_irq;
786 struct resource *res;
787
788 pcibios_register_hba(&dino_dev->hba);
789
790 pci_bios = &dino_bios_ops;
791 pci_port = &dino_port_ops;
792
793
794
795
796
797
798
799
800 dev->irq = gsc_alloc_irq(&gsc_irq);
801 dino_dev->txn_addr = gsc_irq.txn_addr;
802 dino_dev->txn_data = gsc_irq.txn_data;
803 eim = ((u32) gsc_irq.txn_addr) | gsc_irq.txn_data;
804
805
806
807
808
809 if (dev->irq < 0) {
810 printk(KERN_WARNING "%s: gsc_alloc_irq() failed\n", name);
811 return 1;
812 }
813
814 status = request_irq(dev->irq, dino_isr, 0, name, dino_dev);
815 if (status) {
816 printk(KERN_WARNING "%s: request_irq() failed with %d\n",
817 name, status);
818 return 1;
819 }
820
821
822
823
824
825 gsc_fixup_irqs(dev, dino_dev, dino_choose_irq);
826
827
828
829
830
831
832 __raw_writel(eim, dino_dev->hba.base_addr+DINO_IAR0);
833
834
835
836
837
838 __raw_readl(dino_dev->hba.base_addr+DINO_IRR0);
839
840
841 res = &dino_dev->hba.io_space;
842 if (!is_cujo(&dev->id)) {
843 res->name = "Dino I/O Port";
844 } else {
845 res->name = "Cujo I/O Port";
846 }
847 res->start = HBA_PORT_BASE(dino_dev->hba.hba_num);
848 res->end = res->start + (HBA_PORT_SPACE_SIZE - 1);
849 res->flags = IORESOURCE_IO;
850 if (request_resource(&ioport_resource, res) < 0) {
851 printk(KERN_ERR "%s: request I/O Port region failed "
852 "0x%lx/%lx (hpa 0x%px)\n",
853 name, (unsigned long)res->start, (unsigned long)res->end,
854 dino_dev->hba.base_addr);
855 return 1;
856 }
857
858 return 0;
859}
860
861#define CUJO_RAVEN_ADDR F_EXTEND(0xf1000000UL)
862#define CUJO_FIREHAWK_ADDR F_EXTEND(0xf1604000UL)
863#define CUJO_RAVEN_BADPAGE 0x01003000UL
864#define CUJO_FIREHAWK_BADPAGE 0x01607000UL
865
866static const char *dino_vers[] = {
867 "2.0",
868 "2.1",
869 "3.0",
870 "3.1"
871};
872
873static const char *cujo_vers[] = {
874 "1.0",
875 "2.0"
876};
877
878void ccio_cujo20_fixup(struct parisc_device *dev, u32 iovp);
879
880
881
882
883
884
885static int __init dino_probe(struct parisc_device *dev)
886{
887 struct dino_device *dino_dev;
888 const char *version = "unknown";
889 char *name;
890 int is_cujo = 0;
891 LIST_HEAD(resources);
892 struct pci_bus *bus;
893 unsigned long hpa = dev->hpa.start;
894 int max;
895
896 name = "Dino";
897 if (is_card_dino(&dev->id)) {
898 version = "3.x (card mode)";
899 } else {
900 if (!is_cujo(&dev->id)) {
901 if (dev->id.hversion_rev < 4) {
902 version = dino_vers[dev->id.hversion_rev];
903 }
904 } else {
905 name = "Cujo";
906 is_cujo = 1;
907 if (dev->id.hversion_rev < 2) {
908 version = cujo_vers[dev->id.hversion_rev];
909 }
910 }
911 }
912
913 printk("%s version %s found at 0x%lx\n", name, version, hpa);
914
915 if (!request_mem_region(hpa, PAGE_SIZE, name)) {
916 printk(KERN_ERR "DINO: Hey! Someone took my MMIO space (0x%lx)!\n",
917 hpa);
918 return 1;
919 }
920
921
922 if (is_cujo && dev->id.hversion_rev == 1) {
923#ifdef CONFIG_IOMMU_CCIO
924 printk(KERN_WARNING "Enabling Cujo 2.0 bug workaround\n");
925 if (hpa == (unsigned long)CUJO_RAVEN_ADDR) {
926 ccio_cujo20_fixup(dev, CUJO_RAVEN_BADPAGE);
927 } else if (hpa == (unsigned long)CUJO_FIREHAWK_ADDR) {
928 ccio_cujo20_fixup(dev, CUJO_FIREHAWK_BADPAGE);
929 } else {
930 printk("Don't recognise Cujo at address 0x%lx, not enabling workaround\n", hpa);
931 }
932#endif
933 } else if (!is_cujo && !is_card_dino(&dev->id) &&
934 dev->id.hversion_rev < 3) {
935 printk(KERN_WARNING
936"The GSCtoPCI (Dino hrev %d) bus converter found may exhibit\n"
937"data corruption. See Service Note Numbers: A4190A-01, A4191A-01.\n"
938"Systems shipped after Aug 20, 1997 will not exhibit this problem.\n"
939"Models affected: C180, C160, C160L, B160L, and B132L workstations.\n\n",
940 dev->id.hversion_rev);
941
942
943
944 }
945
946 dino_dev = kzalloc(sizeof(struct dino_device), GFP_KERNEL);
947 if (!dino_dev) {
948 printk("dino_init_chip - couldn't alloc dino_device\n");
949 return 1;
950 }
951
952 dino_dev->hba.dev = dev;
953 dino_dev->hba.base_addr = ioremap_nocache(hpa, 4096);
954 dino_dev->hba.lmmio_space_offset = PCI_F_EXTEND;
955 spin_lock_init(&dino_dev->dinosaur_pen);
956 dino_dev->hba.iommu = ccio_get_iommu(dev);
957
958 if (is_card_dino(&dev->id)) {
959 dino_card_init(dino_dev);
960 } else {
961 dino_bridge_init(dino_dev, name);
962 }
963
964 if (dino_common_init(dev, dino_dev, name))
965 return 1;
966
967 dev->dev.platform_data = dino_dev;
968
969 pci_add_resource_offset(&resources, &dino_dev->hba.io_space,
970 HBA_PORT_BASE(dino_dev->hba.hba_num));
971 if (dino_dev->hba.lmmio_space.flags)
972 pci_add_resource_offset(&resources, &dino_dev->hba.lmmio_space,
973 dino_dev->hba.lmmio_space_offset);
974 if (dino_dev->hba.elmmio_space.flags)
975 pci_add_resource_offset(&resources, &dino_dev->hba.elmmio_space,
976 dino_dev->hba.lmmio_space_offset);
977 if (dino_dev->hba.gmmio_space.flags)
978 pci_add_resource(&resources, &dino_dev->hba.gmmio_space);
979
980 dino_dev->hba.bus_num.start = dino_current_bus;
981 dino_dev->hba.bus_num.end = 255;
982 dino_dev->hba.bus_num.flags = IORESOURCE_BUS;
983 pci_add_resource(&resources, &dino_dev->hba.bus_num);
984
985
986
987
988 dino_dev->hba.hba_bus = bus = pci_create_root_bus(&dev->dev,
989 dino_current_bus, &dino_cfg_ops, NULL, &resources);
990 if (!bus) {
991 printk(KERN_ERR "ERROR: failed to scan PCI bus on %s (duplicate bus number %d?)\n",
992 dev_name(&dev->dev), dino_current_bus);
993 pci_free_resource_list(&resources);
994
995 dino_current_bus++;
996 return 0;
997 }
998
999 max = pci_scan_child_bus(bus);
1000 pci_bus_update_busn_res_end(bus, max);
1001
1002
1003
1004
1005 dino_current_bus = max + 1;
1006 pci_bus_assign_resources(bus);
1007 pci_bus_add_devices(bus);
1008 return 0;
1009}
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020static const struct parisc_device_id dino_tbl[] __initconst = {
1021 { HPHW_A_DMA, HVERSION_REV_ANY_ID, 0x004, 0x0009D },
1022 { HPHW_A_DMA, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, 0x08080 },
1023 { HPHW_BRIDGE, HVERSION_REV_ANY_ID, 0x680, 0xa },
1024 { HPHW_BRIDGE, HVERSION_REV_ANY_ID, 0x682, 0xa },
1025 { HPHW_BRIDGE, HVERSION_REV_ANY_ID, 0x05d, 0xa },
1026 { 0, }
1027};
1028
1029static struct parisc_driver dino_driver __refdata = {
1030 .name = "dino",
1031 .id_table = dino_tbl,
1032 .probe = dino_probe,
1033};
1034
1035
1036
1037
1038
1039
1040int __init dino_init(void)
1041{
1042 register_parisc_driver(&dino_driver);
1043 return 0;
1044}
1045
1046