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8#include <linux/bitops.h>
9#include <linux/io.h>
10#include <linux/of.h>
11#include <linux/of_address.h>
12#include <linux/module.h>
13#include <linux/pinctrl/pinconf.h>
14#include <linux/pinctrl/pinconf-generic.h>
15#include <linux/pinctrl/pinmux.h>
16#include <linux/pinctrl/pinctrl.h>
17#include <linux/platform_device.h>
18#include <linux/slab.h>
19
20#include "../pinctrl-utils.h"
21#include "pinctrl-pxa2xx.h"
22
23static int pxa2xx_pctrl_get_groups_count(struct pinctrl_dev *pctldev)
24{
25 struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
26
27 return pctl->ngroups;
28}
29
30static const char *pxa2xx_pctrl_get_group_name(struct pinctrl_dev *pctldev,
31 unsigned tgroup)
32{
33 struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
34 struct pxa_pinctrl_group *group = pctl->groups + tgroup;
35
36 return group->name;
37}
38
39static int pxa2xx_pctrl_get_group_pins(struct pinctrl_dev *pctldev,
40 unsigned tgroup,
41 const unsigned **pins,
42 unsigned *num_pins)
43{
44 struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
45 struct pxa_pinctrl_group *group = pctl->groups + tgroup;
46
47 *pins = (unsigned *)&group->pin;
48 *num_pins = 1;
49
50 return 0;
51}
52
53static const struct pinctrl_ops pxa2xx_pctl_ops = {
54#ifdef CONFIG_OF
55 .dt_node_to_map = pinconf_generic_dt_node_to_map_all,
56 .dt_free_map = pinctrl_utils_free_map,
57#endif
58 .get_groups_count = pxa2xx_pctrl_get_groups_count,
59 .get_group_name = pxa2xx_pctrl_get_group_name,
60 .get_group_pins = pxa2xx_pctrl_get_group_pins,
61};
62
63static struct pxa_desc_function *
64pxa_desc_by_func_group(struct pxa_pinctrl *pctl, const char *pin_name,
65 const char *func_name)
66{
67 int i;
68 struct pxa_desc_function *df;
69
70 for (i = 0; i < pctl->npins; i++) {
71 const struct pxa_desc_pin *pin = pctl->ppins + i;
72
73 if (!strcmp(pin->pin.name, pin_name))
74 for (df = pin->functions; df->name; df++)
75 if (!strcmp(df->name, func_name))
76 return df;
77 }
78
79 return NULL;
80}
81
82static int pxa2xx_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
83 struct pinctrl_gpio_range *range,
84 unsigned pin,
85 bool input)
86{
87 struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
88 unsigned long flags;
89 uint32_t val;
90 void __iomem *gpdr;
91
92 gpdr = pctl->base_gpdr[pin / 32];
93 dev_dbg(pctl->dev, "set_direction(pin=%d): dir=%d\n",
94 pin, !input);
95
96 spin_lock_irqsave(&pctl->lock, flags);
97
98 val = readl_relaxed(gpdr);
99 val = (val & ~BIT(pin % 32)) | (input ? 0 : BIT(pin % 32));
100 writel_relaxed(val, gpdr);
101
102 spin_unlock_irqrestore(&pctl->lock, flags);
103
104 return 0;
105}
106
107static const char *pxa2xx_pmx_get_func_name(struct pinctrl_dev *pctldev,
108 unsigned function)
109{
110 struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
111 struct pxa_pinctrl_function *pf = pctl->functions + function;
112
113 return pf->name;
114}
115
116static int pxa2xx_get_functions_count(struct pinctrl_dev *pctldev)
117{
118 struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
119
120 return pctl->nfuncs;
121}
122
123static int pxa2xx_pmx_get_func_groups(struct pinctrl_dev *pctldev,
124 unsigned function,
125 const char * const **groups,
126 unsigned * const num_groups)
127{
128 struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
129 struct pxa_pinctrl_function *pf = pctl->functions + function;
130
131 *groups = pf->groups;
132 *num_groups = pf->ngroups;
133
134 return 0;
135}
136
137static int pxa2xx_pmx_set_mux(struct pinctrl_dev *pctldev, unsigned function,
138 unsigned tgroup)
139{
140 struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
141 struct pxa_pinctrl_group *group = pctl->groups + tgroup;
142 struct pxa_desc_function *df;
143 int pin, shift;
144 unsigned long flags;
145 void __iomem *gafr, *gpdr;
146 u32 val;
147
148
149 df = pxa_desc_by_func_group(pctl, group->name,
150 (pctl->functions + function)->name);
151 if (!df)
152 return -EINVAL;
153
154 pin = group->pin;
155 gafr = pctl->base_gafr[pin / 16];
156 gpdr = pctl->base_gpdr[pin / 32];
157 shift = (pin % 16) << 1;
158 dev_dbg(pctl->dev, "set_mux(pin=%d): af=%d dir=%d\n",
159 pin, df->muxval >> 1, df->muxval & 0x1);
160
161 spin_lock_irqsave(&pctl->lock, flags);
162
163 val = readl_relaxed(gafr);
164 val = (val & ~(0x3 << shift)) | ((df->muxval >> 1) << shift);
165 writel_relaxed(val, gafr);
166
167 val = readl_relaxed(gpdr);
168 val = (val & ~BIT(pin % 32)) | ((df->muxval & 1) ? BIT(pin % 32) : 0);
169 writel_relaxed(val, gpdr);
170
171 spin_unlock_irqrestore(&pctl->lock, flags);
172
173 return 0;
174}
175static const struct pinmux_ops pxa2xx_pinmux_ops = {
176 .get_functions_count = pxa2xx_get_functions_count,
177 .get_function_name = pxa2xx_pmx_get_func_name,
178 .get_function_groups = pxa2xx_pmx_get_func_groups,
179 .set_mux = pxa2xx_pmx_set_mux,
180 .gpio_set_direction = pxa2xx_pmx_gpio_set_direction,
181};
182
183static int pxa2xx_pconf_group_get(struct pinctrl_dev *pctldev,
184 unsigned group,
185 unsigned long *config)
186{
187 struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
188 struct pxa_pinctrl_group *g = pctl->groups + group;
189 unsigned long flags;
190 unsigned pin = g->pin;
191 void __iomem *pgsr = pctl->base_pgsr[pin / 32];
192 u32 val;
193
194 spin_lock_irqsave(&pctl->lock, flags);
195 val = readl_relaxed(pgsr) & BIT(pin % 32);
196 *config = val ? PIN_CONFIG_LOW_POWER_MODE : 0;
197 spin_unlock_irqrestore(&pctl->lock, flags);
198
199 dev_dbg(pctl->dev, "get sleep gpio state(pin=%d) %d\n",
200 pin, !!val);
201 return 0;
202}
203
204static int pxa2xx_pconf_group_set(struct pinctrl_dev *pctldev,
205 unsigned group,
206 unsigned long *configs,
207 unsigned num_configs)
208{
209 struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
210 struct pxa_pinctrl_group *g = pctl->groups + group;
211 unsigned long flags;
212 unsigned pin = g->pin;
213 void __iomem *pgsr = pctl->base_pgsr[pin / 32];
214 int i, is_set = 0;
215 u32 val;
216
217 for (i = 0; i < num_configs; i++) {
218 switch (pinconf_to_config_param(configs[i])) {
219 case PIN_CONFIG_LOW_POWER_MODE:
220 is_set = pinconf_to_config_argument(configs[i]);
221 break;
222 default:
223 return -EINVAL;
224 }
225 }
226
227 dev_dbg(pctl->dev, "set sleep gpio state(pin=%d) %d\n",
228 pin, is_set);
229
230 spin_lock_irqsave(&pctl->lock, flags);
231 val = readl_relaxed(pgsr);
232 val = (val & ~BIT(pin % 32)) | (is_set ? BIT(pin % 32) : 0);
233 writel_relaxed(val, pgsr);
234 spin_unlock_irqrestore(&pctl->lock, flags);
235
236 return 0;
237}
238
239static const struct pinconf_ops pxa2xx_pconf_ops = {
240 .pin_config_group_get = pxa2xx_pconf_group_get,
241 .pin_config_group_set = pxa2xx_pconf_group_set,
242 .is_generic = true,
243};
244
245static struct pinctrl_desc pxa2xx_pinctrl_desc = {
246 .confops = &pxa2xx_pconf_ops,
247 .pctlops = &pxa2xx_pctl_ops,
248 .pmxops = &pxa2xx_pinmux_ops,
249};
250
251static const struct pxa_pinctrl_function *
252pxa2xx_find_function(struct pxa_pinctrl *pctl, const char *fname,
253 const struct pxa_pinctrl_function *functions)
254{
255 const struct pxa_pinctrl_function *func;
256
257 for (func = functions; func->name; func++)
258 if (!strcmp(fname, func->name))
259 return func;
260
261 return NULL;
262}
263
264static int pxa2xx_build_functions(struct pxa_pinctrl *pctl)
265{
266 int i;
267 struct pxa_pinctrl_function *functions;
268 struct pxa_desc_function *df;
269
270
271
272
273
274
275
276 functions = devm_kcalloc(pctl->dev, pctl->npins * 6,
277 sizeof(*functions), GFP_KERNEL);
278 if (!functions)
279 return -ENOMEM;
280
281 for (i = 0; i < pctl->npins; i++)
282 for (df = pctl->ppins[i].functions; df->name; df++)
283 if (!pxa2xx_find_function(pctl, df->name, functions))
284 (functions + pctl->nfuncs++)->name = df->name;
285 pctl->functions = devm_kmemdup(pctl->dev, functions,
286 pctl->nfuncs * sizeof(*functions),
287 GFP_KERNEL);
288 if (!pctl->functions)
289 return -ENOMEM;
290
291 devm_kfree(pctl->dev, functions);
292 return 0;
293}
294
295static int pxa2xx_build_groups(struct pxa_pinctrl *pctl)
296{
297 int i, j, ngroups;
298 struct pxa_pinctrl_function *func;
299 struct pxa_desc_function *df;
300 char **gtmp;
301
302 gtmp = devm_kmalloc_array(pctl->dev, pctl->npins, sizeof(*gtmp),
303 GFP_KERNEL);
304 if (!gtmp)
305 return -ENOMEM;
306
307 for (i = 0; i < pctl->nfuncs; i++) {
308 ngroups = 0;
309 for (j = 0; j < pctl->npins; j++)
310 for (df = pctl->ppins[j].functions; df->name;
311 df++)
312 if (!strcmp(pctl->functions[i].name,
313 df->name))
314 gtmp[ngroups++] = (char *)
315 pctl->ppins[j].pin.name;
316 func = pctl->functions + i;
317 func->ngroups = ngroups;
318 func->groups =
319 devm_kmalloc_array(pctl->dev, ngroups,
320 sizeof(char *), GFP_KERNEL);
321 if (!func->groups)
322 return -ENOMEM;
323
324 memcpy(func->groups, gtmp, ngroups * sizeof(*gtmp));
325 }
326
327 devm_kfree(pctl->dev, gtmp);
328 return 0;
329}
330
331static int pxa2xx_build_state(struct pxa_pinctrl *pctl,
332 const struct pxa_desc_pin *ppins, int npins)
333{
334 struct pxa_pinctrl_group *group;
335 struct pinctrl_pin_desc *pins;
336 int ret, i;
337
338 pctl->npins = npins;
339 pctl->ppins = ppins;
340 pctl->ngroups = npins;
341
342 pctl->desc.npins = npins;
343 pins = devm_kcalloc(pctl->dev, npins, sizeof(*pins), GFP_KERNEL);
344 if (!pins)
345 return -ENOMEM;
346
347 pctl->desc.pins = pins;
348 for (i = 0; i < npins; i++)
349 pins[i] = ppins[i].pin;
350
351 pctl->groups = devm_kmalloc_array(pctl->dev, pctl->ngroups,
352 sizeof(*pctl->groups), GFP_KERNEL);
353 if (!pctl->groups)
354 return -ENOMEM;
355
356 for (i = 0; i < npins; i++) {
357 group = pctl->groups + i;
358 group->name = ppins[i].pin.name;
359 group->pin = ppins[i].pin.number;
360 }
361
362 ret = pxa2xx_build_functions(pctl);
363 if (ret)
364 return ret;
365
366 ret = pxa2xx_build_groups(pctl);
367 if (ret)
368 return ret;
369
370 return 0;
371}
372
373int pxa2xx_pinctrl_init(struct platform_device *pdev,
374 const struct pxa_desc_pin *ppins, int npins,
375 void __iomem *base_gafr[], void __iomem *base_gpdr[],
376 void __iomem *base_pgsr[])
377{
378 struct pxa_pinctrl *pctl;
379 int ret, i, maxpin = 0;
380
381 for (i = 0; i < npins; i++)
382 maxpin = max_t(int, ppins[i].pin.number, maxpin);
383
384 pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
385 if (!pctl)
386 return -ENOMEM;
387 pctl->base_gafr = devm_kcalloc(&pdev->dev, roundup(maxpin, 16),
388 sizeof(*pctl->base_gafr), GFP_KERNEL);
389 pctl->base_gpdr = devm_kcalloc(&pdev->dev, roundup(maxpin, 32),
390 sizeof(*pctl->base_gpdr), GFP_KERNEL);
391 pctl->base_pgsr = devm_kcalloc(&pdev->dev, roundup(maxpin, 32),
392 sizeof(*pctl->base_pgsr), GFP_KERNEL);
393 if (!pctl->base_gafr || !pctl->base_gpdr || !pctl->base_pgsr)
394 return -ENOMEM;
395
396 platform_set_drvdata(pdev, pctl);
397 spin_lock_init(&pctl->lock);
398
399 pctl->dev = &pdev->dev;
400 pctl->desc = pxa2xx_pinctrl_desc;
401 pctl->desc.name = dev_name(&pdev->dev);
402 pctl->desc.owner = THIS_MODULE;
403
404 for (i = 0; i < roundup(maxpin, 16); i += 16)
405 pctl->base_gafr[i / 16] = base_gafr[i / 16];
406 for (i = 0; i < roundup(maxpin, 32); i += 32) {
407 pctl->base_gpdr[i / 32] = base_gpdr[i / 32];
408 pctl->base_pgsr[i / 32] = base_pgsr[i / 32];
409 }
410
411 ret = pxa2xx_build_state(pctl, ppins, npins);
412 if (ret)
413 return ret;
414
415 pctl->pctl_dev = devm_pinctrl_register(&pdev->dev, &pctl->desc, pctl);
416 if (IS_ERR(pctl->pctl_dev)) {
417 dev_err(&pdev->dev, "couldn't register pinctrl driver\n");
418 return PTR_ERR(pctl->pctl_dev);
419 }
420
421 dev_info(&pdev->dev, "initialized pxa2xx pinctrl driver\n");
422
423 return 0;
424}
425EXPORT_SYMBOL_GPL(pxa2xx_pinctrl_init);
426
427int pxa2xx_pinctrl_exit(struct platform_device *pdev)
428{
429 struct pxa_pinctrl *pctl = platform_get_drvdata(pdev);
430
431 pinctrl_unregister(pctl->pctl_dev);
432 return 0;
433}
434EXPORT_SYMBOL_GPL(pxa2xx_pinctrl_exit);
435
436MODULE_AUTHOR("Robert Jarzmik <robert.jarzmik@free.fr>");
437MODULE_DESCRIPTION("Marvell PXA2xx pinctrl driver");
438MODULE_LICENSE("GPL v2");
439
