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48#include <linux/device.h>
49#include <linux/module.h>
50#include <linux/mutex.h>
51#include <linux/param.h>
52#include <linux/jiffies.h>
53#include <linux/workqueue.h>
54#include <linux/delay.h>
55#include <linux/platform_device.h>
56#include <linux/power_supply.h>
57#include <linux/slab.h>
58#include <linux/of.h>
59
60#include <linux/power/bq27xxx_battery.h>
61
62#define BQ27XXX_MANUFACTURER "Texas Instruments"
63
64
65#define BQ27XXX_FLAG_DSC BIT(0)
66#define BQ27XXX_FLAG_SOCF BIT(1)
67#define BQ27XXX_FLAG_SOC1 BIT(2)
68#define BQ27XXX_FLAG_CFGUP BIT(4)
69#define BQ27XXX_FLAG_FC BIT(9)
70#define BQ27XXX_FLAG_OTD BIT(14)
71#define BQ27XXX_FLAG_OTC BIT(15)
72#define BQ27XXX_FLAG_UT BIT(14)
73#define BQ27XXX_FLAG_OT BIT(15)
74
75
76#define BQ27000_FLAG_EDVF BIT(0)
77#define BQ27000_FLAG_EDV1 BIT(1)
78#define BQ27000_FLAG_CI BIT(4)
79#define BQ27000_FLAG_FC BIT(5)
80#define BQ27000_FLAG_CHGS BIT(7)
81
82
83#define BQ27XXX_SEALED 0x20
84#define BQ27XXX_SET_CFGUPDATE 0x13
85#define BQ27XXX_SOFT_RESET 0x42
86#define BQ27XXX_RESET 0x41
87
88#define BQ27XXX_RS (20)
89#define BQ27XXX_POWER_CONSTANT (29200)
90#define BQ27XXX_CURRENT_CONSTANT (3570)
91
92#define INVALID_REG_ADDR 0xff
93
94
95
96
97
98
99
100enum bq27xxx_reg_index {
101 BQ27XXX_REG_CTRL = 0,
102 BQ27XXX_REG_TEMP,
103 BQ27XXX_REG_INT_TEMP,
104 BQ27XXX_REG_VOLT,
105 BQ27XXX_REG_AI,
106 BQ27XXX_REG_FLAGS,
107 BQ27XXX_REG_TTE,
108 BQ27XXX_REG_TTF,
109 BQ27XXX_REG_TTES,
110 BQ27XXX_REG_TTECP,
111 BQ27XXX_REG_NAC,
112 BQ27XXX_REG_FCC,
113 BQ27XXX_REG_CYCT,
114 BQ27XXX_REG_AE,
115 BQ27XXX_REG_SOC,
116 BQ27XXX_REG_DCAP,
117 BQ27XXX_REG_AP,
118 BQ27XXX_DM_CTRL,
119 BQ27XXX_DM_CLASS,
120 BQ27XXX_DM_BLOCK,
121 BQ27XXX_DM_DATA,
122 BQ27XXX_DM_CKSUM,
123 BQ27XXX_REG_MAX,
124};
125
126#define BQ27XXX_DM_REG_ROWS \
127 [BQ27XXX_DM_CTRL] = 0x61, \
128 [BQ27XXX_DM_CLASS] = 0x3e, \
129 [BQ27XXX_DM_BLOCK] = 0x3f, \
130 [BQ27XXX_DM_DATA] = 0x40, \
131 [BQ27XXX_DM_CKSUM] = 0x60
132
133
134static u8
135 bq27000_regs[BQ27XXX_REG_MAX] = {
136 [BQ27XXX_REG_CTRL] = 0x00,
137 [BQ27XXX_REG_TEMP] = 0x06,
138 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
139 [BQ27XXX_REG_VOLT] = 0x08,
140 [BQ27XXX_REG_AI] = 0x14,
141 [BQ27XXX_REG_FLAGS] = 0x0a,
142 [BQ27XXX_REG_TTE] = 0x16,
143 [BQ27XXX_REG_TTF] = 0x18,
144 [BQ27XXX_REG_TTES] = 0x1c,
145 [BQ27XXX_REG_TTECP] = 0x26,
146 [BQ27XXX_REG_NAC] = 0x0c,
147 [BQ27XXX_REG_FCC] = 0x12,
148 [BQ27XXX_REG_CYCT] = 0x2a,
149 [BQ27XXX_REG_AE] = 0x22,
150 [BQ27XXX_REG_SOC] = 0x0b,
151 [BQ27XXX_REG_DCAP] = 0x76,
152 [BQ27XXX_REG_AP] = 0x24,
153 [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR,
154 [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR,
155 [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR,
156 [BQ27XXX_DM_DATA] = INVALID_REG_ADDR,
157 [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR,
158 },
159 bq27010_regs[BQ27XXX_REG_MAX] = {
160 [BQ27XXX_REG_CTRL] = 0x00,
161 [BQ27XXX_REG_TEMP] = 0x06,
162 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
163 [BQ27XXX_REG_VOLT] = 0x08,
164 [BQ27XXX_REG_AI] = 0x14,
165 [BQ27XXX_REG_FLAGS] = 0x0a,
166 [BQ27XXX_REG_TTE] = 0x16,
167 [BQ27XXX_REG_TTF] = 0x18,
168 [BQ27XXX_REG_TTES] = 0x1c,
169 [BQ27XXX_REG_TTECP] = 0x26,
170 [BQ27XXX_REG_NAC] = 0x0c,
171 [BQ27XXX_REG_FCC] = 0x12,
172 [BQ27XXX_REG_CYCT] = 0x2a,
173 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
174 [BQ27XXX_REG_SOC] = 0x0b,
175 [BQ27XXX_REG_DCAP] = 0x76,
176 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
177 [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR,
178 [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR,
179 [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR,
180 [BQ27XXX_DM_DATA] = INVALID_REG_ADDR,
181 [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR,
182 },
183 bq2750x_regs[BQ27XXX_REG_MAX] = {
184 [BQ27XXX_REG_CTRL] = 0x00,
185 [BQ27XXX_REG_TEMP] = 0x06,
186 [BQ27XXX_REG_INT_TEMP] = 0x28,
187 [BQ27XXX_REG_VOLT] = 0x08,
188 [BQ27XXX_REG_AI] = 0x14,
189 [BQ27XXX_REG_FLAGS] = 0x0a,
190 [BQ27XXX_REG_TTE] = 0x16,
191 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
192 [BQ27XXX_REG_TTES] = 0x1a,
193 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
194 [BQ27XXX_REG_NAC] = 0x0c,
195 [BQ27XXX_REG_FCC] = 0x12,
196 [BQ27XXX_REG_CYCT] = 0x2a,
197 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
198 [BQ27XXX_REG_SOC] = 0x2c,
199 [BQ27XXX_REG_DCAP] = 0x3c,
200 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
201 BQ27XXX_DM_REG_ROWS,
202 },
203#define bq2751x_regs bq27510g3_regs
204#define bq2752x_regs bq27510g3_regs
205 bq27500_regs[BQ27XXX_REG_MAX] = {
206 [BQ27XXX_REG_CTRL] = 0x00,
207 [BQ27XXX_REG_TEMP] = 0x06,
208 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
209 [BQ27XXX_REG_VOLT] = 0x08,
210 [BQ27XXX_REG_AI] = 0x14,
211 [BQ27XXX_REG_FLAGS] = 0x0a,
212 [BQ27XXX_REG_TTE] = 0x16,
213 [BQ27XXX_REG_TTF] = 0x18,
214 [BQ27XXX_REG_TTES] = 0x1c,
215 [BQ27XXX_REG_TTECP] = 0x26,
216 [BQ27XXX_REG_NAC] = 0x0c,
217 [BQ27XXX_REG_FCC] = 0x12,
218 [BQ27XXX_REG_CYCT] = 0x2a,
219 [BQ27XXX_REG_AE] = 0x22,
220 [BQ27XXX_REG_SOC] = 0x2c,
221 [BQ27XXX_REG_DCAP] = 0x3c,
222 [BQ27XXX_REG_AP] = 0x24,
223 BQ27XXX_DM_REG_ROWS,
224 },
225#define bq27510g1_regs bq27500_regs
226#define bq27510g2_regs bq27500_regs
227 bq27510g3_regs[BQ27XXX_REG_MAX] = {
228 [BQ27XXX_REG_CTRL] = 0x00,
229 [BQ27XXX_REG_TEMP] = 0x06,
230 [BQ27XXX_REG_INT_TEMP] = 0x28,
231 [BQ27XXX_REG_VOLT] = 0x08,
232 [BQ27XXX_REG_AI] = 0x14,
233 [BQ27XXX_REG_FLAGS] = 0x0a,
234 [BQ27XXX_REG_TTE] = 0x16,
235 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
236 [BQ27XXX_REG_TTES] = 0x1a,
237 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
238 [BQ27XXX_REG_NAC] = 0x0c,
239 [BQ27XXX_REG_FCC] = 0x12,
240 [BQ27XXX_REG_CYCT] = 0x1e,
241 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
242 [BQ27XXX_REG_SOC] = 0x20,
243 [BQ27XXX_REG_DCAP] = 0x2e,
244 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
245 BQ27XXX_DM_REG_ROWS,
246 },
247 bq27520g1_regs[BQ27XXX_REG_MAX] = {
248 [BQ27XXX_REG_CTRL] = 0x00,
249 [BQ27XXX_REG_TEMP] = 0x06,
250 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
251 [BQ27XXX_REG_VOLT] = 0x08,
252 [BQ27XXX_REG_AI] = 0x14,
253 [BQ27XXX_REG_FLAGS] = 0x0a,
254 [BQ27XXX_REG_TTE] = 0x16,
255 [BQ27XXX_REG_TTF] = 0x18,
256 [BQ27XXX_REG_TTES] = 0x1c,
257 [BQ27XXX_REG_TTECP] = 0x26,
258 [BQ27XXX_REG_NAC] = 0x0c,
259 [BQ27XXX_REG_FCC] = 0x12,
260 [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
261 [BQ27XXX_REG_AE] = 0x22,
262 [BQ27XXX_REG_SOC] = 0x2c,
263 [BQ27XXX_REG_DCAP] = 0x3c,
264 [BQ27XXX_REG_AP] = 0x24,
265 BQ27XXX_DM_REG_ROWS,
266 },
267 bq27520g2_regs[BQ27XXX_REG_MAX] = {
268 [BQ27XXX_REG_CTRL] = 0x00,
269 [BQ27XXX_REG_TEMP] = 0x06,
270 [BQ27XXX_REG_INT_TEMP] = 0x36,
271 [BQ27XXX_REG_VOLT] = 0x08,
272 [BQ27XXX_REG_AI] = 0x14,
273 [BQ27XXX_REG_FLAGS] = 0x0a,
274 [BQ27XXX_REG_TTE] = 0x16,
275 [BQ27XXX_REG_TTF] = 0x18,
276 [BQ27XXX_REG_TTES] = 0x1c,
277 [BQ27XXX_REG_TTECP] = 0x26,
278 [BQ27XXX_REG_NAC] = 0x0c,
279 [BQ27XXX_REG_FCC] = 0x12,
280 [BQ27XXX_REG_CYCT] = 0x2a,
281 [BQ27XXX_REG_AE] = 0x22,
282 [BQ27XXX_REG_SOC] = 0x2c,
283 [BQ27XXX_REG_DCAP] = 0x3c,
284 [BQ27XXX_REG_AP] = 0x24,
285 BQ27XXX_DM_REG_ROWS,
286 },
287 bq27520g3_regs[BQ27XXX_REG_MAX] = {
288 [BQ27XXX_REG_CTRL] = 0x00,
289 [BQ27XXX_REG_TEMP] = 0x06,
290 [BQ27XXX_REG_INT_TEMP] = 0x36,
291 [BQ27XXX_REG_VOLT] = 0x08,
292 [BQ27XXX_REG_AI] = 0x14,
293 [BQ27XXX_REG_FLAGS] = 0x0a,
294 [BQ27XXX_REG_TTE] = 0x16,
295 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
296 [BQ27XXX_REG_TTES] = 0x1c,
297 [BQ27XXX_REG_TTECP] = 0x26,
298 [BQ27XXX_REG_NAC] = 0x0c,
299 [BQ27XXX_REG_FCC] = 0x12,
300 [BQ27XXX_REG_CYCT] = 0x2a,
301 [BQ27XXX_REG_AE] = 0x22,
302 [BQ27XXX_REG_SOC] = 0x2c,
303 [BQ27XXX_REG_DCAP] = 0x3c,
304 [BQ27XXX_REG_AP] = 0x24,
305 BQ27XXX_DM_REG_ROWS,
306 },
307 bq27520g4_regs[BQ27XXX_REG_MAX] = {
308 [BQ27XXX_REG_CTRL] = 0x00,
309 [BQ27XXX_REG_TEMP] = 0x06,
310 [BQ27XXX_REG_INT_TEMP] = 0x28,
311 [BQ27XXX_REG_VOLT] = 0x08,
312 [BQ27XXX_REG_AI] = 0x14,
313 [BQ27XXX_REG_FLAGS] = 0x0a,
314 [BQ27XXX_REG_TTE] = 0x16,
315 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
316 [BQ27XXX_REG_TTES] = 0x1c,
317 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
318 [BQ27XXX_REG_NAC] = 0x0c,
319 [BQ27XXX_REG_FCC] = 0x12,
320 [BQ27XXX_REG_CYCT] = 0x1e,
321 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
322 [BQ27XXX_REG_SOC] = 0x20,
323 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
324 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
325 BQ27XXX_DM_REG_ROWS,
326 },
327 bq27521_regs[BQ27XXX_REG_MAX] = {
328 [BQ27XXX_REG_CTRL] = 0x02,
329 [BQ27XXX_REG_TEMP] = 0x0a,
330 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
331 [BQ27XXX_REG_VOLT] = 0x0c,
332 [BQ27XXX_REG_AI] = 0x0e,
333 [BQ27XXX_REG_FLAGS] = 0x08,
334 [BQ27XXX_REG_TTE] = INVALID_REG_ADDR,
335 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
336 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
337 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
338 [BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
339 [BQ27XXX_REG_FCC] = INVALID_REG_ADDR,
340 [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
341 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
342 [BQ27XXX_REG_SOC] = INVALID_REG_ADDR,
343 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
344 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
345 [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR,
346 [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR,
347 [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR,
348 [BQ27XXX_DM_DATA] = INVALID_REG_ADDR,
349 [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR,
350 },
351 bq27530_regs[BQ27XXX_REG_MAX] = {
352 [BQ27XXX_REG_CTRL] = 0x00,
353 [BQ27XXX_REG_TEMP] = 0x06,
354 [BQ27XXX_REG_INT_TEMP] = 0x32,
355 [BQ27XXX_REG_VOLT] = 0x08,
356 [BQ27XXX_REG_AI] = 0x14,
357 [BQ27XXX_REG_FLAGS] = 0x0a,
358 [BQ27XXX_REG_TTE] = 0x16,
359 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
360 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
361 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
362 [BQ27XXX_REG_NAC] = 0x0c,
363 [BQ27XXX_REG_FCC] = 0x12,
364 [BQ27XXX_REG_CYCT] = 0x2a,
365 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
366 [BQ27XXX_REG_SOC] = 0x2c,
367 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
368 [BQ27XXX_REG_AP] = 0x24,
369 BQ27XXX_DM_REG_ROWS,
370 },
371#define bq27531_regs bq27530_regs
372 bq27541_regs[BQ27XXX_REG_MAX] = {
373 [BQ27XXX_REG_CTRL] = 0x00,
374 [BQ27XXX_REG_TEMP] = 0x06,
375 [BQ27XXX_REG_INT_TEMP] = 0x28,
376 [BQ27XXX_REG_VOLT] = 0x08,
377 [BQ27XXX_REG_AI] = 0x14,
378 [BQ27XXX_REG_FLAGS] = 0x0a,
379 [BQ27XXX_REG_TTE] = 0x16,
380 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
381 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
382 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
383 [BQ27XXX_REG_NAC] = 0x0c,
384 [BQ27XXX_REG_FCC] = 0x12,
385 [BQ27XXX_REG_CYCT] = 0x2a,
386 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
387 [BQ27XXX_REG_SOC] = 0x2c,
388 [BQ27XXX_REG_DCAP] = 0x3c,
389 [BQ27XXX_REG_AP] = 0x24,
390 BQ27XXX_DM_REG_ROWS,
391 },
392#define bq27542_regs bq27541_regs
393#define bq27546_regs bq27541_regs
394#define bq27742_regs bq27541_regs
395 bq27545_regs[BQ27XXX_REG_MAX] = {
396 [BQ27XXX_REG_CTRL] = 0x00,
397 [BQ27XXX_REG_TEMP] = 0x06,
398 [BQ27XXX_REG_INT_TEMP] = 0x28,
399 [BQ27XXX_REG_VOLT] = 0x08,
400 [BQ27XXX_REG_AI] = 0x14,
401 [BQ27XXX_REG_FLAGS] = 0x0a,
402 [BQ27XXX_REG_TTE] = 0x16,
403 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
404 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
405 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
406 [BQ27XXX_REG_NAC] = 0x0c,
407 [BQ27XXX_REG_FCC] = 0x12,
408 [BQ27XXX_REG_CYCT] = 0x2a,
409 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
410 [BQ27XXX_REG_SOC] = 0x2c,
411 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
412 [BQ27XXX_REG_AP] = 0x24,
413 BQ27XXX_DM_REG_ROWS,
414 },
415 bq27421_regs[BQ27XXX_REG_MAX] = {
416 [BQ27XXX_REG_CTRL] = 0x00,
417 [BQ27XXX_REG_TEMP] = 0x02,
418 [BQ27XXX_REG_INT_TEMP] = 0x1e,
419 [BQ27XXX_REG_VOLT] = 0x04,
420 [BQ27XXX_REG_AI] = 0x10,
421 [BQ27XXX_REG_FLAGS] = 0x06,
422 [BQ27XXX_REG_TTE] = INVALID_REG_ADDR,
423 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
424 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
425 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
426 [BQ27XXX_REG_NAC] = 0x08,
427 [BQ27XXX_REG_FCC] = 0x0e,
428 [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
429 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
430 [BQ27XXX_REG_SOC] = 0x1c,
431 [BQ27XXX_REG_DCAP] = 0x3c,
432 [BQ27XXX_REG_AP] = 0x18,
433 BQ27XXX_DM_REG_ROWS,
434 };
435#define bq27411_regs bq27421_regs
436#define bq27425_regs bq27421_regs
437#define bq27426_regs bq27421_regs
438#define bq27441_regs bq27421_regs
439#define bq27621_regs bq27421_regs
440
441static enum power_supply_property bq27000_props[] = {
442 POWER_SUPPLY_PROP_STATUS,
443 POWER_SUPPLY_PROP_PRESENT,
444 POWER_SUPPLY_PROP_VOLTAGE_NOW,
445 POWER_SUPPLY_PROP_CURRENT_NOW,
446 POWER_SUPPLY_PROP_CAPACITY,
447 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
448 POWER_SUPPLY_PROP_TEMP,
449 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
450 POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG,
451 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
452 POWER_SUPPLY_PROP_TECHNOLOGY,
453 POWER_SUPPLY_PROP_CHARGE_FULL,
454 POWER_SUPPLY_PROP_CHARGE_NOW,
455 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
456 POWER_SUPPLY_PROP_CYCLE_COUNT,
457 POWER_SUPPLY_PROP_ENERGY_NOW,
458 POWER_SUPPLY_PROP_POWER_AVG,
459 POWER_SUPPLY_PROP_HEALTH,
460 POWER_SUPPLY_PROP_MANUFACTURER,
461};
462
463static enum power_supply_property bq27010_props[] = {
464 POWER_SUPPLY_PROP_STATUS,
465 POWER_SUPPLY_PROP_PRESENT,
466 POWER_SUPPLY_PROP_VOLTAGE_NOW,
467 POWER_SUPPLY_PROP_CURRENT_NOW,
468 POWER_SUPPLY_PROP_CAPACITY,
469 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
470 POWER_SUPPLY_PROP_TEMP,
471 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
472 POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG,
473 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
474 POWER_SUPPLY_PROP_TECHNOLOGY,
475 POWER_SUPPLY_PROP_CHARGE_FULL,
476 POWER_SUPPLY_PROP_CHARGE_NOW,
477 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
478 POWER_SUPPLY_PROP_CYCLE_COUNT,
479 POWER_SUPPLY_PROP_HEALTH,
480 POWER_SUPPLY_PROP_MANUFACTURER,
481};
482
483#define bq2750x_props bq27510g3_props
484#define bq2751x_props bq27510g3_props
485#define bq2752x_props bq27510g3_props
486
487static enum power_supply_property bq27500_props[] = {
488 POWER_SUPPLY_PROP_STATUS,
489 POWER_SUPPLY_PROP_PRESENT,
490 POWER_SUPPLY_PROP_VOLTAGE_NOW,
491 POWER_SUPPLY_PROP_CURRENT_NOW,
492 POWER_SUPPLY_PROP_CAPACITY,
493 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
494 POWER_SUPPLY_PROP_TEMP,
495 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
496 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
497 POWER_SUPPLY_PROP_TECHNOLOGY,
498 POWER_SUPPLY_PROP_CHARGE_FULL,
499 POWER_SUPPLY_PROP_CHARGE_NOW,
500 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
501 POWER_SUPPLY_PROP_CYCLE_COUNT,
502 POWER_SUPPLY_PROP_ENERGY_NOW,
503 POWER_SUPPLY_PROP_POWER_AVG,
504 POWER_SUPPLY_PROP_HEALTH,
505 POWER_SUPPLY_PROP_MANUFACTURER,
506};
507#define bq27510g1_props bq27500_props
508#define bq27510g2_props bq27500_props
509
510static enum power_supply_property bq27510g3_props[] = {
511 POWER_SUPPLY_PROP_STATUS,
512 POWER_SUPPLY_PROP_PRESENT,
513 POWER_SUPPLY_PROP_VOLTAGE_NOW,
514 POWER_SUPPLY_PROP_CURRENT_NOW,
515 POWER_SUPPLY_PROP_CAPACITY,
516 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
517 POWER_SUPPLY_PROP_TEMP,
518 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
519 POWER_SUPPLY_PROP_TECHNOLOGY,
520 POWER_SUPPLY_PROP_CHARGE_FULL,
521 POWER_SUPPLY_PROP_CHARGE_NOW,
522 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
523 POWER_SUPPLY_PROP_CYCLE_COUNT,
524 POWER_SUPPLY_PROP_HEALTH,
525 POWER_SUPPLY_PROP_MANUFACTURER,
526};
527
528static enum power_supply_property bq27520g1_props[] = {
529 POWER_SUPPLY_PROP_STATUS,
530 POWER_SUPPLY_PROP_PRESENT,
531 POWER_SUPPLY_PROP_VOLTAGE_NOW,
532 POWER_SUPPLY_PROP_CURRENT_NOW,
533 POWER_SUPPLY_PROP_CAPACITY,
534 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
535 POWER_SUPPLY_PROP_TEMP,
536 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
537 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
538 POWER_SUPPLY_PROP_TECHNOLOGY,
539 POWER_SUPPLY_PROP_CHARGE_FULL,
540 POWER_SUPPLY_PROP_CHARGE_NOW,
541 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
542 POWER_SUPPLY_PROP_ENERGY_NOW,
543 POWER_SUPPLY_PROP_POWER_AVG,
544 POWER_SUPPLY_PROP_HEALTH,
545 POWER_SUPPLY_PROP_MANUFACTURER,
546};
547
548#define bq27520g2_props bq27500_props
549
550static enum power_supply_property bq27520g3_props[] = {
551 POWER_SUPPLY_PROP_STATUS,
552 POWER_SUPPLY_PROP_PRESENT,
553 POWER_SUPPLY_PROP_VOLTAGE_NOW,
554 POWER_SUPPLY_PROP_CURRENT_NOW,
555 POWER_SUPPLY_PROP_CAPACITY,
556 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
557 POWER_SUPPLY_PROP_TEMP,
558 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
559 POWER_SUPPLY_PROP_TECHNOLOGY,
560 POWER_SUPPLY_PROP_CHARGE_FULL,
561 POWER_SUPPLY_PROP_CHARGE_NOW,
562 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
563 POWER_SUPPLY_PROP_CYCLE_COUNT,
564 POWER_SUPPLY_PROP_ENERGY_NOW,
565 POWER_SUPPLY_PROP_POWER_AVG,
566 POWER_SUPPLY_PROP_HEALTH,
567 POWER_SUPPLY_PROP_MANUFACTURER,
568};
569
570static enum power_supply_property bq27520g4_props[] = {
571 POWER_SUPPLY_PROP_STATUS,
572 POWER_SUPPLY_PROP_PRESENT,
573 POWER_SUPPLY_PROP_VOLTAGE_NOW,
574 POWER_SUPPLY_PROP_CURRENT_NOW,
575 POWER_SUPPLY_PROP_CAPACITY,
576 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
577 POWER_SUPPLY_PROP_TEMP,
578 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
579 POWER_SUPPLY_PROP_TECHNOLOGY,
580 POWER_SUPPLY_PROP_CHARGE_FULL,
581 POWER_SUPPLY_PROP_CHARGE_NOW,
582 POWER_SUPPLY_PROP_CYCLE_COUNT,
583 POWER_SUPPLY_PROP_HEALTH,
584 POWER_SUPPLY_PROP_MANUFACTURER,
585};
586
587static enum power_supply_property bq27521_props[] = {
588 POWER_SUPPLY_PROP_STATUS,
589 POWER_SUPPLY_PROP_PRESENT,
590 POWER_SUPPLY_PROP_VOLTAGE_NOW,
591 POWER_SUPPLY_PROP_CURRENT_NOW,
592 POWER_SUPPLY_PROP_TEMP,
593 POWER_SUPPLY_PROP_TECHNOLOGY,
594};
595
596static enum power_supply_property bq27530_props[] = {
597 POWER_SUPPLY_PROP_STATUS,
598 POWER_SUPPLY_PROP_PRESENT,
599 POWER_SUPPLY_PROP_VOLTAGE_NOW,
600 POWER_SUPPLY_PROP_CURRENT_NOW,
601 POWER_SUPPLY_PROP_CAPACITY,
602 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
603 POWER_SUPPLY_PROP_TEMP,
604 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
605 POWER_SUPPLY_PROP_TECHNOLOGY,
606 POWER_SUPPLY_PROP_CHARGE_FULL,
607 POWER_SUPPLY_PROP_CHARGE_NOW,
608 POWER_SUPPLY_PROP_POWER_AVG,
609 POWER_SUPPLY_PROP_HEALTH,
610 POWER_SUPPLY_PROP_CYCLE_COUNT,
611 POWER_SUPPLY_PROP_MANUFACTURER,
612};
613#define bq27531_props bq27530_props
614
615static enum power_supply_property bq27541_props[] = {
616 POWER_SUPPLY_PROP_STATUS,
617 POWER_SUPPLY_PROP_PRESENT,
618 POWER_SUPPLY_PROP_VOLTAGE_NOW,
619 POWER_SUPPLY_PROP_CURRENT_NOW,
620 POWER_SUPPLY_PROP_CAPACITY,
621 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
622 POWER_SUPPLY_PROP_TEMP,
623 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
624 POWER_SUPPLY_PROP_TECHNOLOGY,
625 POWER_SUPPLY_PROP_CHARGE_FULL,
626 POWER_SUPPLY_PROP_CHARGE_NOW,
627 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
628 POWER_SUPPLY_PROP_CYCLE_COUNT,
629 POWER_SUPPLY_PROP_POWER_AVG,
630 POWER_SUPPLY_PROP_HEALTH,
631 POWER_SUPPLY_PROP_MANUFACTURER,
632};
633#define bq27542_props bq27541_props
634#define bq27546_props bq27541_props
635#define bq27742_props bq27541_props
636
637static enum power_supply_property bq27545_props[] = {
638 POWER_SUPPLY_PROP_STATUS,
639 POWER_SUPPLY_PROP_PRESENT,
640 POWER_SUPPLY_PROP_VOLTAGE_NOW,
641 POWER_SUPPLY_PROP_CURRENT_NOW,
642 POWER_SUPPLY_PROP_CAPACITY,
643 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
644 POWER_SUPPLY_PROP_TEMP,
645 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
646 POWER_SUPPLY_PROP_TECHNOLOGY,
647 POWER_SUPPLY_PROP_CHARGE_FULL,
648 POWER_SUPPLY_PROP_CHARGE_NOW,
649 POWER_SUPPLY_PROP_HEALTH,
650 POWER_SUPPLY_PROP_CYCLE_COUNT,
651 POWER_SUPPLY_PROP_POWER_AVG,
652 POWER_SUPPLY_PROP_MANUFACTURER,
653};
654
655static enum power_supply_property bq27421_props[] = {
656 POWER_SUPPLY_PROP_STATUS,
657 POWER_SUPPLY_PROP_PRESENT,
658 POWER_SUPPLY_PROP_VOLTAGE_NOW,
659 POWER_SUPPLY_PROP_CURRENT_NOW,
660 POWER_SUPPLY_PROP_CAPACITY,
661 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
662 POWER_SUPPLY_PROP_TEMP,
663 POWER_SUPPLY_PROP_TECHNOLOGY,
664 POWER_SUPPLY_PROP_CHARGE_FULL,
665 POWER_SUPPLY_PROP_CHARGE_NOW,
666 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
667 POWER_SUPPLY_PROP_MANUFACTURER,
668};
669#define bq27411_props bq27421_props
670#define bq27425_props bq27421_props
671#define bq27426_props bq27421_props
672#define bq27441_props bq27421_props
673#define bq27621_props bq27421_props
674
675struct bq27xxx_dm_reg {
676 u8 subclass_id;
677 u8 offset;
678 u8 bytes;
679 u16 min, max;
680};
681
682enum bq27xxx_dm_reg_id {
683 BQ27XXX_DM_DESIGN_CAPACITY = 0,
684 BQ27XXX_DM_DESIGN_ENERGY,
685 BQ27XXX_DM_TERMINATE_VOLTAGE,
686};
687
688#define bq27000_dm_regs 0
689#define bq27010_dm_regs 0
690#define bq2750x_dm_regs 0
691#define bq2751x_dm_regs 0
692#define bq2752x_dm_regs 0
693
694#if 0
695static struct bq27xxx_dm_reg bq27500_dm_regs[] = {
696 [BQ27XXX_DM_DESIGN_CAPACITY] = { 48, 10, 2, 0, 65535 },
697 [BQ27XXX_DM_DESIGN_ENERGY] = { },
698 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 80, 48, 2, 1000, 32767 },
699};
700#else
701#define bq27500_dm_regs 0
702#endif
703
704
705#define bq27510g1_dm_regs 0
706#define bq27510g2_dm_regs 0
707#define bq27510g3_dm_regs 0
708#define bq27520g1_dm_regs 0
709#define bq27520g2_dm_regs 0
710#define bq27520g3_dm_regs 0
711#define bq27520g4_dm_regs 0
712#define bq27521_dm_regs 0
713#define bq27530_dm_regs 0
714#define bq27531_dm_regs 0
715#define bq27541_dm_regs 0
716#define bq27542_dm_regs 0
717#define bq27546_dm_regs 0
718#define bq27742_dm_regs 0
719
720#if 0
721static struct bq27xxx_dm_reg bq27545_dm_regs[] = {
722 [BQ27XXX_DM_DESIGN_CAPACITY] = { 48, 23, 2, 0, 32767 },
723 [BQ27XXX_DM_DESIGN_ENERGY] = { 48, 25, 2, 0, 32767 },
724 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 80, 67, 2, 2800, 3700 },
725};
726#else
727#define bq27545_dm_regs 0
728#endif
729
730static struct bq27xxx_dm_reg bq27411_dm_regs[] = {
731 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 10, 2, 0, 32767 },
732 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 12, 2, 0, 32767 },
733 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 16, 2, 2800, 3700 },
734};
735
736static struct bq27xxx_dm_reg bq27421_dm_regs[] = {
737 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 10, 2, 0, 8000 },
738 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 12, 2, 0, 32767 },
739 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 16, 2, 2500, 3700 },
740};
741
742static struct bq27xxx_dm_reg bq27425_dm_regs[] = {
743 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 12, 2, 0, 32767 },
744 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 14, 2, 0, 32767 },
745 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 18, 2, 2800, 3700 },
746};
747
748static struct bq27xxx_dm_reg bq27426_dm_regs[] = {
749 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 6, 2, 0, 8000 },
750 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 8, 2, 0, 32767 },
751 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 10, 2, 2500, 3700 },
752};
753
754#if 0
755#define bq27441_dm_regs bq27421_dm_regs
756#else
757#define bq27441_dm_regs 0
758#endif
759
760#if 0
761static struct bq27xxx_dm_reg bq27621_dm_regs[] = {
762 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 3, 2, 0, 8000 },
763 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 5, 2, 0, 32767 },
764 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 9, 2, 2500, 3700 },
765};
766#else
767#define bq27621_dm_regs 0
768#endif
769
770#define BQ27XXX_O_ZERO 0x00000001
771#define BQ27XXX_O_OTDC 0x00000002
772#define BQ27XXX_O_UTOT 0x00000004
773#define BQ27XXX_O_CFGUP 0x00000008
774#define BQ27XXX_O_RAM 0x00000010
775
776#define BQ27XXX_DATA(ref, key, opt) { \
777 .opts = (opt), \
778 .unseal_key = key, \
779 .regs = ref##_regs, \
780 .dm_regs = ref##_dm_regs, \
781 .props = ref##_props, \
782 .props_size = ARRAY_SIZE(ref##_props) }
783
784static struct {
785 u32 opts;
786 u32 unseal_key;
787 u8 *regs;
788 struct bq27xxx_dm_reg *dm_regs;
789 enum power_supply_property *props;
790 size_t props_size;
791} bq27xxx_chip_data[] = {
792 [BQ27000] = BQ27XXX_DATA(bq27000, 0 , BQ27XXX_O_ZERO),
793 [BQ27010] = BQ27XXX_DATA(bq27010, 0 , BQ27XXX_O_ZERO),
794 [BQ2750X] = BQ27XXX_DATA(bq2750x, 0 , BQ27XXX_O_OTDC),
795 [BQ2751X] = BQ27XXX_DATA(bq2751x, 0 , BQ27XXX_O_OTDC),
796 [BQ2752X] = BQ27XXX_DATA(bq2752x, 0 , BQ27XXX_O_OTDC),
797 [BQ27500] = BQ27XXX_DATA(bq27500, 0x04143672, BQ27XXX_O_OTDC),
798 [BQ27510G1] = BQ27XXX_DATA(bq27510g1, 0 , BQ27XXX_O_OTDC),
799 [BQ27510G2] = BQ27XXX_DATA(bq27510g2, 0 , BQ27XXX_O_OTDC),
800 [BQ27510G3] = BQ27XXX_DATA(bq27510g3, 0 , BQ27XXX_O_OTDC),
801 [BQ27520G1] = BQ27XXX_DATA(bq27520g1, 0 , BQ27XXX_O_OTDC),
802 [BQ27520G2] = BQ27XXX_DATA(bq27520g2, 0 , BQ27XXX_O_OTDC),
803 [BQ27520G3] = BQ27XXX_DATA(bq27520g3, 0 , BQ27XXX_O_OTDC),
804 [BQ27520G4] = BQ27XXX_DATA(bq27520g4, 0 , BQ27XXX_O_OTDC),
805 [BQ27521] = BQ27XXX_DATA(bq27521, 0 , 0),
806 [BQ27530] = BQ27XXX_DATA(bq27530, 0 , BQ27XXX_O_UTOT),
807 [BQ27531] = BQ27XXX_DATA(bq27531, 0 , BQ27XXX_O_UTOT),
808 [BQ27541] = BQ27XXX_DATA(bq27541, 0 , BQ27XXX_O_OTDC),
809 [BQ27542] = BQ27XXX_DATA(bq27542, 0 , BQ27XXX_O_OTDC),
810 [BQ27546] = BQ27XXX_DATA(bq27546, 0 , BQ27XXX_O_OTDC),
811 [BQ27742] = BQ27XXX_DATA(bq27742, 0 , BQ27XXX_O_OTDC),
812 [BQ27545] = BQ27XXX_DATA(bq27545, 0x04143672, BQ27XXX_O_OTDC),
813 [BQ27411] = BQ27XXX_DATA(bq27411, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
814 [BQ27421] = BQ27XXX_DATA(bq27421, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
815 [BQ27425] = BQ27XXX_DATA(bq27425, 0x04143672, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP),
816 [BQ27426] = BQ27XXX_DATA(bq27426, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
817 [BQ27441] = BQ27XXX_DATA(bq27441, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
818 [BQ27621] = BQ27XXX_DATA(bq27621, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
819};
820
821static DEFINE_MUTEX(bq27xxx_list_lock);
822static LIST_HEAD(bq27xxx_battery_devices);
823
824#define BQ27XXX_MSLEEP(i) usleep_range((i)*1000, (i)*1000+500)
825
826#define BQ27XXX_DM_SZ 32
827
828
829
830
831
832
833
834
835
836
837
838struct bq27xxx_dm_buf {
839 u8 class;
840 u8 block;
841 u8 data[BQ27XXX_DM_SZ];
842 bool has_data, dirty;
843};
844
845#define BQ27XXX_DM_BUF(di, i) { \
846 .class = (di)->dm_regs[i].subclass_id, \
847 .block = (di)->dm_regs[i].offset / BQ27XXX_DM_SZ, \
848}
849
850static inline u16 *bq27xxx_dm_reg_ptr(struct bq27xxx_dm_buf *buf,
851 struct bq27xxx_dm_reg *reg)
852{
853 if (buf->class == reg->subclass_id &&
854 buf->block == reg->offset / BQ27XXX_DM_SZ)
855 return (u16 *) (buf->data + reg->offset % BQ27XXX_DM_SZ);
856
857 return NULL;
858}
859
860static const char * const bq27xxx_dm_reg_name[] = {
861 [BQ27XXX_DM_DESIGN_CAPACITY] = "design-capacity",
862 [BQ27XXX_DM_DESIGN_ENERGY] = "design-energy",
863 [BQ27XXX_DM_TERMINATE_VOLTAGE] = "terminate-voltage",
864};
865
866
867static bool bq27xxx_dt_to_nvm = true;
868module_param_named(dt_monitored_battery_updates_nvm, bq27xxx_dt_to_nvm, bool, 0444);
869MODULE_PARM_DESC(dt_monitored_battery_updates_nvm,
870 "Devicetree monitored-battery config updates data memory on NVM/flash chips.\n"
871 "Users must set this =0 when installing a different type of battery!\n"
872 "Default is =1."
873#ifndef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM
874 "\nSetting this affects future kernel updates, not the current configuration."
875#endif
876);
877
878static int poll_interval_param_set(const char *val, const struct kernel_param *kp)
879{
880 struct bq27xxx_device_info *di;
881 unsigned int prev_val = *(unsigned int *) kp->arg;
882 int ret;
883
884 ret = param_set_uint(val, kp);
885 if (ret < 0 || prev_val == *(unsigned int *) kp->arg)
886 return ret;
887
888 mutex_lock(&bq27xxx_list_lock);
889 list_for_each_entry(di, &bq27xxx_battery_devices, list) {
890 cancel_delayed_work_sync(&di->work);
891 schedule_delayed_work(&di->work, 0);
892 }
893 mutex_unlock(&bq27xxx_list_lock);
894
895 return ret;
896}
897
898static const struct kernel_param_ops param_ops_poll_interval = {
899 .get = param_get_uint,
900 .set = poll_interval_param_set,
901};
902
903static unsigned int poll_interval = 360;
904module_param_cb(poll_interval, ¶m_ops_poll_interval, &poll_interval, 0644);
905MODULE_PARM_DESC(poll_interval,
906 "battery poll interval in seconds - 0 disables polling");
907
908
909
910
911
912static inline int bq27xxx_read(struct bq27xxx_device_info *di, int reg_index,
913 bool single)
914{
915 int ret;
916
917 if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
918 return -EINVAL;
919
920 ret = di->bus.read(di, di->regs[reg_index], single);
921 if (ret < 0)
922 dev_dbg(di->dev, "failed to read register 0x%02x (index %d)\n",
923 di->regs[reg_index], reg_index);
924
925 return ret;
926}
927
928static inline int bq27xxx_write(struct bq27xxx_device_info *di, int reg_index,
929 u16 value, bool single)
930{
931 int ret;
932
933 if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
934 return -EINVAL;
935
936 if (!di->bus.write)
937 return -EPERM;
938
939 ret = di->bus.write(di, di->regs[reg_index], value, single);
940 if (ret < 0)
941 dev_dbg(di->dev, "failed to write register 0x%02x (index %d)\n",
942 di->regs[reg_index], reg_index);
943
944 return ret;
945}
946
947static inline int bq27xxx_read_block(struct bq27xxx_device_info *di, int reg_index,
948 u8 *data, int len)
949{
950 int ret;
951
952 if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
953 return -EINVAL;
954
955 if (!di->bus.read_bulk)
956 return -EPERM;
957
958 ret = di->bus.read_bulk(di, di->regs[reg_index], data, len);
959 if (ret < 0)
960 dev_dbg(di->dev, "failed to read_bulk register 0x%02x (index %d)\n",
961 di->regs[reg_index], reg_index);
962
963 return ret;
964}
965
966static inline int bq27xxx_write_block(struct bq27xxx_device_info *di, int reg_index,
967 u8 *data, int len)
968{
969 int ret;
970
971 if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
972 return -EINVAL;
973
974 if (!di->bus.write_bulk)
975 return -EPERM;
976
977 ret = di->bus.write_bulk(di, di->regs[reg_index], data, len);
978 if (ret < 0)
979 dev_dbg(di->dev, "failed to write_bulk register 0x%02x (index %d)\n",
980 di->regs[reg_index], reg_index);
981
982 return ret;
983}
984
985static int bq27xxx_battery_seal(struct bq27xxx_device_info *di)
986{
987 int ret;
988
989 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, BQ27XXX_SEALED, false);
990 if (ret < 0) {
991 dev_err(di->dev, "bus error on seal: %d\n", ret);
992 return ret;
993 }
994
995 return 0;
996}
997
998static int bq27xxx_battery_unseal(struct bq27xxx_device_info *di)
999{
1000 int ret;
1001
1002 if (di->unseal_key == 0) {
1003 dev_err(di->dev, "unseal failed due to missing key\n");
1004 return -EINVAL;
1005 }
1006
1007 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, (u16)(di->unseal_key >> 16), false);
1008 if (ret < 0)
1009 goto out;
1010
1011 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, (u16)di->unseal_key, false);
1012 if (ret < 0)
1013 goto out;
1014
1015 return 0;
1016
1017out:
1018 dev_err(di->dev, "bus error on unseal: %d\n", ret);
1019 return ret;
1020}
1021
1022static u8 bq27xxx_battery_checksum_dm_block(struct bq27xxx_dm_buf *buf)
1023{
1024 u16 sum = 0;
1025 int i;
1026
1027 for (i = 0; i < BQ27XXX_DM_SZ; i++)
1028 sum += buf->data[i];
1029 sum &= 0xff;
1030
1031 return 0xff - sum;
1032}
1033
1034static int bq27xxx_battery_read_dm_block(struct bq27xxx_device_info *di,
1035 struct bq27xxx_dm_buf *buf)
1036{
1037 int ret;
1038
1039 buf->has_data = false;
1040
1041 ret = bq27xxx_write(di, BQ27XXX_DM_CLASS, buf->class, true);
1042 if (ret < 0)
1043 goto out;
1044
1045 ret = bq27xxx_write(di, BQ27XXX_DM_BLOCK, buf->block, true);
1046 if (ret < 0)
1047 goto out;
1048
1049 BQ27XXX_MSLEEP(1);
1050
1051 ret = bq27xxx_read_block(di, BQ27XXX_DM_DATA, buf->data, BQ27XXX_DM_SZ);
1052 if (ret < 0)
1053 goto out;
1054
1055 ret = bq27xxx_read(di, BQ27XXX_DM_CKSUM, true);
1056 if (ret < 0)
1057 goto out;
1058
1059 if ((u8)ret != bq27xxx_battery_checksum_dm_block(buf)) {
1060 ret = -EINVAL;
1061 goto out;
1062 }
1063
1064 buf->has_data = true;
1065 buf->dirty = false;
1066
1067 return 0;
1068
1069out:
1070 dev_err(di->dev, "bus error reading chip memory: %d\n", ret);
1071 return ret;
1072}
1073
1074static void bq27xxx_battery_update_dm_block(struct bq27xxx_device_info *di,
1075 struct bq27xxx_dm_buf *buf,
1076 enum bq27xxx_dm_reg_id reg_id,
1077 unsigned int val)
1078{
1079 struct bq27xxx_dm_reg *reg = &di->dm_regs[reg_id];
1080 const char *str = bq27xxx_dm_reg_name[reg_id];
1081 u16 *prev = bq27xxx_dm_reg_ptr(buf, reg);
1082
1083 if (prev == NULL) {
1084 dev_warn(di->dev, "buffer does not match %s dm spec\n", str);
1085 return;
1086 }
1087
1088 if (reg->bytes != 2) {
1089 dev_warn(di->dev, "%s dm spec has unsupported byte size\n", str);
1090 return;
1091 }
1092
1093 if (!buf->has_data)
1094 return;
1095
1096 if (be16_to_cpup(prev) == val) {
1097 dev_info(di->dev, "%s has %u\n", str, val);
1098 return;
1099 }
1100
1101#ifdef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM
1102 if (!(di->opts & BQ27XXX_O_RAM) && !bq27xxx_dt_to_nvm) {
1103#else
1104 if (!(di->opts & BQ27XXX_O_RAM)) {
1105#endif
1106
1107 dev_warn(di->dev, "%s has %u; update to %u disallowed "
1108#ifdef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM
1109 "by dt_monitored_battery_updates_nvm=0"
1110#else
1111 "for flash/NVM data memory"
1112#endif
1113 "\n", str, be16_to_cpup(prev), val);
1114 return;
1115 }
1116
1117 dev_info(di->dev, "update %s to %u\n", str, val);
1118
1119 *prev = cpu_to_be16(val);
1120 buf->dirty = true;
1121}
1122
1123static int bq27xxx_battery_cfgupdate_priv(struct bq27xxx_device_info *di, bool active)
1124{
1125 const int limit = 100;
1126 u16 cmd = active ? BQ27XXX_SET_CFGUPDATE : BQ27XXX_SOFT_RESET;
1127 int ret, try = limit;
1128
1129 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, cmd, false);
1130 if (ret < 0)
1131 return ret;
1132
1133 do {
1134 BQ27XXX_MSLEEP(25);
1135 ret = bq27xxx_read(di, BQ27XXX_REG_FLAGS, false);
1136 if (ret < 0)
1137 return ret;
1138 } while (!!(ret & BQ27XXX_FLAG_CFGUP) != active && --try);
1139
1140 if (!try && di->chip != BQ27425) {
1141 dev_err(di->dev, "timed out waiting for cfgupdate flag %d\n", active);
1142 return -EINVAL;
1143 }
1144
1145 if (limit - try > 3)
1146 dev_warn(di->dev, "cfgupdate %d, retries %d\n", active, limit - try);
1147
1148 return 0;
1149}
1150
1151static inline int bq27xxx_battery_set_cfgupdate(struct bq27xxx_device_info *di)
1152{
1153 int ret = bq27xxx_battery_cfgupdate_priv(di, true);
1154 if (ret < 0 && ret != -EINVAL)
1155 dev_err(di->dev, "bus error on set_cfgupdate: %d\n", ret);
1156
1157 return ret;
1158}
1159
1160static inline int bq27xxx_battery_soft_reset(struct bq27xxx_device_info *di)
1161{
1162 int ret = bq27xxx_battery_cfgupdate_priv(di, false);
1163 if (ret < 0 && ret != -EINVAL)
1164 dev_err(di->dev, "bus error on soft_reset: %d\n", ret);
1165
1166 return ret;
1167}
1168
1169static int bq27xxx_battery_write_dm_block(struct bq27xxx_device_info *di,
1170 struct bq27xxx_dm_buf *buf)
1171{
1172 bool cfgup = di->opts & BQ27XXX_O_CFGUP;
1173 int ret;
1174
1175 if (!buf->dirty)
1176 return 0;
1177
1178 if (cfgup) {
1179 ret = bq27xxx_battery_set_cfgupdate(di);
1180 if (ret < 0)
1181 return ret;
1182 }
1183
1184 ret = bq27xxx_write(di, BQ27XXX_DM_CTRL, 0, true);
1185 if (ret < 0)
1186 goto out;
1187
1188 ret = bq27xxx_write(di, BQ27XXX_DM_CLASS, buf->class, true);
1189 if (ret < 0)
1190 goto out;
1191
1192 ret = bq27xxx_write(di, BQ27XXX_DM_BLOCK, buf->block, true);
1193 if (ret < 0)
1194 goto out;
1195
1196 BQ27XXX_MSLEEP(1);
1197
1198 ret = bq27xxx_write_block(di, BQ27XXX_DM_DATA, buf->data, BQ27XXX_DM_SZ);
1199 if (ret < 0)
1200 goto out;
1201
1202 ret = bq27xxx_write(di, BQ27XXX_DM_CKSUM,
1203 bq27xxx_battery_checksum_dm_block(buf), true);
1204 if (ret < 0)
1205 goto out;
1206
1207
1208
1209
1210
1211
1212 if (cfgup) {
1213 BQ27XXX_MSLEEP(1);
1214 ret = bq27xxx_battery_soft_reset(di);
1215 if (ret < 0)
1216 return ret;
1217 } else {
1218 BQ27XXX_MSLEEP(100);
1219 }
1220
1221 buf->dirty = false;
1222
1223 return 0;
1224
1225out:
1226 if (cfgup)
1227 bq27xxx_battery_soft_reset(di);
1228
1229 dev_err(di->dev, "bus error writing chip memory: %d\n", ret);
1230 return ret;
1231}
1232
1233static void bq27xxx_battery_set_config(struct bq27xxx_device_info *di,
1234 struct power_supply_battery_info *info)
1235{
1236 struct bq27xxx_dm_buf bd = BQ27XXX_DM_BUF(di, BQ27XXX_DM_DESIGN_CAPACITY);
1237 struct bq27xxx_dm_buf bt = BQ27XXX_DM_BUF(di, BQ27XXX_DM_TERMINATE_VOLTAGE);
1238 bool updated;
1239
1240 if (bq27xxx_battery_unseal(di) < 0)
1241 return;
1242
1243 if (info->charge_full_design_uah != -EINVAL &&
1244 info->energy_full_design_uwh != -EINVAL) {
1245 bq27xxx_battery_read_dm_block(di, &bd);
1246
1247 bq27xxx_battery_update_dm_block(di, &bd,
1248 BQ27XXX_DM_DESIGN_CAPACITY,
1249 info->charge_full_design_uah / 1000);
1250 bq27xxx_battery_update_dm_block(di, &bd,
1251 BQ27XXX_DM_DESIGN_ENERGY,
1252 info->energy_full_design_uwh / 1000);
1253 }
1254
1255 if (info->voltage_min_design_uv != -EINVAL) {
1256 bool same = bd.class == bt.class && bd.block == bt.block;
1257 if (!same)
1258 bq27xxx_battery_read_dm_block(di, &bt);
1259 bq27xxx_battery_update_dm_block(di, same ? &bd : &bt,
1260 BQ27XXX_DM_TERMINATE_VOLTAGE,
1261 info->voltage_min_design_uv / 1000);
1262 }
1263
1264 updated = bd.dirty || bt.dirty;
1265
1266 bq27xxx_battery_write_dm_block(di, &bd);
1267 bq27xxx_battery_write_dm_block(di, &bt);
1268
1269 bq27xxx_battery_seal(di);
1270
1271 if (updated && !(di->opts & BQ27XXX_O_CFGUP)) {
1272 bq27xxx_write(di, BQ27XXX_REG_CTRL, BQ27XXX_RESET, false);
1273 BQ27XXX_MSLEEP(300);
1274 }
1275
1276}
1277
1278static void bq27xxx_battery_settings(struct bq27xxx_device_info *di)
1279{
1280 struct power_supply_battery_info info = {};
1281 unsigned int min, max;
1282
1283 if (power_supply_get_battery_info(di->bat, &info) < 0)
1284 return;
1285
1286 if (!di->dm_regs) {
1287 dev_warn(di->dev, "data memory update not supported for chip\n");
1288 return;
1289 }
1290
1291 if (info.energy_full_design_uwh != info.charge_full_design_uah) {
1292 if (info.energy_full_design_uwh == -EINVAL)
1293 dev_warn(di->dev, "missing battery:energy-full-design-microwatt-hours\n");
1294 else if (info.charge_full_design_uah == -EINVAL)
1295 dev_warn(di->dev, "missing battery:charge-full-design-microamp-hours\n");
1296 }
1297
1298
1299 max = di->dm_regs[BQ27XXX_DM_DESIGN_ENERGY].max;
1300 if (info.energy_full_design_uwh > max * 1000) {
1301 dev_err(di->dev, "invalid battery:energy-full-design-microwatt-hours %d\n",
1302 info.energy_full_design_uwh);
1303 info.energy_full_design_uwh = -EINVAL;
1304 }
1305
1306
1307 max = di->dm_regs[BQ27XXX_DM_DESIGN_CAPACITY].max;
1308 if (info.charge_full_design_uah > max * 1000) {
1309 dev_err(di->dev, "invalid battery:charge-full-design-microamp-hours %d\n",
1310 info.charge_full_design_uah);
1311 info.charge_full_design_uah = -EINVAL;
1312 }
1313
1314 min = di->dm_regs[BQ27XXX_DM_TERMINATE_VOLTAGE].min;
1315 max = di->dm_regs[BQ27XXX_DM_TERMINATE_VOLTAGE].max;
1316 if ((info.voltage_min_design_uv < min * 1000 ||
1317 info.voltage_min_design_uv > max * 1000) &&
1318 info.voltage_min_design_uv != -EINVAL) {
1319 dev_err(di->dev, "invalid battery:voltage-min-design-microvolt %d\n",
1320 info.voltage_min_design_uv);
1321 info.voltage_min_design_uv = -EINVAL;
1322 }
1323
1324 if ((info.energy_full_design_uwh != -EINVAL &&
1325 info.charge_full_design_uah != -EINVAL) ||
1326 info.voltage_min_design_uv != -EINVAL)
1327 bq27xxx_battery_set_config(di, &info);
1328}
1329
1330
1331
1332
1333
1334static int bq27xxx_battery_read_soc(struct bq27xxx_device_info *di)
1335{
1336 int soc;
1337
1338 if (di->opts & BQ27XXX_O_ZERO)
1339 soc = bq27xxx_read(di, BQ27XXX_REG_SOC, true);
1340 else
1341 soc = bq27xxx_read(di, BQ27XXX_REG_SOC, false);
1342
1343 if (soc < 0)
1344 dev_dbg(di->dev, "error reading State-of-Charge\n");
1345
1346 return soc;
1347}
1348
1349
1350
1351
1352
1353static int bq27xxx_battery_read_charge(struct bq27xxx_device_info *di, u8 reg)
1354{
1355 int charge;
1356
1357 charge = bq27xxx_read(di, reg, false);
1358 if (charge < 0) {
1359 dev_dbg(di->dev, "error reading charge register %02x: %d\n",
1360 reg, charge);
1361 return charge;
1362 }
1363
1364 if (di->opts & BQ27XXX_O_ZERO)
1365 charge *= BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS;
1366 else
1367 charge *= 1000;
1368
1369 return charge;
1370}
1371
1372
1373
1374
1375
1376static inline int bq27xxx_battery_read_nac(struct bq27xxx_device_info *di)
1377{
1378 int flags;
1379
1380 if (di->opts & BQ27XXX_O_ZERO) {
1381 flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, true);
1382 if (flags >= 0 && (flags & BQ27000_FLAG_CI))
1383 return -ENODATA;
1384 }
1385
1386 return bq27xxx_battery_read_charge(di, BQ27XXX_REG_NAC);
1387}
1388
1389
1390
1391
1392
1393static inline int bq27xxx_battery_read_fcc(struct bq27xxx_device_info *di)
1394{
1395 return bq27xxx_battery_read_charge(di, BQ27XXX_REG_FCC);
1396}
1397
1398
1399
1400
1401
1402static int bq27xxx_battery_read_dcap(struct bq27xxx_device_info *di)
1403{
1404 int dcap;
1405
1406 if (di->opts & BQ27XXX_O_ZERO)
1407 dcap = bq27xxx_read(di, BQ27XXX_REG_DCAP, true);
1408 else
1409 dcap = bq27xxx_read(di, BQ27XXX_REG_DCAP, false);
1410
1411 if (dcap < 0) {
1412 dev_dbg(di->dev, "error reading initial last measured discharge\n");
1413 return dcap;
1414 }
1415
1416 if (di->opts & BQ27XXX_O_ZERO)
1417 dcap = (dcap << 8) * BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS;
1418 else
1419 dcap *= 1000;
1420
1421 return dcap;
1422}
1423
1424
1425
1426
1427
1428static int bq27xxx_battery_read_energy(struct bq27xxx_device_info *di)
1429{
1430 int ae;
1431
1432 ae = bq27xxx_read(di, BQ27XXX_REG_AE, false);
1433 if (ae < 0) {
1434 dev_dbg(di->dev, "error reading available energy\n");
1435 return ae;
1436 }
1437
1438 if (di->opts & BQ27XXX_O_ZERO)
1439 ae *= BQ27XXX_POWER_CONSTANT / BQ27XXX_RS;
1440 else
1441 ae *= 1000;
1442
1443 return ae;
1444}
1445
1446
1447
1448
1449
1450static int bq27xxx_battery_read_temperature(struct bq27xxx_device_info *di)
1451{
1452 int temp;
1453
1454 temp = bq27xxx_read(di, BQ27XXX_REG_TEMP, false);
1455 if (temp < 0) {
1456 dev_err(di->dev, "error reading temperature\n");
1457 return temp;
1458 }
1459
1460 if (di->opts & BQ27XXX_O_ZERO)
1461 temp = 5 * temp / 2;
1462
1463 return temp;
1464}
1465
1466
1467
1468
1469
1470static int bq27xxx_battery_read_cyct(struct bq27xxx_device_info *di)
1471{
1472 int cyct;
1473
1474 cyct = bq27xxx_read(di, BQ27XXX_REG_CYCT, false);
1475 if (cyct < 0)
1476 dev_err(di->dev, "error reading cycle count total\n");
1477
1478 return cyct;
1479}
1480
1481
1482
1483
1484
1485static int bq27xxx_battery_read_time(struct bq27xxx_device_info *di, u8 reg)
1486{
1487 int tval;
1488
1489 tval = bq27xxx_read(di, reg, false);
1490 if (tval < 0) {
1491 dev_dbg(di->dev, "error reading time register %02x: %d\n",
1492 reg, tval);
1493 return tval;
1494 }
1495
1496 if (tval == 65535)
1497 return -ENODATA;
1498
1499 return tval * 60;
1500}
1501
1502
1503
1504
1505
1506static int bq27xxx_battery_read_pwr_avg(struct bq27xxx_device_info *di)
1507{
1508 int tval;
1509
1510 tval = bq27xxx_read(di, BQ27XXX_REG_AP, false);
1511 if (tval < 0) {
1512 dev_err(di->dev, "error reading average power register %02x: %d\n",
1513 BQ27XXX_REG_AP, tval);
1514 return tval;
1515 }
1516
1517 if (di->opts & BQ27XXX_O_ZERO)
1518 return (tval * BQ27XXX_POWER_CONSTANT) / BQ27XXX_RS;
1519 else
1520 return tval;
1521}
1522
1523
1524
1525
1526static bool bq27xxx_battery_overtemp(struct bq27xxx_device_info *di, u16 flags)
1527{
1528 if (di->opts & BQ27XXX_O_OTDC)
1529 return flags & (BQ27XXX_FLAG_OTC | BQ27XXX_FLAG_OTD);
1530 if (di->opts & BQ27XXX_O_UTOT)
1531 return flags & BQ27XXX_FLAG_OT;
1532
1533 return false;
1534}
1535
1536
1537
1538
1539static bool bq27xxx_battery_undertemp(struct bq27xxx_device_info *di, u16 flags)
1540{
1541 if (di->opts & BQ27XXX_O_UTOT)
1542 return flags & BQ27XXX_FLAG_UT;
1543
1544 return false;
1545}
1546
1547
1548
1549
1550static bool bq27xxx_battery_dead(struct bq27xxx_device_info *di, u16 flags)
1551{
1552 if (di->opts & BQ27XXX_O_ZERO)
1553 return flags & (BQ27000_FLAG_EDV1 | BQ27000_FLAG_EDVF);
1554 else
1555 return flags & (BQ27XXX_FLAG_SOC1 | BQ27XXX_FLAG_SOCF);
1556}
1557
1558static int bq27xxx_battery_read_health(struct bq27xxx_device_info *di)
1559{
1560
1561 if (unlikely(bq27xxx_battery_overtemp(di, di->cache.flags)))
1562 return POWER_SUPPLY_HEALTH_OVERHEAT;
1563 if (unlikely(bq27xxx_battery_undertemp(di, di->cache.flags)))
1564 return POWER_SUPPLY_HEALTH_COLD;
1565 if (unlikely(bq27xxx_battery_dead(di, di->cache.flags)))
1566 return POWER_SUPPLY_HEALTH_DEAD;
1567
1568 return POWER_SUPPLY_HEALTH_GOOD;
1569}
1570
1571void bq27xxx_battery_update(struct bq27xxx_device_info *di)
1572{
1573 struct bq27xxx_reg_cache cache = {0, };
1574 bool has_ci_flag = di->opts & BQ27XXX_O_ZERO;
1575 bool has_singe_flag = di->opts & BQ27XXX_O_ZERO;
1576
1577 cache.flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, has_singe_flag);
1578 if ((cache.flags & 0xff) == 0xff)
1579 cache.flags = -1;
1580 if (cache.flags >= 0) {
1581 cache.temperature = bq27xxx_battery_read_temperature(di);
1582 if (has_ci_flag && (cache.flags & BQ27000_FLAG_CI)) {
1583 dev_info_once(di->dev, "battery is not calibrated! ignoring capacity values\n");
1584 cache.capacity = -ENODATA;
1585 cache.energy = -ENODATA;
1586 cache.time_to_empty = -ENODATA;
1587 cache.time_to_empty_avg = -ENODATA;
1588 cache.time_to_full = -ENODATA;
1589 cache.charge_full = -ENODATA;
1590 cache.health = -ENODATA;
1591 } else {
1592 if (di->regs[BQ27XXX_REG_TTE] != INVALID_REG_ADDR)
1593 cache.time_to_empty = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTE);
1594 if (di->regs[BQ27XXX_REG_TTECP] != INVALID_REG_ADDR)
1595 cache.time_to_empty_avg = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTECP);
1596 if (di->regs[BQ27XXX_REG_TTF] != INVALID_REG_ADDR)
1597 cache.time_to_full = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTF);
1598 cache.charge_full = bq27xxx_battery_read_fcc(di);
1599 cache.capacity = bq27xxx_battery_read_soc(di);
1600 if (di->regs[BQ27XXX_REG_AE] != INVALID_REG_ADDR)
1601 cache.energy = bq27xxx_battery_read_energy(di);
1602 di->cache.flags = cache.flags;
1603 cache.health = bq27xxx_battery_read_health(di);
1604 }
1605 if (di->regs[BQ27XXX_REG_CYCT] != INVALID_REG_ADDR)
1606 cache.cycle_count = bq27xxx_battery_read_cyct(di);
1607 if (di->regs[BQ27XXX_REG_AP] != INVALID_REG_ADDR)
1608 cache.power_avg = bq27xxx_battery_read_pwr_avg(di);
1609
1610
1611 if (di->charge_design_full <= 0)
1612 di->charge_design_full = bq27xxx_battery_read_dcap(di);
1613 }
1614
1615 if ((di->cache.capacity != cache.capacity) ||
1616 (di->cache.flags != cache.flags))
1617 power_supply_changed(di->bat);
1618
1619 if (memcmp(&di->cache, &cache, sizeof(cache)) != 0)
1620 di->cache = cache;
1621
1622 di->last_update = jiffies;
1623}
1624EXPORT_SYMBOL_GPL(bq27xxx_battery_update);
1625
1626static void bq27xxx_battery_poll(struct work_struct *work)
1627{
1628 struct bq27xxx_device_info *di =
1629 container_of(work, struct bq27xxx_device_info,
1630 work.work);
1631
1632 bq27xxx_battery_update(di);
1633
1634 if (poll_interval > 0)
1635 schedule_delayed_work(&di->work, poll_interval * HZ);
1636}
1637
1638
1639
1640
1641
1642
1643static int bq27xxx_battery_current(struct bq27xxx_device_info *di,
1644 union power_supply_propval *val)
1645{
1646 int curr;
1647 int flags;
1648
1649 curr = bq27xxx_read(di, BQ27XXX_REG_AI, false);
1650 if (curr < 0) {
1651 dev_err(di->dev, "error reading current\n");
1652 return curr;
1653 }
1654
1655 if (di->opts & BQ27XXX_O_ZERO) {
1656 flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, true);
1657 if (flags & BQ27000_FLAG_CHGS) {
1658 dev_dbg(di->dev, "negative current!\n");
1659 curr = -curr;
1660 }
1661
1662 val->intval = curr * BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS;
1663 } else {
1664
1665 val->intval = (int)((s16)curr) * 1000;
1666 }
1667
1668 return 0;
1669}
1670
1671static int bq27xxx_battery_status(struct bq27xxx_device_info *di,
1672 union power_supply_propval *val)
1673{
1674 int status;
1675
1676 if (di->opts & BQ27XXX_O_ZERO) {
1677 if (di->cache.flags & BQ27000_FLAG_FC)
1678 status = POWER_SUPPLY_STATUS_FULL;
1679 else if (di->cache.flags & BQ27000_FLAG_CHGS)
1680 status = POWER_SUPPLY_STATUS_CHARGING;
1681 else if (power_supply_am_i_supplied(di->bat) > 0)
1682 status = POWER_SUPPLY_STATUS_NOT_CHARGING;
1683 else
1684 status = POWER_SUPPLY_STATUS_DISCHARGING;
1685 } else {
1686 if (di->cache.flags & BQ27XXX_FLAG_FC)
1687 status = POWER_SUPPLY_STATUS_FULL;
1688 else if (di->cache.flags & BQ27XXX_FLAG_DSC)
1689 status = POWER_SUPPLY_STATUS_DISCHARGING;
1690 else
1691 status = POWER_SUPPLY_STATUS_CHARGING;
1692 }
1693
1694 val->intval = status;
1695
1696 return 0;
1697}
1698
1699static int bq27xxx_battery_capacity_level(struct bq27xxx_device_info *di,
1700 union power_supply_propval *val)
1701{
1702 int level;
1703
1704 if (di->opts & BQ27XXX_O_ZERO) {
1705 if (di->cache.flags & BQ27000_FLAG_FC)
1706 level = POWER_SUPPLY_CAPACITY_LEVEL_FULL;
1707 else if (di->cache.flags & BQ27000_FLAG_EDV1)
1708 level = POWER_SUPPLY_CAPACITY_LEVEL_LOW;
1709 else if (di->cache.flags & BQ27000_FLAG_EDVF)
1710 level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
1711 else
1712 level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
1713 } else {
1714 if (di->cache.flags & BQ27XXX_FLAG_FC)
1715 level = POWER_SUPPLY_CAPACITY_LEVEL_FULL;
1716 else if (di->cache.flags & BQ27XXX_FLAG_SOC1)
1717 level = POWER_SUPPLY_CAPACITY_LEVEL_LOW;
1718 else if (di->cache.flags & BQ27XXX_FLAG_SOCF)
1719 level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
1720 else
1721 level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
1722 }
1723
1724 val->intval = level;
1725
1726 return 0;
1727}
1728
1729
1730
1731
1732
1733static int bq27xxx_battery_voltage(struct bq27xxx_device_info *di,
1734 union power_supply_propval *val)
1735{
1736 int volt;
1737
1738 volt = bq27xxx_read(di, BQ27XXX_REG_VOLT, false);
1739 if (volt < 0) {
1740 dev_err(di->dev, "error reading voltage\n");
1741 return volt;
1742 }
1743
1744 val->intval = volt * 1000;
1745
1746 return 0;
1747}
1748
1749static int bq27xxx_simple_value(int value,
1750 union power_supply_propval *val)
1751{
1752 if (value < 0)
1753 return value;
1754
1755 val->intval = value;
1756
1757 return 0;
1758}
1759
1760static int bq27xxx_battery_get_property(struct power_supply *psy,
1761 enum power_supply_property psp,
1762 union power_supply_propval *val)
1763{
1764 int ret = 0;
1765 struct bq27xxx_device_info *di = power_supply_get_drvdata(psy);
1766
1767 mutex_lock(&di->lock);
1768 if (time_is_before_jiffies(di->last_update + 5 * HZ)) {
1769 cancel_delayed_work_sync(&di->work);
1770 bq27xxx_battery_poll(&di->work.work);
1771 }
1772 mutex_unlock(&di->lock);
1773
1774 if (psp != POWER_SUPPLY_PROP_PRESENT && di->cache.flags < 0)
1775 return -ENODEV;
1776
1777 switch (psp) {
1778 case POWER_SUPPLY_PROP_STATUS:
1779 ret = bq27xxx_battery_status(di, val);
1780 break;
1781 case POWER_SUPPLY_PROP_VOLTAGE_NOW:
1782 ret = bq27xxx_battery_voltage(di, val);
1783 break;
1784 case POWER_SUPPLY_PROP_PRESENT:
1785 val->intval = di->cache.flags < 0 ? 0 : 1;
1786 break;
1787 case POWER_SUPPLY_PROP_CURRENT_NOW:
1788 ret = bq27xxx_battery_current(di, val);
1789 break;
1790 case POWER_SUPPLY_PROP_CAPACITY:
1791 ret = bq27xxx_simple_value(di->cache.capacity, val);
1792 break;
1793 case POWER_SUPPLY_PROP_CAPACITY_LEVEL:
1794 ret = bq27xxx_battery_capacity_level(di, val);
1795 break;
1796 case POWER_SUPPLY_PROP_TEMP:
1797 ret = bq27xxx_simple_value(di->cache.temperature, val);
1798 if (ret == 0)
1799 val->intval -= 2731;
1800 break;
1801 case POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW:
1802 ret = bq27xxx_simple_value(di->cache.time_to_empty, val);
1803 break;
1804 case POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG:
1805 ret = bq27xxx_simple_value(di->cache.time_to_empty_avg, val);
1806 break;
1807 case POWER_SUPPLY_PROP_TIME_TO_FULL_NOW:
1808 ret = bq27xxx_simple_value(di->cache.time_to_full, val);
1809 break;
1810 case POWER_SUPPLY_PROP_TECHNOLOGY:
1811 val->intval = POWER_SUPPLY_TECHNOLOGY_LION;
1812 break;
1813 case POWER_SUPPLY_PROP_CHARGE_NOW:
1814 ret = bq27xxx_simple_value(bq27xxx_battery_read_nac(di), val);
1815 break;
1816 case POWER_SUPPLY_PROP_CHARGE_FULL:
1817 ret = bq27xxx_simple_value(di->cache.charge_full, val);
1818 break;
1819 case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
1820 ret = bq27xxx_simple_value(di->charge_design_full, val);
1821 break;
1822
1823
1824
1825
1826 case POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN:
1827 case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
1828 return -EINVAL;
1829 case POWER_SUPPLY_PROP_CYCLE_COUNT:
1830 ret = bq27xxx_simple_value(di->cache.cycle_count, val);
1831 break;
1832 case POWER_SUPPLY_PROP_ENERGY_NOW:
1833 ret = bq27xxx_simple_value(di->cache.energy, val);
1834 break;
1835 case POWER_SUPPLY_PROP_POWER_AVG:
1836 ret = bq27xxx_simple_value(di->cache.power_avg, val);
1837 break;
1838 case POWER_SUPPLY_PROP_HEALTH:
1839 ret = bq27xxx_simple_value(di->cache.health, val);
1840 break;
1841 case POWER_SUPPLY_PROP_MANUFACTURER:
1842 val->strval = BQ27XXX_MANUFACTURER;
1843 break;
1844 default:
1845 return -EINVAL;
1846 }
1847
1848 return ret;
1849}
1850
1851static void bq27xxx_external_power_changed(struct power_supply *psy)
1852{
1853 struct bq27xxx_device_info *di = power_supply_get_drvdata(psy);
1854
1855 cancel_delayed_work_sync(&di->work);
1856 schedule_delayed_work(&di->work, 0);
1857}
1858
1859int bq27xxx_battery_setup(struct bq27xxx_device_info *di)
1860{
1861 struct power_supply_desc *psy_desc;
1862 struct power_supply_config psy_cfg = {
1863 .of_node = di->dev->of_node,
1864 .drv_data = di,
1865 };
1866
1867 INIT_DELAYED_WORK(&di->work, bq27xxx_battery_poll);
1868 mutex_init(&di->lock);
1869
1870 di->regs = bq27xxx_chip_data[di->chip].regs;
1871 di->unseal_key = bq27xxx_chip_data[di->chip].unseal_key;
1872 di->dm_regs = bq27xxx_chip_data[di->chip].dm_regs;
1873 di->opts = bq27xxx_chip_data[di->chip].opts;
1874
1875 psy_desc = devm_kzalloc(di->dev, sizeof(*psy_desc), GFP_KERNEL);
1876 if (!psy_desc)
1877 return -ENOMEM;
1878
1879 psy_desc->name = di->name;
1880 psy_desc->type = POWER_SUPPLY_TYPE_BATTERY;
1881 psy_desc->properties = bq27xxx_chip_data[di->chip].props;
1882 psy_desc->num_properties = bq27xxx_chip_data[di->chip].props_size;
1883 psy_desc->get_property = bq27xxx_battery_get_property;
1884 psy_desc->external_power_changed = bq27xxx_external_power_changed;
1885
1886 di->bat = power_supply_register_no_ws(di->dev, psy_desc, &psy_cfg);
1887 if (IS_ERR(di->bat)) {
1888 dev_err(di->dev, "failed to register battery\n");
1889 return PTR_ERR(di->bat);
1890 }
1891
1892 bq27xxx_battery_settings(di);
1893 bq27xxx_battery_update(di);
1894
1895 mutex_lock(&bq27xxx_list_lock);
1896 list_add(&di->list, &bq27xxx_battery_devices);
1897 mutex_unlock(&bq27xxx_list_lock);
1898
1899 return 0;
1900}
1901EXPORT_SYMBOL_GPL(bq27xxx_battery_setup);
1902
1903void bq27xxx_battery_teardown(struct bq27xxx_device_info *di)
1904{
1905
1906
1907
1908
1909
1910
1911 poll_interval = 0;
1912
1913 cancel_delayed_work_sync(&di->work);
1914
1915 power_supply_unregister(di->bat);
1916
1917 mutex_lock(&bq27xxx_list_lock);
1918 list_del(&di->list);
1919 mutex_unlock(&bq27xxx_list_lock);
1920
1921 mutex_destroy(&di->lock);
1922}
1923EXPORT_SYMBOL_GPL(bq27xxx_battery_teardown);
1924
1925MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
1926MODULE_DESCRIPTION("BQ27xxx battery monitor driver");
1927MODULE_LICENSE("GPL");
1928
